University of Central Punjab

Faculty of Information Technology

Spring 2022

A. Course Description

Course Code CSCS3543

Course Title Computer Organization and Assembly Language (Theory)
Credit Hours 4(3+1)
Assessment Instruments with Assignments (20%)
Weights (quizzes, midterms, final, Quizzes (15%)
assignments, presentation, lab Class Participation (5%)
work, etc.)
Mid Term (20%)
Final Term (40%)
Course Instructors
Course Coordinator Dr. Adnan Ghafoor
Office Hours TBA
Plagiarism Policy All the parties involved in first cheating case in Midterm or Final
term will be awarded ‘F’ for the course.
Current Catalog Description The objective of this course is to understand the organization of
microprocessor for instance Intel x86 in terms of assembly language
instruction. This course primarily focuses on the detailed analysis and
working of microprocessor.
Textbook (Notes) Assembly language, Design and Interfacing 4th edition, Mazidi &
Mazidi

Reference Books  Assembly Language Intel based Computers, 4th Edition, by
KIP, R, IRVINE
 Computer Architecture and organization 8th Edition, by
William Stallings.
 Art of Assembly,
Teaching-Learning Methodology  More emphasis will be on coding assignments and practical
lab sessions. Regular and online quizzes will be held to help
students improving their understanding. Extra tutorial session
will be conducted to increase problem solving kills.
Course Goals Upon successful completion of this course, students will be able:

 To develop the understanding, working and organization of

microprocessor.

 Develop a habit to write both memory and time optimized

code using assembly language.

Topics Covered in the Course, Attached

with Number of Lectures on Each
Topic
Lab Projects Yes
Theory & Lab Exam
Class Time Spent on (in credit Theory Problem Solution Labs
hours) Analysis Design
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 1 1 1 1

Lecture Book Reference Assessme

Week
# Contents (Sections) nt
Introduction to the Course Irvine: 2.1.1  
Introduction to 8086 processor Art of Assembly: 3.1  
Address and Data buses and their size Brey: 2.1  
1
Control bus (Read Write and Memory/IO
signals) Mazidi: 0.2  
Processor-Memory-I/O Model    
1 Irvine: 2.2.2  
Basic Computer Architecture Art of Assembly: 4.1  
General purpose registers Brey: 2.1  
2 Segment registers Mazidi: 1.2  
Index registers    
Purpose of these registers    
     
Programing Model of X86 Irvine: 14.1.5  
Assembler Directives (.model, .stack, .data,
.code, .exit), Mazidi: 1.4  
Basic program structure, Mazidi: 2.1  
3 Data movement among registers using
(MOV instruction), Irvine: 14.2.2  
Writing Hello World Program    
Process Termination (Usage of Int 0x21,
2 Service 0x4c)    
Register addressing mode Irvine: 12.3.6  
Immediate addressing mode Art of Assembly: 4.6  
Direct addressing mode Brey: 3.1  
Indirect addressing mode Art of Assembly: 4.7  
4
Logical to Physical Address Conversion Mazidi: 1.6  
Examples with MOV instruction  
   
   
ALU instructions Art of Assembly: 6.5 A1
5 Flag register Mazidi: 3.1 Q1
Programming practice questions    
3
Data types Art of Assembly: 5.3  
6 Variable declaration and initialization Mazidi: 2.5  
ALU operations on variables    
Arrays & Loops Art of Assembly: 5.6.1  
4 7 Base plus index addressing mode Brey: 6.1  
Base relative plus index addressing mode    

2 NCEAC.FORM.001.C
 Jump & Branch insturctions Art of Assembly: 10.1  
8
  Irvine: 6.9.4  
Bit Manipulation Art of Assembly: 6.6  
9 Shift: Arithmetic and Logical Shift Mazidi: 3.5  
Rotations    
5 Bit Masking Irvine:  
Selective Set Mazidi: 3.6  
10
Selective Clear Art of Assembly: 9.6  
Selective Complement Brey:  
Stack    
11 Introduction to Stack    
Saving and restoring variable in stack    
Subroutines   A2
6
CALL and RET statements   Q2
12 Simple subroutines Art of Assembly: 8.7  
Parameter Passing through Stack Brey: 6.3  
Return value    
Subroutines    
13 Parameter passing through stack    
     
7 Multiplication & Division Art of Assembly: 6.5.6  
MUL and DIV Instructions Art of Assembly: 6.5.7  
14
Programming exercise Mazidi: 3.2  
Mazidi: 6.9  
Adjustment    
Instructions: AAA, AAD, AAM    
15
8 Programming exercise    
     
16 MID TERM    
17 MID TERM PAPER REVIEW    
Video Memory Art of Assembly: 23.1  
9
18 Accessing video memory directly  
Familiarize with ASCII and attribute    
Display Memory    
19 Screen Calculation and Printing    
Programming exercise    
10 String Instructions    
Introduce basic string instructions Mazidi: 6.2  
20
LES and LDS instruction Art of Assmbly: 6.3.3  
Programming exercise  
11 21 Software Interrupts Irvine: 14.1.4 Q3
Basic introduction of interrupts    
BIOS and DOS interrupts for printing on Mazidi: 4.1  
screen and reading keys

3 NCEAC.FORM.001.C
 Software Interrupts Mazidi: 14.1  
Explain the concept of IVT (IVT)    
22
Writing ISRs    
Writing ISR for Interrupt 0x65    
Exceptions (Handling) Art of Assembly: 17.3  
23 Divide by Zero    
Overflow    
12 Hardware Interrupts Art of Assembly: 17.4 A3
Programmable Interrupt Controller Mazidi: 14.3  
24
IRQs    
Writing ISR for Timer Interrupt    
Interacting with I/O Irvine: 2.4.4 Q4
IN & Out Instructions Brey: 11.1  
25
Application: Reading Time from RTC Art of Assembly: 17.4.7  
Programming exercise    
13
X64 programming Notes  
Introduction to x64 programming    
26
64-bit registers    
Parameter passing to 64-bit functions    
x64 programming   A4
Writing libraries in assembly language    
27
Calling library function in high level
14
language program    
x64 programming    
28
Programming exercise    
Exploiting Hardware features: Multi-Media
eXtension (MMX) Brey: 14.5 Q5
29
MMX registers    
15
Exploiting data-level parallelism    
MMX    
30
MMX exercise    
31 Revision    
16
32 Revision    

4 NCEAC.FORM.001.C