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ECPC Assignment 2 - With Ans

The document provides instructions for a laboratory experiment involving programming a TMS320F28379D microcontroller. It includes questions about the microcontroller's specifications and programming tasks. Specifically, it asks about the microcontroller's package type, pin count, temperature range, CPU bit size, flash and RAM sizes, and peripheral features. It also provides tasks to download documentation, set up a Code Composer Studio project, write and debug a simple program, and configure the system clock to run at 120MHz.

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106 views4 pages

ECPC Assignment 2 - With Ans

The document provides instructions for a laboratory experiment involving programming a TMS320F28379D microcontroller. It includes questions about the microcontroller's specifications and programming tasks. Specifically, it asks about the microcontroller's package type, pin count, temperature range, CPU bit size, flash and RAM sizes, and peripheral features. It also provides tasks to download documentation, set up a Code Composer Studio project, write and debug a simple program, and configure the system clock to run at 120MHz.

Uploaded by

Yashwin.v Yashu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 4

USN

THE NATIONAL INSTITUTE OF ENGINEERING, MYSURU


(Autonomous under VTU)

Embedded Controllers for Power Converters (Code: EE6E112)


Laboratory Experiment-2

Name of the student: USN:

Date: Time:

Software:

1. What is the package type?


Two packages are available.
a. nFBGA with 337pin
b. HLQFP with 176 pin
But one used in launch pad is BGA type. Since, students haven’t seen launch board yet, both
are considered to be right. (page 3)
2. How many pins are there?
337 or 176 (page 1)
3. What is the operating temperature range?
–40 to 105 °C (page 51)
4. What is the bit size of the CPU?
32 bit (page 1)
5. What is the maximum instruction clock frequency?

6. What is the bit size of each FLASH register?


16 bit (Page 179)
7. How much on-chip FLASH available?
512KB (Page 180) on each cpu
8. What is the bit size of each data RAM register?
16 bit (Page 179)
9. How much on-chip RAM is available?
172KB (Page 180)
10. How many GPIO pins are available?
169 (page 1)
11. How many GP Timers are there?
3 (page 1)
12. How many ADC are available?
4 (page 1)
13. How many analog channels can be sampled?
4 (page 1)
14. What the conversion time of ADC in 12bit mode?
USN

280ns (page 7)
15. How many DAC are there? What is the bit size?
3 (page 1)
16. How many PWM channels are available?
24 (page 1)
17. How many UART, SPI, I2C, CAN and USB are available?
4,3,2,2,1 (Page 1)
18. Which connector and the pin no XCLKOUT is available on the Launch Pad?
J9 pin 37 (GPIO73), Launch Pad user manual, p.19 Fig.10
19. Name the various registers of Watch dog timer(WDT) Module?

p.220, TRM
20. Which register and bits to be made zero or one to disable the WDT?

p.224, TRM

Laboratory work
Part-I

1. Down load TMS320F28379D data sheet, Technical Reference Manual, Launch pad user manual
etc from following using following links: -
 CCS down load link:
o https://software-dl.ti.com/ccs/esd/documents/ccs_downloads.html
 Data sheet:
o https://www.ti.com/lit/ds/sprs880n/sprs880n.pdf?ts=1611811065345&ref_url=https
%253A%252F%252Fwww.ti.com%252Ftool%252FLAUNCHXL-F28379D
 Launch pad user guide:
o https://www.ti.com/lit/ug/sprui77c/sprui77c.pdf?ts=1611749004806&ref_url=https
%253A%252F%252Fwww.ti.com%252Fsitesearch%252Fdocs%252Funiversalsearch.tsp
%253FsearchTerm%253DLAUNCHXL%2BF28379D
USN

 Technical Reference manual:


o https://www.ti.com/lit/ug/spruhm8h/spruhm8h.pdf
 C2000Ware:
o https://www.ti.com/tool/download/C2000WARE

2. Install the Code composer Studio in your Laptop


3. Create Workspace named “ECPC-Lab”
4. Create the project “First Project
5. Include the file “F28x_Project.h” in your project
6. Replace the Folder namely “include” under his project folder by new “include” (along with all
files) given to you now
7. Copy following files to the Project Folder: “2837xD_RAM_lnk_cpu1.cmd”,
“F2837xD_Headers_nonBIOS_cpu1.cmd” and “F2837xD_GlobalVariableDefs.c”
8. Add the predefined symbol “CPU1”: Go to Project->Properties->Predefined symbol->add-> type
“CPU1”
9. Write simple C code for adding/multiplying two sets of numbers stored in integer array and store
the product in the third integer array
10. Select Debug probe “Texas Instruments XDS 100v2 USB Debug probe”: Go to
Project -> Properties -> General -> Connection -> Select from combo box
11. Interface CCS to the Launch Pad hardware by connecting the USB cable.
12. Debug the program
13. Verify the result by viewing the contents of these variables and also find out the memory location
where these variables are stored
14. Add the break points and view the intermediate results

Part-II

Setting up the system clock : Find the page where a step by step procedure is given in the TRM to set
[SPRUHM8H] to set up the clock. Configure the bits of relevant registers to implement the steps outline
below. Use the format Family_name.Register_name.bit_name = X. The clock configuration registers
family name is ClkCfgRegs. We want to set the system clock to 120MHz. If the register is software
protected, write it between these two instructions, EALLOW and EDIS.

1) Select the external clock


2) Bypass the PLL
3) Set the clock divider to 1
4) Set the integral and fractional bits of the PLL multiplier register
5) Turn off the PLL and then wait for the PLL lock bit to be released. Do this step for five times.
6) Set the clock divider to desired + 1
7) Switch back to PLL
8) Set the clock divider to the selected value.
USN

Solution:

#include "F28x_Project.h"
int i;

void main()
{

EALLOW;
ClkCfgRegs.CLKSRCCTL1.bit.OSCCLKSRCSEL=0; // primary oscillator select
ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN=0; // bypass pll
for(i=0;i<120;i++); //wait for 120 oscillator cycle, this is mntnd in silicon errata documrnt

ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV=0;
for(i=0;i<=4;i++) // lock PLL 5 times
{
ClkCfgRegs.SYSPLLCTL1.bit.PLLEN= 0; // lock PLL
ClkCfgRegs.SYSPLLMULT.bit.IMULT=12; // 120Mhz PLL raw clock
ClkCfgRegs.SYSPLLMULT.bit.FMULT=0; //0.0 fractional mult

while(ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1);
}
ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV=1; //Desired+1
ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN=1; // switch to PLL
ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV=0; //divides by 1, 162Mhz clock
ClkCfgRegs.LOSPCP.bit.LSPCLKDIV=1; // 80Mhz LSP clock
EDIS;
}

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