qr Ans oy 3 Ans Ans Qs Ans Ans qr Ans Ans Computer Architecture What is Computer Organization? Computer Organization is concerned with the way the hardware component operate and the way they are ‘connected together to form the computer system, ‘What is computer architecture? ‘Computer architecture is concemed with the structure and the behavior ofthe computer as scen by the user, ‘What do you mean by insirution code? vided ann code is a group of bts that instruct the computer to perform a specific operation. It is usually ivided into parts , each having its own particular interpretation. eal ‘What is instruction format? Is_ 4 nu o (1 “Topende ~" [adiress Give names of registers for basic Computer? Data register Address re; ‘Accumulator Instruction Register * Program Counter ‘Temporary register Input register Output register ‘What do you mean by Program Counter (PC)? Program counter hold address ofthe next insruction to be read from memory afer the curent instruction is ‘executed. What is accumulator? Accumulator is processor register and abbreviation of AC. The operation is performed with the memory ‘operand and the content of AC : How many types of computer instructions? Three types of computer instructions: 1. Memory reference instructions:- AND,ADD. 2. Register reference instructions: CLA,CLE 3. Input-Output instructions: INP,OUT. What do you mean by instruction cycle? Instruction Cycle: The program is executed in the computer by going through a cycle for each instruction, Each instruction eyele in turn subdivided into a sequence of subeyele or phases. Instruction cycle consist of the following phases:- 1. Fetch an instruction from memory 2. Decode the instruction 3. Read the effective address from memory 4. Execute the instruction ‘What is difference b/w hardwired and micro programmed control unit? : Hardwired Control unit: In this type of control unit the control logic is implemented with gates, flip-flop. decoders. A hardwired control unit as the name implies require changes in the wiring among the vario ‘components ifthe design has to be changed or modified, Micro programmed control unit: In this type of control unit the control information is stored in control memory. The control memory is programmed to initiate the required sequence of micro-operations. Any required change or modifications can be done by updating the micro program in control memory.Qu Ans oye Ans 1 aks is Ans is ais Ans Re 2 What is difference b/w compiler and interpreter? Complier: A compiler is a program that translates program (called source code) written in some high level language into object code. The compiler derives is name from the way it works, ooking at the entire piece of ‘source code and collecting and reorganizing the instructions. A compiler translates high-level wiructions directly into ‘machine language and this process is called compiling. Taterpreter-An interpreter translates high-level instructions into. an’ intermediate form, which i then exceutes. Interpreter analyzes and executes each line of source cade in succession, withott looking at the catifs programs; the advantage of interpreters is that they can execute a program immediately. Compilers Ha rate cmaine Before an executable program emerges. However, programs produced by compilers run ‘much fester than the same programs executed by an inteyyreter, : What do you mean by control word? Counsel Word:- The contrl variables at any given time canbe represeated by a string of 1° and 0s called Define micro instruction and micro pr and micro program? He instruction: The micro instrution specifies one oF more micro operation forthe system cro program:- A sequence of micro instructions constitutes a iero program Give micro instruction format? FI, F2, F3:- Micro operation field CD:-Condition for branching. BR :-Branch Field AD :-Address Field Explain Control memory? Dynamic micro programming permits a micro program to be loaded initially from an auxiliary memory, Control unit that uses dynamic micro programming employs a writable control unit .This type of memory can be used for writing but is used mostly for reading. A memory that is part of control unit is referred to @s control memory. ‘Draw figure for micro programmed control organization? = = lle lyeF ==, a fo = Micro programmed control organization What do you mean by addressing modes? Give names of addressing modes? [Aidressing Moves The airessng mode speifis the way the operands ace chosen during the roam execution. ‘Names of addressing modes are:- 1 Implied 2 immediate 3 Register 4 Register indirect : 5 Auto increment and auto decrement 6 Direct addressing 7 Indirect addressing 8 Relative Address Mode 9 Indexed addressing 10 Base register addressing ModeQu si Qu Q20 Ans Qa Ans 22 ‘Ans Als Q24 Ans 27, A Define effective address? Effective address:- Effective address is actual address of operand resides in the memory. Define direct indirect addressing mode, relative addressing mode and register mode? Direct addressing mode: In this mode the effective address is equal to the address part of the instruction. Indirect addressing mode:- In this mode the address field of the instruction gives the address where, the effective address is stored in memory. Relative addressing mode:-In this mode the content of the program counter is added to the address part of, the instruction in order to obtain the effective address. Register addressing mode:- In this mode operands are in registers that reside within the CPU. Define Implied Mode? Implied Mode:- In this mode the operands are specified implicitly in the definition of the instruction Give examples of data transfer data manipulation and program control instruction? Data Transfer:- MOV,LD,IN,OUT. Data Manipulation:-ADD, AND, SHR, SHL. Program Control:- BR,JMP, RET, CALL. ‘What do you mean by interrupt? How many types of interrupt? Interrupt refers to the transfer of program control from a currently running program to another service program as a result of an external or internal generated request. Control return to the original program after the service program is executed. ‘Three types of interrupts are:- 1 External interrupt 2 Internal interrupt or trap 3 Software interrupt Define external and internal interrupt? External interrupt:-comes from V/O devices, from timing device, from a circuit monitoring the power supply, ot from other external source. Internal interrupt:- arises from illegal or erroneous use of instruction or data Internal interrupt are also called traps What is difference b/w RISC and CISC? Reduced Instruction Set Computer ‘Complex Instruction Set computer 1 Relatively few instructions 1A large number of instructions 2. Relatively few addressing mode 2A large variety of addressing modes 3 Fixed length instruction format 3. Variable length instruction format Define parallel processing? Parallel processing is a term used to denote a large class of techniques that are used to provide simultaneous data processing task for the purpose of increasing the computational speed of computer system. A parallel processing. system is able to perform concurrent data processing to achieve faster execution time, What do you mean by Flynn's classification? Flynn’s classification divides computer into four major p: 1. SISD (Single instruction stream, single data stream) 2.SIMD (Single instruction stream, multiple data stream) 3.MISD (Multiple instruction stream, single data stream) 4. MIMD (Multiple instruction stream, multiple data stream) Define Pipelining? What are the types of pipelining? Pipelining i a technique of decomposing a sequential process into ub operations, with each sub process being executed in a special dedicated segment that operate concurrently with all other segments, ‘Two types of pipelining:- 1 Arithmetic Pipeline 2 Instruction PipelineQ28 Ans 0297 As oy? Als Q3i Ans Q32 Ans 33 3. ae Q36 Ans Q37 Ans as 4 Define arithmetic and instruction pipelining? Aulinmetic pipeline divides an arithmetic operation into sub operations for execution in the pipeline segments paces orane paline operates on a stream of instructions by overlapping the fetch, decode and execute phases of the instruction cycle, " What are the difficulties in instruction pipelining? 1 Resource conflicts, 2 Data dependency. 3 Branch difficulties arise from branch and other instruction that change the value of PC. Define memory interleaving? In memory interleaving memory is divided into module. Each module has irs own address register (AR) ‘ter (DR).In memory interleaving different sets of addsences re assigned to different memory Explain Supercomputers? A commercial computer with vector instructions and Pipelined floating point arithmetic operations is referred {o as a supercomputer. Supercomputer are very powerful » high performance used mostly for scientific computations. Define array Processor? How many types of array processor? ‘An array processor is a processor that performs computations on large array of data ‘Two types of array processor host computer in specific numerical computation task, ruction multiple-data organization, Define cache memory? A special very high speed memory called cache memory is sometimes used to increase the speed of Pineessing by making current programs and data available to the CPU at a rapid rate. It is placed between CPU and memory. ‘What do you mean by locality of reference? : Analysis of a large number of typical programs has shown that the references to memory at any given interval of time tend to be confined within a few localized areas in memory. This phenomenon is known as the property of locality of reference. Define hit ratio? ; The performance of cache memory is frequently measured in term of hit ratio. When the CPU refers to memory and finds the word in cache ,it is said to produce @ hit. Ifthe word is not found in cache, it counts a8 a miss. The ratio of the number of hits divided by a total CPU references to memory (hits plus misses) is the hit rat Define mapping? How many types of mapping? Thetransfomnation of daw bor sen memory to cache memory is referred to as a mapping process. Three types of mapping process 1 Associative mapping 2 Direct mapping 3 Set-Associative mapping. How many types of RAM? Two types of RAM : ‘SRAM (Static RAM):-consists essentially of internal fi DRAM (Dynamic RAM): capacitors, {flops that store the binary information. a stores the binary information in the form of electric charges applied5 Q38 What is ROM? Why itis called volatile memory? Ans ROM is an acronym for read only memory. It refers to computer memory chips containing permanent of semi-permanent data. ROM is non volatile memory: even after you tur off your compute, the contents of will remain, 039 Define Auxiliary or Secondary memory memory? Ans The most common auxiliary memory devices used in computer system are magnetic disks and tapes. They are used for storing system programs , large data files and other backup information. 040 Define address space and memory space? ‘Ans An address used by the programmer will be called a virtual address, and the set of such addresses the address space. ‘An address in main memory is called a location or physical address. The set of such locations is called the ‘memory space. Q41 What do you mean by tightly coupled multiprocessor? ‘Ans In tightly coupled system there is global common memory that all CPU can access. Information can therefore be shared among the CPUs by placing it in the common global memory. 42 What do you mean by loosely coupled system? Ans In loosely coupled system each processor has its own private local memory. The processor are tied together by a switching scheme designed to route information from one processor to another through a message passing scheme, 9437 What do you mean by DMA? ‘Ans Removing the CPU from the path and letting the peripheral device manage the memory buses directly ‘would improve the speed of transfer. This transfer technique is called direct memory access (DMA). During DMA the CPU is idle and has no control of the memory buses. Qh What do you mean by BR and BG? Ais BR: Bus Request input is used by the DMA controller to request the CPU to relinquish contro! of the buses. 18G:- Bus Grant output to inform the external DMA that the buses are in the high impedance state, Q4S_— What do you mean by IOP? : ‘Ans IOP: Input-output processor may be classified as a processor with direct memory access capability that communicates with /O device. In this configuration, the computer system can be divided into a memory unit, and a number of processors comprised of the CPU and one or more IOP. Q46 What do you mean by full-duplex and half-duples | Ans Full-duplex: Full duplex transmission can send and receive data in both directions simultaneously. Half-duptex: Half duplex transmission system is one that is capable of transmitting in both directions but data can transmitted in only one direction at a time. Q47* How many modes of transfer? Ans ‘Three modes of transfer:- 1 Programmed YO Mode 2 Interrupt-initiated VO Mode 3 Direct Memory Access (DMA) 48° What do you mean by interrupt initiated /O mode? Ms y y pt init ? Se 7 the Ahs Interrupt-initiated /O mode: This mode use interrupt facility and Fe eae aes interface to issue an interrupt request signal when the data are available fro By the CPU can proceed to execute another program. 4 Q49 What do you mean by software interrupt? : ‘ a pee Ans Software inert in initiated by executing an instruction. Software interrupt is a special a irate that behaves like an interrupt rather than a subroutine call. It can be used by the program tae interrupt procedure at any desired point in the program. eog Ans 53, Alls Osa Ans ae 4 Q57 Ans 5s fe Qs9 Ans re Q61 Ans 62 Ans Define subroutine call? : A subroutine call is self contained sequence of instructions that performs a given computational task. During the execution of a proj ‘broutine may points inthe main progrant era & Subroutine may be called to perform its function many times at various Define debuggers? Debeeeer necez0rs in the program Debugger aids in testing and debugging (removing eror) the program. Beer are used to see the flow control of program, execution sequencing, break points and tracing. Define SPEC Benchmarks? The Standard Performance Evolution Corporation (SPEC) is @ non profit corporation formed to establish, maintain and endorse a standardized set of rel “ iain ed endo asad levant bench marks that can applied to newer generation of Define LINPACK Benchmark? Te ea enchmark is derived from areal application that originated asa collection of near algebra aeeroated in annacmented in FORTRAN. These benchmark tests floating point performance and results are Presented in mflops (millions of floating point instructions per second) Define DURYSTONE benchmark? ‘The DHRYSTONE bench mark is used to test performance factors important in non-numeric system programming like operating system, compilers, word processor etc. Define WHETSTONE benchmark? WHETSTONE benchmark are synthetic benchmark used to test compiler optimization and floating point performance. The whetstone benchmark is used to measure computer performance and is designed to simulate floating point numerical applic: How many types of Benchmarks? According to applications the benchmark program are classified as:- 1 Desktop benchmark 2 Server benchmark 3 Embedded benchmark Define Transaction processing benchmark? It is used to measure the ability of the system to handle transaction. It is an example of server benchmark. In the mid 1980s a group of concerned engineers formed the vendors Define the term word length? : ‘The number of bits that a digital computer can process in parallel ata time is called its word length. What is a Microprocessor? i teste i The tnieroprocerser is a clock driven semi-conductor device consisting of electronic logic circuits manufactured by using either a large scale integration or VLSI technique Define bit, byte, word, double word, quad word and instruction? Bitis an abbreviation for term binary digit i.e. 0 and 1. Byte is collection of 8-bits. Word is collection of 16-bits. 4 Quad word is coltetion 64-bis, ble word is collection of 32-bits. ‘ Instruction is collection of several words, consisting of several bit pattems Name 16 bit registers of 8085? Stack pointer, program counter, registers pair B-C,D-E and H-L. ‘What determines that Microprocessor is an 8, 16 or 32 bit? The data bus carrying capacity of data bus determines63 Ans 964 Ans 66 Ans Q67 Ans 68 Ans 69, Ans Qro Ans Qn Ans Q73 Ans 7 Give the function of ALE signal in 8085? Its address latch enable. It goes high for first clock cyele and enables lower 8 bit either into memory or external latch. ts of address to be latched Give the function of IO/M signal in 8085? [t's a status signal which distinguishes whether the address is for memory or V/O. when it goes high address is for VO devices, and when low address is for memory. Explain the difference between the machine language and the assembly language? Each machine has its own set of instructions based on the design of its CPU or of it microprocessor to communicate with computer one must give instructions in binary language known as machine language. Because it is difficult for most people to write programs in set's of 0's and 1's computer manufacturers have devised English like words to represent binary instructions of the machine, programmers can write programs called assembly language programs using these words. ‘What is an assembler? The assembler is a program that translates source code for mnemonics into the binary code, card object code, of the microprocessor and generates the file called object file ‘What is a bus? Why is the data bus bidirectional? ‘The bus is a group of line/wires used to perform various operations. There are three kinds of buses address ba, contol bus and data bus. Data bu: rectional because it transfers the data from and to memory and CPU, Explain following signals of 8085? 1) HOLD 2) HLDA HOLD indicates that another device is requesting the use of address and data bus. After receiving this request microprocessor leaves the use of buses as soon as machine cycle is completed. Processor regains the control of buses after removal of HOLD signal. HILDA it's a signal for HOLD acknowledgement means HOLD request have been received. ‘What are the functions of SID and SOD pins in 8085? SID: Its data line for serial input. The data on this line is loaded into the 7® bit of accumulator when RIM instruction is executed. SOD: Its data line for serial output, The instruction is executed. 7 bit of accumulator is outputted on Sod line when SIM tiate between PUSH and POP? Explain stack and stack pointer? Different : ithe R/W memory that is used for temporary storage of binary Stack is group of memory locations in information during the execution of a program. Stack pointer is used to hold memory addresses it points to @ memo stack, xy location in R/W memory called PUSH: it is used to push the contents of register pair to stack. POP : it is used to pop the contents of register pair which was saved ftom the stack. Define the term Handshaking? Handshaking is the terminology used, that accounts the acknowledgement of the received request. In HOLD and HLDA are the two pins of 8085 that shows the concept of handshaking. Explain the instruction HLT and NOP? HLT is used to Halt the program which stops the ex No operation is performed when this flags remain unaffected. ecution of current program. culimotion is executed. The registers and Differentiate between compiler and interpreter? ‘Compiler converts the whole program from high Whereas interpreter converts it line by line. revel language to machine level language once = & timeQ74 Ans ors Ans Ons Ans Q77 Ai QB Ans 79 Ans” 80. An” a2 Ans O83 Ais Q84 Ans Q8s Ans Q86 Ans Name any two 2-byte instruction, (I) MVI Bog, 22% instruction.2 06,05; @ INO DBO1; List applications of Microprocessor Interfacing seanned multiplexed displays and liquid Interfacing a matrix keyboard, 0 erystal displays, Memory design, Designing of single board microcomputer, Development and trouble shooting tools Explain 82512 mable communication int. 8251 is programs ferface is used for serial data transmission, It is Universal Synchronous/Asynchronous Receiver/Transt *mitter(USART).It is compatible with 8085,8086,8088, Explain 82552 A programmable peripheral interface (PPI) is a multi por device-This device is useful for interfacing Peripheral devices. It has three 8-bit por, namely Por A, Port B and Pon C. Define SIMD? SIMD (Single instruction stream, multiple data stream) represents an ‘organization that includes many Processing units under the supervision of a common control urit, Define MIMD? MIMD (Multiple instruction stream, Multiple data stream) organization refers to a computer system capable of processing several programs at the same time. Most multiprocessor and muli-computer systems can be classified in this category. Define SISD? ‘ SISD (Single instruction stream, single data stream) SISD represents the organi containing a control unit, a processor unit , and a memory unit. tion of a single computer: Define Paging? : Paging. is memory management scheme in which the logical or virtual address space of a program is divided into equal sized pages and the physical memory is also divided into sized page frames or blocks. Define virtual memory? Virtual memory ie part of any main or secondary memory. Virtual memory is a memory management scheme where only a portion of the virtual adress space of a reside: process may actly be longed into main memory .The main advantage of virtual memory is that it can also execute such program are greater than the capacity of the available physical memory. Give names of page replacement algorithms? 1 FIFO (Fitst-in First-out) 2 LRU (Least recently Used) 3. Optimal algorithm. ‘ i it ‘2048 bytes? How many 128 * § RAM chips are needed to provide a memory capacity of 2048 byt 2048/128=16. f memory? How many of these How many lines of the address bus must be used to access 2048 bytes of m = ee aa ed to access 2048 bytes of memory and 7 lines are comm 11 lines of the address bus must be us chips. ce . iter needs 2K bytes of l, 4 loys RAM chips of 256 * 8 and ROM 1024 * ® ‘The comput computer employs ips ROM 10 4K bytes of ROM? How many RAM and ROM chi eed RAM chips: 2*1024/256=8 chips are reqQ87 Ans 88 Ans 989 Ans Q90 Ans Qo Ans Q92 Ans 3 Ans. Q94 Ans Q95 Ans ROM chips: 4s Psi- 41 1024/1024-4 chips are required : How many types of ROM? Three types of ROMS 1 PROM (Programmable rea 2 EPROM (Erasable PROM) fa 3 EEPROM (Electrically erasable PROM) Add 6 and -13 usin, 6 00000110 “13 1110011 +7 11111001 : '8 2's complement? Define overflow? When two numbers of n digit hen tw “BIS cach are added and the sum occupies n+1 digit, we say that an overflow Convert octal 127543 into hexadecimal? 1 2 7 5 10) tht pr_sgo_oty, a Flee cs AFOS. If X= 1010100 and Y= 1000011 then perform X-¥ using 2's complements? X 1010100 2'scomplement of Y 0111101 Sum — 10010001 Discard end carry Answer: X-Y 0010001 If X= 1010100 and Y= 1000011 then perform Y-X using 2's complements? Y 1000011 ‘complement of X 0101100 Sum 1101111 There is no carry ‘Answer: Y-X 0010001 2's complement of Sum 4 2 How we can represent -14 with eight bits using signed-2's complement representation? 14 1 0001110 1’s complements of 14 1. 10001 2's complements of -14 Lid Pewee bit condition in the CPU is sometimes called PSW. jon of all status e CPU is somet FS is sto ‘State of the CPU fious ii but petite data dependency? lepends on the result ofthe previous instruction, but ata dependency conflicts arises wl this result is not yet available. hen an instruction d10 oer st a Feet 75 aN O6e75 ‘oo ? slo — zit 1375 + Io 2 oft ee 0.750 2 — 15000 2 — 10000 i 0001 omnia | 46875-10001 9 (97 Define operation code? Ans The operation code of an instruction i a complement and shit 2700p of bis that define uch operations as ad, subtract, multiply, 098 Multiply 23 and 197 as M01 010 99 Whatisthe hardware implementation for muliply operation? a D [Seometaneso Orga Conger ae ped ee sitet Sj ‘ 0 Oregister_ Cie erhel m3y ' cra amoral rel a AUN Ethie ncn oF READY sil of 85. rady toast gh is ey. CR {oeEsetby the microprocessor to sense WHR TEP READY i Somectad to a microprocessor throvsh MP wait tit goes HIGH.4} Nba. —Neunaann _Ozebidecliat to Iransel na tha linech at ve i Conbeal faureeayirg On — | Rs mee saa ‘TXa cite ad SR nn meee eee Be tusalada. Ayaka “Aide Bak je ees nse digits [exemple pSterrva.. . Cessignanenk — 82 O.4 i = 20g: ocTA) 48 | orrnuc ug? (36s)9__fi = 0340; ¢| Di 4o_|o,4 oat (MP) Jo. 2240" Hexa, 123 intamls 46 ape teem | y XV| [ete Le = — Rolino-) 1408354 : Someta» 6Date. @ Logic hein Ae — bods 2+ can jecaeael tnanol reine ot ervilael —_durid + Gn. nile 2melo- ds Ga An, ted bia inela wi a SSD — oe jasDate. Topic.Date y h . —