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Exp 9 Shubh

The document describes an experiment to simulate CMOS NAND and NOR gates using the Symica tool. It provides the theory of CMOS inverters and how NAND and NOR gates are constructed using combinations of PMOS and NMOS transistors. Circuit diagrams and truth tables of the NAND and NOR gates are presented. The experiment resulted in successfully implementing and observing the output waveforms of CMOS NAND and NOR gates on the simulator.

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Silkie Agarwal
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96 views3 pages

Exp 9 Shubh

The document describes an experiment to simulate CMOS NAND and NOR gates using the Symica tool. It provides the theory of CMOS inverters and how NAND and NOR gates are constructed using combinations of PMOS and NMOS transistors. Circuit diagrams and truth tables of the NAND and NOR gates are presented. The experiment resulted in successfully implementing and observing the output waveforms of CMOS NAND and NOR gates on the simulator.

Uploaded by

Silkie Agarwal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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28/03/2023 Experiment No.

9
Aim: To design and simulate CMOS NAND and NOR using Symica Tool.
Software Used: Symica Simulator.

Theory:
The basic structure of a Complementary Metal oxide semiconductor inverter consists of an
n-MOS transistor and p-MOS transistor as a load and the gates of the two transistors are
shorted at the input and the drains of the two transistors are also shorted where the output is
obtained.
NAND denotes NOT-AND. a CMOS two-input NAND gate. P-channel transistors Q1 and Q2
are connected in parallel between +V and the output terminal. N-channel transistors Q3 and
Q4 are connected in series between the output terminal and ground.
a CMOS two-input NOR gate. P-channel transistors Q1 and Q2 are connected in series
between +V and the output terminal. N-channel transistors Q3 and Q4 are connected in
parallel between the output and ground.

Truth Table of NAND and NOR Gate:

Circuit Diagram of NAND:


Circuit Diagram of NOR Gate:

Circuit Diagram of NAND Gate:

Circuit Diagram of NOR Gate:


Output waveform:
NAND output:

NOR output:

Result: NAND and NOR Gate has been implement using CMOS on simulator.

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