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SEM IV - COA - CE - Syllabus

The document outlines the syllabus for a Computer Organization and Architecture course. It includes 10 units covering topics like data representation, basic computer design, CPU, and I/O organization. Evaluation includes tests for each of the 4 lectures that make up the course, with each test worth 25 marks and covering 20-30% of the syllabus.

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0% found this document useful (0 votes)
62 views2 pages

SEM IV - COA - CE - Syllabus

The document outlines the syllabus for a Computer Organization and Architecture course. It includes 10 units covering topics like data representation, basic computer design, CPU, and I/O organization. Evaluation includes tests for each of the 4 lectures that make up the course, with each test worth 25 marks and covering 20-30% of the syllabus.

Uploaded by

Sk Sk
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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LOK JAGRUTI UNIVERSITY (LJU)

INSTITUTE OF ENGINEERING & TECHNOLOGY


Department of Computer Engineering (701)
Bachelor of Technology (B.E.) – Semester - IV
Course Code: 017013493
Course Name:
Computer Organization & Teaching Scheme
Architecture Lecture (L) Tutorial (T) Practical (P) Credit Total Hours
Category of Course: Professional Core Course (PCC)
Prerequisite Course: Digital Electronics (017013391) 4 1 0 5 50

Syllabus
Unit Teaching
Topic Prerequisite Topic Post requisite Topic
No. Hours
Data Representation 2
01 1.1 Fixed Point Representation ----- ----- (02%)
1.2 Floating Point Representation ----- -----
Register Transfer and Micro-operations
2.1 Register Transfer Language -----
Microprocessor-8086 5
Multiplexers, Decoders (017013391- (10%)
02 2.2 Bus and Memory Transfers (017013501- Unit-2.1,2.2,2.3)
Unit-6.1,6.2)
2.3 Arithmetic, Logic and Shift Micro-operations Binary Arithmetic and logical operations -----
(017013391- Unit-2.1, 2.2), Adders
2.4 Arithmetic Logical Shift Unit -----
(017013391-Unit-5.2, 5.3, 5.4)
Basic Computer Organization
3.1 Instruction Codes, Computer Registers ----- -----
3.2 Computer Instructions ----- ----- 6
03 3.3 Instruction Cycle (12%)
Computer Registers (017013493 - Unit-
3.4 Timing and Control 3.1), Computer Instructions (017013493 - -----
Unit-3.2)
Basic Computer Design
4.1 Memory and Register-Reference Instructions ----- 4
04 4.2 Input-Output Instructions ----- (08%)
Microprocessor8086
4.3 Interrupt Cycle
(017013501-Unit-5.2)
Programming the Basic Computer
Microprocessor-8086
5.1 Machine Language, Assembly Language -----
(017013501-Unit-3.1)
5.2 Assembler, First Pass, Second Pass Assembly Language (017013493 - Unit- ----- 8
05 5.3 Program Loops 5.1) ----- (18%)
Assembly Language (017013493 - Unit-
5.4 Subroutines 5.1), Program Loops (017013493 - Unit- -----
5.3)
5.5 General Register Organization, Stack Organization
Central Processing Unit
Computer Instructions (017013493 - Unit-
6.1 Instruction Formats, Addressing Modes ----- 8
3.2)
06 (12%)
Computer Instructions (017013493 - Unit-
6.2 Data Transfer and Manipulations, Program Control -----
3.2)
6.3 RISC Computer, CISC Computer ----- -----
Pipeline Processing
7.1 Parallel Processing, Flynn’s classification, Pipelining ----- ----- 5
07 7.2 Arithmetic Pipeline ----- (10%)
7.3 Instruction Pipeline Pipelining (017013493 - Unit-7.1) -----
7.4 RISC Pipeline -----
Computer Arithmetic 2
08 8.1 Integer Numbers: Sign-Magnitude, 1’s complement, (05%)
Binary Arithmetic and logical operations -----
2’s complement
(017013391- Unit-2.1, 2.2)
8.2 Addition and Subtraction -----
Memory Organization
9.1 Multiplication Algorithms (Booth Multiplication
ROM (017013391- Unit-9.1) ----- 6
Algorithm), Division Algorithms
09 (14%)
9.2 Memory Hierarchy, Main Memory, Auxiliary Memory
9.2 Associative Memory ----- -----
9.3 Cache Memory ----- -----
Input-Output Organization 4
10 10.1 Input-Output Interface, Asynchronous Data Transfer ----- ----- (09%)
10.2 Memory Mapped I/O, I/O mapped I/O, Modes of
----- -----
Transfer, Priority Interrupt
Microprocessor-8086
10.3 Direct Memory Access (DMA) -----
(017013501-Unit-8.1)

Proposed Theory + Practical Evaluation Scheme by Academicians


(% Weightage Category Wise and it’s Marks Distribution)

L: 4 T: 1 P: 0
Note: In Theory Group, Total 4 Test (T1+T2+T3+T4) will be conducted for each subject.
Each Test will be of 25 Marks.
Each Test Syllabus Weightage: Range should be 20% - 30%
Total
Group (Theory or Group (Theory or
Subject Category % Weightage Marks Weightage
Practical) Practical) Credit
Credit
Theory MCQ 45% 45
Theory Theory Descriptive 15% 15
5
Theory Formulas and Derivation 0% 0
Theory Numerical 40% 40

Expected Theory % 100% Calculated Theory % 100% 100


5
Practical Individual Project 0% 0
Practical Group Project 0% 0
Practical 0 Internal Practical Evaluation (IPE) 0% 0
Practical Viva 0% 0
Practical Seminar 0% 0

Expected Practical % 0% Calculated Practical % 00% 00

Overall % 100% 100% 100

Course Outcome
1 To gain the knowledge about the basic building blocks of the micro-computer
2 To understand the various units of computer system.
3 To write simple programs in assembly language and also understand the instruction set.
4 Analyze the organization of memory and understand the basics of I/O.
Suggested Reference Books
1 M. Morris Mano, Computer System Architecture, Pearson
2 M. Morris Mano, Digital Logic and Computer Design, PHI
3 Andrew S. Tanenbaum and Todd Austin, Structured Computer Organization, Sixth Edition, PHI
4 M. Murdocca & V. Heuring, Computer Architecture & Organization, WILEY
5 John Hayes, Computer Architecture and Organization, McGrawHill

List of Open Source Software/Learning website


1 https://onlinecourses.nptel.ac.in/noc21_cs61/preview
2 web.stanford.edu/class/ee282/

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