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Determining the possible minimal Boolean expressions via a newly developed

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 IEEE - 35239

DETERMINING THE POSSIBLE MINIMAL BOOLEAN EXPRESSIONS VIA A NEWLY

DEVELOPED PROCEDURE AND TOOL

A. Ahmad 1, D. Ruelens 2, S. Ahmad 3, L. Pathuri 1

1
Department of Electrical and Computer Engineering,
College of Engineering, Sultan Qaboos University, Muscat, Sultanate of Oman
2
Johnson & Johnson, Diestsesteenweg 47, 3540 Herk-de-Stad, Belgium
3
Department of Electrical and Computer Engineering,
Cockrell School of Engineering, University of Texas at Austin, USA

ABSTRACT form in turn saves cost, dissipated power and silicon area.
Further, a design of digital logic circuit with simplified
This paper proposes a new idea and implementation tool for Boolean expression adds more attributes to the design like
two level minimization of Boolean expressions. A simpler more reliable, less Mean Time To Repair (MTTR), less
and more versatile method is developed by exploiting the Mean Time To Failure (MTTF), more testable, lighter in
adjacency field relationships between Gray code and weight, faster in speed, more sustainable and enhanced
decimal numbers. Our algorithmic procedures also consider product life [7], [8].
the optimal use of don’t care terms. We implemented our To overcome the difficulties of minimizing Boolean
algorithm in MATLAB and tested accuracy and efficiency expression via Boolean algebra and theorems, Maurice
for large values of input variables (more than 25). This Karnaugh in 1953 [9], presented the Karnaugh map, also
developed novel technique is bound to provide all possible known as the K-map, is a simpler method to simplify
optimally minimized Boolean expressions. Boolean algebraic expressions as a refinement work of
Edward Veitch's, Veitch diagram concept [10] of Boolean
Index Terms— Boolean Expression, minimization, expression minimization.
minterms, Gray code, adjacency The Karnaugh map reduces the need for extensive
calculations by taking advantage of humans' pattern-
1. RELATED WORK ON MINIMIZATION OF recognition capability. It also permits the rapid identification
BOOLEAN FUNCTION and elimination of potential race conditions. About 20 years
after the invention of K-map, McCluskey in 1956 wrote
The mathematics of logical expressions, introduced by another famous paper [11] as part of his doctoral thesis
George Boole [1], [2] during 1847-1854, which is known while at Massachusetts Institute of Technology in the
today as Boolean algebra. Boolean algebra is the first step in electrical engineering field. His paper was related to
design of digital logic circuits. Also, in the same year 1847 simplifying Boolean expressions and he proposed an
De Morgan explained in a letter to George Boole, to develop algorithm which is still the standard for the exact Boolean
"mechanical modes of making transitions” and that is known minimizations. The algorithm is called Quine-McCluskey to
as De Morgan’s Theorem [3], [4]. reflect the previous work of Quine carried out in 1952 and
In 1938, Claude E. Shannon], the American 1955 to obtain a minimum solution [12], [13]. The algorithm
mathematician and electrical engineer whose master’s thesis is capable of simplifying a Boolean logical expression to
work [5], [6] in electrical engineering at the Massachusetts obtain a minimal possible Sum Of Products (SOP).
Institute of Technology played a key role in building the Quine-McCluskey method opened a way for devising
circuitries of computers and subsequently to uncounted other algorithmic way of finding minimal Boolean expressions and
related applications which are embedded in modern since then many computer programs are in existence for the
technology for the benefits of developed society. use of simplification of Boolean expressions. Some of these
By applying the theorems and rules of Boolean algebra are: Espresso was developed at IBM by Robert Brayton.
which are simple and straight-forward, and can be applied to Richard Rudell later published the variant Espresso-MV in
any logical expression for its reduction. Converting a 1986 under the title ‘Multiple-Valued Logic Minimization
complex digital logic expressions into its simplest possible for PLA Synthesis’ [14]. The software Espresso was later

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July 13 - 15, 2015, Denton, U.S.A
 IEEE - 35239

modified as ‘Minilog’ and ‘Logic Friday’ [15]. There exists Derivation of Boolean expressions from truth tables can
enormous programming tools in literature, which are used be represented in standard forms as Sum of Products (SOP)
for obtaining minimal Boolean expression. Some of these and Product of Sums (POS) using minterms and maxterms
are worth to name here to provide the sequential knowledge respectively.
to the readers these are: BOOM II [16] and Quantum
Espresso [17], [18]. Definition 3:
In sequence this paper also moves a step forward in the A minterm is represented by the symbol mj, where the
direction of developing software tool to obtain minimal subscript j is the decimal equivalent of the minterm In a truth
Boolean expression. The developed tool is capable of table for a Boolean function, we can write a sum of
providing all possible minimal SOP which is the main minterms expression just by picking out the rows of the table
drawbacks of majority of the available software tools. The where the function output is 1.
developed tool also considers don’t care conditions which We can write the function by symbols of minterms
are not considered by majority of the available software instead of product terms. For example, the function F in the
tools for minimizing Boolean expression. above truth table (Table 1) could be written as:
F(a, b) = a’b + ab’ (1)
2. SOME TERMINOLOGY OF DIGITAL LOGIC
Or, by symbols of minterms as
Digital Logical functions can be expressed in several
F(a, b) = Σ (m1, m2) = Σ (1, 2) (2)
ways:
 Truth table, Definition 3:
 Boolean expressions and A maxterm is represented by the symbol Mk, where the
 Graphical form (Logic Diagram). subscript k is the decimal equivalent of the maxterm. a
A simple and optimal digital logic design process involves: product of maxterms expression by picking out the rows of
 Problem specification, the table where the function output is 0.
 Truth table formation, We can write the function by symbols of maxterms
 Derivation of Boolean expression, instead of product terms. For example, the function F in the
 Simplification of Boolean expression and above truth table (Table 1) could be written as:
 Implementation of simplified Boolean expression F(a, b) = (a + b) (a’ + b’) (3)
considering the required attributes towards an
optimal solution. Or by symbols of maxterms as:
F(X, Y) = ∏ (M0, M3) = ∏ (0, 3) (4)
2.1. Terminology
Definition 4:
Definition 1: Sum of Products (SOP) is more common form of
An input variable in a Boolean function appears as representing Boolean expression. The expressions are
a literal and is either in its un-complemented form or represented as AND logic (products) feeding a single OR
otherwise complemented form. Thus, for an input variable x, logic (sum).
both x and x’ are literals. We write an AND term for each input combination that
Definition 2: produces a 1 as output. We write the input variable in its un-
A truth table demonstrates the relationships between the complemented form if its value is 1 and complemented form
inputs and outputs of a combinational digital logic circuit. It otherwise. Refer to Equations 1 and 2.
lists the outputs for all possible input combinations. Definition 5:
Remember that the number of combinations for n-variables Product of Sums (POS) is an alternate form of
is 2n. Table 1, demonstrates the truth table for a 2-input representing Boolean expression. The expressions are
XOR gate. represented as OR logic (sums) feeding a single AND logic
TABLE 1
(product).
TRUTH TABLE A 2-INPUT XOR GATE We write an OR term for each input combination that
Inputs Output produces a 0 as output. We write the input variable in its un-
a b F complemented form if its value is 0 and complemented form
0 0 0
otherwise. Refer to Equations 1 and 2.
Definition 6:
0 1 1
A POS form is Dual of the SOP form representation of
1 0 1
a Boolean expression. In Dual operation a 0 changes to 1,
1 1 0
sum changes to product and vice-versa respectively.

6th ICCCNT - 2015

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 IEEE - 35239

Definition 7:
A Boolean expression is said to be in canonical or
standard form if each term of the expression contains all
available input variable.
As an example let us consider a Boolean logic function 000 001 011 010 110 111 101 100
(F) with 2-input variables (a, b) defined as 000
0 1 3 2 6 7 5 4
F(a, b) = a (5) 001
8 9 11 10 14 15 13 12
Then its equivalent canonical form is given as below. 011
24 25 27 26 30 31 29 28
F(a, b) = ab' + ab (6) 010
16 17 19 18 22 23 21 20
110
Definition 8: 48 49 51 50 54 55 53 52
111
Prime Implicant is the list of minterm/s which cannot be 56 57 59 58 62 63 61 60
combined with any other list of minterm/s. 101
40 41 43 42 46 47 45 44
100
3. PRELIMINARIES OF OUR APPROACH 32 33 35 34 38 39 37 36
Figure 1: K-map of 6 variables
In our approach for minimizing Boolean expression is in
principle of K-map concept. There are several different
formats that are used to construct K-map for large number of
input variables. The two most commonly used forms are:
 Reflection map and
 Overlay map.
Reflection map that uses Gray code numbering of
Karnaugh Map is easier to transcript in any programming.
Since, the top of the map is numbered in full Gray code
where adjacent addresses have only one bit change between
themselves. Therefore, it is easier to track the adjacency in
the vertical and horizontal directions and members of two
positions can be grouped, if possible, as between them only
one input variable is changing.
In previous research works [19] – [21], algorithmic
ways have been devised to generate efficiently the Gray
code for large orders, special Gray codes and their
properties. The theorem below relates the minterms and
Gray code and provide extensive help in constructing the K- Figure 2: K-map of 8 variables
maps for large number of input variables n. By using this
procedure samples of K-maps for n = 6 and n = 8 are shown
in Figures 1 and Figure 2 respectively.

Theorem 1:
G (n) is a matrix of order 2n x n in binary format of n bit
forming 2n min-terms of n variables. By analyzing the
patterns we reach to the conclusion that G(n) can be
obtained first by writing the min-terms of G(n-1) then
appending the min terms by advancing each of the minterms
starting from the last to the first by a value of 2n-1. Figure 3: F(x,y,z) = ∑(1, 3, 5); d(x,y,z) = ∑(2,4)
In our work [19] we developed an algorithmic
procedures for relating the decimal and Gray coded numbers Based on this approach of field location matching we
in terms of their field locations. How these locations are developed an algorithm to find all possible minimal
appearing when we differentiate between the Gray coded solutions of a given Boolean function. The procedures
locations and decimal locations. Figures 3 and 4 adapted in the developed algorithm is enumerated in ensuing
demonstrates the field locations for n = 3 and n = 4 section.
respectively.

6th ICCCNT - 2015

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 IEEE - 35239

Example 1:
Figure 5 demonstrates the results of each steps of our
developed program for a Boolean expression as:
F(a,b,c,d) = ∑1,3,7,11,15; D(a,b,c,d) = ∑0,2,5

Figure 4: F(x,y,z) = ∑(1,3,7,11,15); d(x,y,z)= ∑(0,2,5)

4. MINIMIZATION PROCEDURE AND

SIMULATION RUNS

Input:
Minterms, don’t cares and the number of input variables.
Step 1:
Decode the Gray code array of values of minterms and don’t
cares values.
Step 2:
Arrange the elements of the decoded array in ascending
order.
Step 3:
Count the number of elements in the array.
Step 4:
Find fields (adjacent minterms)
a. Check for duplets in vertical adjacency for the minterms
b. Check for horizontal adjacency
c. Add third dimension to the minterms matrix to keep
track of which minterms already belong to a larger field. Figure 5: Stepwise simulation run results
Step 5:
Purge the list of minterms from minterms that already belong We verified our simulation runs for the large number
to a larger. Boolean functions which are available in the literature.
Step 6: Figure 6 depicts the results of the simulation runs
Find SOP expression for the fields.
Step 7:
Find SOP expression for the fields.
Step 8:
Find all possible Boolean equations that are equivalent to
the sum of the minterms.
Step 9:
Find the minterms covered in each combination, if a
combination covers all minterms it is a solution.
Step 10:
Purge solutions that cover more fields than necessary
Step 11:
Display the possible solutions in form of SOP

We translated the above algorithmic procedure in

MATLAB language. To elaborate the procedure we present
the stepwise simulation result as an example.
Figure 6: Verified simulation run results

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 IEEE - 35239

5. CONCLUSION This tool is added in suits of our developed teaching

and research tools like the mentioned in the papers [22] -
For obtaining minimal Boolean expressions, search of [33].
logical adjacencies is the basis of any proposed powerful
methods. However, in general the available procedures 6. ACKNOWLEDGEMENT
minimizing Boolean expression are silent on either don’t
care considerations or obtaining the all possible minimal The authors would like to express their great
solutions. Here in our approach we consider both, the don’t appreciations and gratitude to Sultan Qaboos University,
care conditions and obtaining all possible solutions. Sultanate of Oman for providing research facilities, technical
We have run the tool for Boolean expressions contain large supports and research environment.
number of input variables (n) up to 28 on our personal
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