Navigation - Speedlog - SRD-331
Navigation - Speedlog - SRD-331
3267B
SWBS Number ~426
SWBS Element Title lElectrica1 Navigation Systems -.-.---i
Part / Sub-Part El
CI Functional Description
ESWBS Code
Remarks
,-
Thursday, February 12,1998
CHANGERECORD
P
(FRAM ORIGINAL. INCLUDES MANUFACTURER’S CHANGES 1, 2, and3)
* 4
Signature of
Change No. Date Title And/Or Brief Description Validating Officer
.
:
CHANGE 1
TABLE OF CONTENTS
CHANGE1 i
TABLE OF CONTENTS-(Continued)
ii CHANGE1
TABLE OF CONTENTS-(Continued)
LIST OF ILLUSTRATIONS
Figure Title
iii
LIST OF ILLUSTRATIONS (Continued)
LIST OF TABLES
2-1 SRD-331M Doppler Speed Log, Controls and Indicators ...... 2-4
,-
iv CHANGE3
DISPLAY UNIT
‘4
ELECTRONICS UNIT TRANSDUCER ASSEMBLY
(Blank)/l-0
SECTION 1
DESCRIPTION
P.H
1.1 GENERAL DESCRIPTION
The SRD-331M Doppler Speed Log, shown in Figure l-l, is a
compact solid-state microprocessor-controlled system for determining
ship's speed and distance traveled. This equipment utilizes the
principle of doppler-shifted sound waves to determine ship's speed
relative to the water. The sensing signals are high frequency sound
pulses which are transmitted from a Transducer mounted through a hull
penetrator. The Transducer contains two transmitter/receiver windows.
One window transmits and receives signals in the forward direction;
the other window transmits and receives signals in the aft direction.
Th e system operates by transmitting a series of short dura-
tion pulses and detecting the return echo from the water during the
time betwee n transmissions. The return echo signals are doppler-
shifted in frequency from the transmitted signal by an amount which is
proportiona 1 to ship's speed, direction of motion, and signal trans
mission ang le with respect to ship's motion vector. The resultant
return sign .als are amplified and app1ie.d through appropriate signal
processing circuits to a microprocessor which performs calculations to
'determine t ,he fore/aft speed vector of the doppler-shifted return
signals.
The use of two transmitter/receiver windows transmitting in
P opposite directions'allows
mined independent of dynamic
the average
vectors
speed difference
resulting from ship's
to be deter-
pitch or
heave motion. To ensure accuracy of the return signals, a time delay
is allowed after signal transmission before the return signals from
the receiving amplifiers are applied to the frequency counter cir-
cuits. This delay allows the detected received signal to be returned
from undisturbed water outside the ship's boundary layer. In addition
to the return delay function, speed data is averaged over several
transmit/receive cycles to improve accuracy of the calculated speed
value.
1.2 EQUIPMENT DESCRIPTION
The SRD-331M Doppler Speed Log consists of three main units.
These are: the Electronics Unit, the Master Display Unit, and the
Transducer Assembly. In addition to the Master Display Unit, optional
Remote Display Units can be connected to operate with the basic
system. One cable interconnects the Electronics Unit with the
Transducer Assembly. A second cable interconnects the Electronics
Unit with the Master Display Unit. Any optional Remote Display Units
operate using speed data transmitted from the Master Display Unit.
The units and subassemblies which comprise the basic SRD-331M Doppler
Speed Log are listed in Table l-1. The following paragraphs present a
brief description of each main unit.
l-1
1.2.1 ELECTRONICS UNIT
The Electronics Unit is a microprocessor-controlled electro-
nic assembly which contains two identical Radio Frequency (RF)
transmitter, doppler receiver, and amplifier circuits. This unit con-
tains the power supply and regulation circuits which operate from 100,
115, or 230 volts ac, SO/60 Hz ship's power. Power is controlled by a,
relay which is operated by signals .from the,Master Display Unit. An
internal power control switch is provided to allow the Electronics
Unit to be turned on or off during servicing independent of the Master
Display Unit. The power supply and power control functions are con-
tained on three subassemblies (A3, A4, and AS). The transmitter,
receiver, signal processing, control, and I/O functions are contained
on two circuit cards (Al and A2). The synchro speed conversion and
output functions are contained on circuit card A6.
1.2.2 DISPLAY UNITS
The Master and Remote Display Units are nearly identical..
The major difference is that the Master Display Unit contains a bat-
tery backup circuit which retains accumulated distance data for a
minimum period of 30 seconds in the event of a power failure. The
Master Display Unit contains a microprocessor-controlled electronic
assembly. This assembly accepts speed data from the Electronics Unit.
It also calculates distance data. Speed or distance can be displayed
and both are sent to Remote Displays from the Master Display Unit. The
Master Display Unit also provides distance output data in relay clo-
sure format. Each display consists of two major subassemblies mounted
to a cabinet enclosure. One subassembly (A21 contains the power
control relays , power transformer, line filter, and interconnection
terminal board. The other subassembly (Al) contains the power supply
subassembly, display processor, LCD speed/distance-display, and the
thin film panel assembly which comprises the front panel of,the unit.
Back light illumination of the LCD speed/distance display and of the
switch panel is provided by electroluminescent lamp panels.
1.2.3 TRANSDUCER ASSEMBLY
The Transducer Assembly consists of a single axis (fore-aft)
transducer and aZOO-ft (61.0 meter) cable assembly. The transducer
cable terminates with two impedance matching transformers, two
transmit/receive crystal elements, and a plastic transducer lens
.mounted in a glass-filled epoxy housing. The Transducer is encap-
sulated to form an integral assembly with the cable.
1.3 UNITS AND ASSEMBLIES
Table l-l lists the major units and removable subassemblies
contained in a standard Sperry SRD-331M Doppler Speed Log.
1.4 SYSTEM SPECIFICATIONS
Table l-2 lists the general data that pertains to the
SRD-331M Doppler Speed Log system.
l-2
.b
Table l-1. Units and Assemblies of Sperry
SRD-331M Doppler Speed Log System
P!
Reference Sperry
Name Designation Part Number
l-3
Table l-l. Units and Assemblies of Sperry
SRD-331M Doppler Speed Log System -(Continued)
Reference Sperry
Name Designation Part Number
Zap, Sea Chest .1885762
Clamp, Transducer 1855202
Parts Kit, Onboard Spares a 1807773-l,-2
Parts Kit, Transducer Replacement atb 1806367
Parts Kit, Standard Spare Parts a 1806363
Installation Drawings 1976888
Note 1: Optional Remote Display Units may be used with the SRD-331M
System. Part numbers for the Remote Display Units are the
same as for the Master Display Unit except that the suffix
for variable part numbers is -2 instead of -1 or -0.
Note 2: For a replacement part order kit 1806367, see b below.
1-4
Table 1-2. General Data for SRD-331M
Doppler Speed Log
ELECTRICAL DATA
Input Power: 40 volt-amperes
Volts: Taps for nominal voltages of 100
volts, 115 volts, and 230 volts
+lo% -15%
Frequency: '(Factory wired for 115 VAC1
50 - 60 hertz single phase 25%
SYSTEM SPECIFICATIONS
Operating Depth: Requires 6-foot bottom clearance
Speed Range: 0 - 50 knots in O.l-knot increments
(Ahead or Astern)
Speed Accuracy: Actual speed within 1% of indicated
speed 20.1 knot _,
Distance Range, Display: 9999.9 nautical miles
Distance Accuracy, Display: Actual distance within 1% of indi-
cated distance based on speed
through the water
Speed/Distance Display: Digital (liquid crystal display)
Remote Displays: Maximum of 6 can be supplied by Mas-
ter Display Unit (additional remotes
may be driven from remote displays)
Operating Range Temperature: o*c - 55°C
Enclosures: Dripproof
System Testing: \ Built-In Test Equipment (BITE) using
limited diagnostics
.
Main Cable Type: .
TTRS
;P -
XTTPUTS %$y
'A<*
Relay closures: 10 pulses, 200 pulses, or 400 pulses
per nautical mile (internally
. selectable).
Digital: RS-232 output of speed data word
format at fixed rate of 600 Baud.
1-5
Table l-2. General Data for SRD-331M
Doppler Speed Log - (Continued)
OUTPUTS (Continued,)
Analog Voltage or Current: 'Linear, output 0 to 2.55 volts dc;
scaled to speed in knots:
Low Range: 0 - 30 knots
High Range; 25 - 50 knots
Synchro: 1.5 VA at 400 Hi, 90 voltsi .1X
synchro format speed: scaled to
either 0 to 40 or -50 to +50 knot:
*!internally selectable)
TRANSDUCER SPECIFICATIONS
Transducer Output
Power Radiated (Electrical): 10 watts peak
Signal Mode: Pulse
Frequency: 2 megahertz
Beamwi dth: 1.5O .-
Number of Beams: 2
Operating Range Temperature o"c - 4o"c
Requires one hull aperture with 3-inch gate valve
ERROR CONSIDERATIONS
The Sperry SRD-33lM Doppler Speed Log is designed to minimize the
effects of environmental conditions on the accuracy of speed
measurements.
Possible sources of error include temperature, pressure, salinity,
heave, trim, yawI pitch, and transducer alignment. Temperature,
pressure, and salinity affect C the speed of sound in water;
however, the accuracy of the SR%331M is not dependent on C
Temperature errors depend only on the propagation velocity ri the
transducer materral and are much smaller than if they depended on pro-
pagation velocity in water. Pressure and salinity effects are minimal
on surface ships.
The effects of trim and transducer alignment can be corrected by speed
calibration within the system while heave and pitch errors are mini-
mized by the transducer design which utilizes both fore and aft beams.
Roll does not produce errors except in the presence of yaw; however,
this
utilized
type of erroris cyclical
by the SRD-331M.
and is reduced by the software filter
-
1.5 SYSTEM CONTROL PROGRAMS
f-J The SRD-331M System contains a control program for the
Electronics Unit and a control program for each Display Unit. The
'Electronics Unit program is contained in EPROM U2l on Doppler Gate/
Processor Circuit Card A2. The Display Unit program is contained in
EPROM UlO on Display Processor Circuit Card AlA in each Display Unit.
Each programmed EPROM along with the circuit card into which it is
inserted is identified by an assembly part number which defines the
configuration of the Programmed Printed Wiring Board Assembly. This
part number is printed on a label which is attached to each programmed
card. Whenever a complete programmed circuit card is replaced or
whenever the control program EPROM is replaced in the card, care
should be taken to ensure that the replacement control program is
identical in function to the control program being removed. Table 1-3
identifies the various system part numbers and the associated control
program configurations.
Table 1-3. System Control Program Identification
1-7
Table l-3. System Control Program Identification (Continued)
1-8
SECTION 2
P OPERATION
2.1 GENERAL
This section contains a complete identification and listing r
of the controls and indicators associated with the SRD-331M Doppler
Speed Log System. Instructions for performing system self-test, nor-
mal operation, and manual speed selection are included. Other than
selection of the Test mode, manual entry of speed, distance reset, and
selection of panel/display illumination, all operation sequence func-
tions are controlled by the microprocessor in the Electronics Unit and
in each Display Unit.
2.2 CONTROLS AND INDICATORS
Figures 2-1 and 2-2 illustrate all operation controls and
indicators associated with the SRD-33lM system. ,In addition to the
Master Display Unit controls, a switch is provided inside the
Electronics Unit to permit local turn on and turn off of the
Electronics Unit during'test or servicing of the unit. Table 2-1
lists each control and provides a brief description of its function.
In addition to the operation controls, circuit cards in both
the Electronics Unit and the Display Units contain DIP switches and
master reset push buttons for the unit processors. These controls arc
crl associated with test and troubleshooting or are set at installation to
select a certain operational status or parameters. These controls
should only be set or adjusted by a qualified serviceman.
2.3 NORMAL OPERATING PROCEDURE
The SRD-331M Doppler Speed Log is normally operated with the
MODE switch in the Electronics Unit set to OPERATE position. All
control is effected from the Master Display Unit. To perform normal
system operation, proceed as follows:
a. Press POWER ON switch on Master Display. Observe that
Speed/Distance display indicates knots and that OPERATE
is selected on the Keyboard control panel. Observe that
KNOTS/MILES switch status illuminates to indicate KNOTS:
K indicator on Speed/Distance display illuminates.
b. Press TEST switch. Observe that system initiates and
properly performs self-test sequence outlined in
paragraph 2.5.
C. If distance display is desired, press KNOTS/MILES switch.
Observe that status illuminates to indicate MILES:
M indicator on Speed/Distance display illuminates.
2-I
d. To reset accumulated distance, press RESET MILES switch
twice within 5 seconds. After the first depression, the
display flashes for 5 seconds or until the second
depression, after which accumulated miles value stored in
processor is set to zero and all accumulated distance
information is lost. The system begins accumulating new
distance data from the moment the switch is released
the second time. If the reset switch is not pressed a
second time within five seconds, the display will stop
flashing and the computer will ignore the first reset com-
mand and will continue to accumulate distance.
e. To change panel, display, or status indicator illumination
level, press proper INTENSITY switch and then press
.INCREASE or DECREASE switch to increase or decrease
selected illumination function. The appropriate lamps
flash at maximum illumination. After desired illumination
level is set, press OPERATE switch to deactivate INCREASE
and DECREASE switches.
WARNING
When. system is turned off from Master Display
Unit, 115 VAC power is still present at terminal
boards, line filters, and transformers in both
the Master Display Unit and in the Electronics
Unit. Turn off power and synchro reference
voltage at ship's circuit breakers before opening
either unit for servicing.
f. To turn off system, press POWER OFF switch. '
2-2
Table 2-1. SRD-331M Doppler Speed Log,
Controls and Indicators
Index Control or
No. Indicator Function
QSTER DISPLAY UNIT (Figure 2-l)
1 Speed/Distance Back-lighted LCD display indicates
Display ship's speed (in knots) or distance
traveled (in nautical miles) since last
reset
2 Knots Indicator Illuminates letter K to indicate speed
is selected and is presently being
displayed
3 Miles Indicator Illuminates letter M to indicate
distance traveled is selected and is
presently being displayed
4 Keyboard Control Contains twelve touch switches which
Panel control power, normal operation, opera-
tor initiated testing, and display
illuminations
P/O 4 POWER ON Switch When pressed, activates latching relay
in Master Display Unit which activates
" power in the Master Display Unit and in
the Electronics Unit
P/O 4 POWER OFF Switch When pressed, deactivates latching relay
in Master Display Unit to turn off
system operating power
P/O 4 TEST Switch When pressed, initiates a'self-test
routine which checks the Master Display
Unit and the processor circuits in the
Electronics Unit
P/O 4 OPERATE Switch When pressed, causes system to enter or
return to normal operation mode and
display either speed or distance as
selected
P/O 4 MANUAL Switch When pressed, causes program to enter a
manual control mode which activates
INCREASE and DECREASE switches. Allows
operator to select a manually entered
speed value for display and output from
the system. Exit manual mode by
pressing TEST or OPERATE switches
Table 2-1. SRD-33lM Doppler Speed Log
Controls and Indicators-(Continued)
Cndex Control or
No. Indicator Function
llASTER DISPLAY UNIT (Continued)
DISPLAY INTENSITY When pressed, activates INCREASE and
Switch DECREASE switches and allows'operator to
increase or decrease the intensity of the
LCD illumination. Exit this function by
pressing either OPERATE, MANUAL, TEST, OI
another intensity switch
INCREASE Switch Increase switch is activated by selectin
MANUAL mode or an illumination function
key and then, when pressed, causes either
displayed speed value to slew to larger
value or causes selected illumination
function to increase in brightness
DECREASE Switch Decrease switch is activated by selecting
MANUAL mode or an illumination function
key and then, when pressed, causes either
displayed speed value to slew to smaller
value or causes selected illumination
function to decrease in brightness
PANEL INTENSITY When pressed, activates INCREASE and
Switch DECREASE switches and allows operator to
increase or decrease the intensity of the
keyboard control panel illumination.
Exit this function by pressing either
OPERATE, MANUAL, TEST, or another inten-
sity switch
KNOTS/MILES Switch When pressed in Operate or Manual mode,
alternate1 selects between display of
speed (in z riots)) or distance (in nautical
miles). Switch illuminates to indicate
the selected display mode
RESET MILES Switch When pressed twice within 5 seconds in
Operate or Manual mode, resets the accu-
mulated distance (displayed distance) to
zero
2-4
Table 2-1. SRD-331M Doppler Speed Log
Controls and Indicators-(Continued)
ndex Control or
No. Incicator Function
IASTER DISPLAY UNIT (Continued)
STATUS INTENSITY When pressed, activates INCREASE and
Switch DECREASE switches and allows operator
to increase or decrease the intensity
of the switch status indicator illumi-
nation and illumination of the Knots/-
Miles indicators associated with the
Speed/Distance display. Exit this
function by pressing either OPERATE,
MANUAL, TEST, or another intensity
switch
5 Fuse A2Fl (Mounted 250 volt, 1 amp slow-blow fuse for main
inside the Displ.ay AC power to Display Unit
Unit)
:LECTRONICS UNIT (Figure 2-21
MODE Switch (Mounted OPERATE position: Switches main AC
inside Electronics power through power control relay
Unit) contacts; Electronics Unit power
controlled from Master Display Unit
OFF position: Opens AC input (Hi) cir-
cuit to turn off power at Electronics
Unit independent of Master Display Unit
power status. Master Display's Speed/
Distance display flashes on and off
until power is returned
LOCAL PWR position: Switches main AC
power directly to unit power trans-
former to turn on power to Electronics
Unit independent of Master Display Unit
power status
Fuse Fl and F2 250 volt 3/4 amp slow-blow fuses for
(Mounted inside main AC power (Hi and Lo) to
Electronics Unit) Electronics Unit
Fuse F3 (Mounted 250 volt 2 amp fuse for +5 VDC power
inside Electronics supply circuit
Unit)
2-5
Table 2-1. SRD-331M Doppler Speed Log ,-
Controls and Indicators-(Continued)
tndex Control or
No. Indicator Function
ELECTRONICS UNIT (Continued)
4 Fuse Fl (Mounted 250 volt 3/4 amp fuse for +12 VDC power
inside Electronics supply circuit
Unit on DC power
supply circuit board)
5 Fuse F2 (Mounted 250 volt 3/4 amp fuse for -12 VDC poweP
inside Electronics supply circuit
Unit on DC power
supply circuit board)
2-6
r- .
\
I A’
> I
’ +SPEFWa
SRD-331 MASTER DISPLAY UNIT
I
Y2
--- - -3
rs
$I
ES
A---- -4
2-7
N
I
m
I
6
SYNCHRO OUTPUT
DC POWER SUPPLY
/CIRCUIT BOAR0
1. MODE SWITCH
2. FUSE AC POWER
3. FUSE +fiVDC POWER
4. FUSE t IZVOC POWER
/.
i
i
2.4 MANUAL SPEED OPERATION
P The SRD-331M Doppler Speed Log can also be operated using a
, manually entered speed value. When a manual speed value is selected,
a corresponding distance value is accumulated using the selected speed
rate. Both the speed and distance data are output from the system in
the same.manner as the normal doppler-generated speed and distance
data. The manually entered speed value is stored in the Electronics
Unit processor and is output from the Electronics Unit to the Master
Display Unit. The Electronics Unit power must be,turned on. The
transmit and receive circuits and Transducer Assembly are active in
this operating mode: however, received data is ignored. To select
manually-entered speed mode, proceed as follows:
a. If system is turned off, turn on and test system as
described in Section 2.3, steps a. and b.
NOTE
If manual mode is selected during normal operation,
the previous doppler speed value is retained until
a new speed value is manually selected.
. b. Press MANUAL switch. Observe that MANUAL status indica-
tor in switch illuminates.
C. To change speed value , press INCREASE switch to increase
displayed speed value. Press DECREASE switch to decrease
displayed speed value. INCREASE and DECREASE switches
0 remain in an active state as long as Manual mode is
selected.
d. Either speed or distance may be displayed in Manual mode
by pressing KNOTS/MILES switch as in Operate mode.
e. Illumination may be changed in Manual mode-in the same
manner as in Operate mode. When an illumination function
is selected, the INCREASE and DECREASE switches function
to change the selected illumination level rather than the
speed value. After desired illumination level has been
selected, press MANUAL switch to reselect speed entry
function for the INCREASE and DECREASE switches.
2.5 SYSTEM SELF-TEST
A system self-test subroutine is initiated by the Electronics
Unit and Master Display Unit processors whenever the TEST switch is
pressed. During the Test routine neither speed nor distance is
updated. Upon exiting from the Test mode, the processor will select
Operate mode.
2-9
The self-test routine checks the Master Display Unit pro-
cessor operation and display assembly readout. It accomplishes this
by first blanking the display and lighting all status indicators LEDs.
Next, the display cycles from 0000.0, 1111.1 . . . to 9999.9. The
system then returns from the test routine to.the OPERATE mode. An
error in the readout can denote a problem with the speed/distance
display, display driver circuitry, or display processor circuitry.
The Transducer Assembly, RF TransmitterkReceiver Card Al and Synchro
Output Assembly A6 in the Electronics Unit, and the doppler signal
return frequency counters on Doppler Gate Processor Assembly A2 in the
Electronics Unit are not checked by this test.
Another less apparent self-test occurs if communications be-
tween the Master Display Unit and the Electronics Unit fail. The
Master Display's SPEED/DISTANCE Display flashes on and off. This also
occurs if the Power MODE switch in the Electronics unit is turned off.
2-10
SECTION 3
PI FUNCTIONAL DESCRIPTION
3.1 GENERAL
3-l
Figure 3-l is the Functional Schematic Diagram of the
Transducer-Electronics Unit. Refer to this diagram while following
the text of the functional descriptions.
3.2.1 TRANSMIT-RECEIVE TIMING CYCLE
Figure 3-2 illustrates the Transmit-Receive timing cycle
which is repetitive and has a period of 7.7 ms. During the 1.1 ms
period when XMTE (TRANSMIT ENABLE) is active high, the forward and aft
channels transmit. Upon completion of XMTE the Transducer immediately
begins to receive return signals from the water. Actual counting of
the receive signals begins 1.1 ms later when WTGTE (WATER GATE) goes
active high. The .delay in counting removes the chance of counting
return signals reflected -from water trapped within the vessel's
boundary layer.
XMTE and WTGTE are generated by processor software acting
upon the Timer Out Interrupt RST 7.5. Every 0.55 ms the TIMER OUT
output of RAM, I/O, ana Timer U20 goes low for 0.33 us causing the
Timer Out Interrupt RST 7.5. Once the RST 7.5 Interrupt mode is
entered, the software adds a count of one to a software counter. The
counter is designed to count 14 interrupts and to reset the counter to
zero after the 14th count. The Timer Out Interrupt routine checks the
counter for the count and sets XMTE and WTGTE high or low depending on
the count.
3.2.2 TRANSMIT FUNCTION
The Transmit Function consists of identical fore and aft
transmitting channels. Both channels simultaneously transmit a 1.1 ms
burst of 2 MHz energy into the water every 7.7 ms. Transmit Function
timing and generation of the 2 MHz transmit signal occurs on Doppler
Gate/Processor Assembly A2. Power amplification of the transmit
signal takes place on RF Transmitter/Receiver Assembly Al. And
finally, electrical to sonic energy conversion is provided by the Unit
3 Transducer.
XMTE (TRANSMIT ENABLE) is the single timing signal for the
. Transmit Function. XMTE has an active period of 1.1 ms and occurs
every 7.7 ms. Figure 3-2 illustrates this timing and section 3.2.1
explains how XMTE is generated. XMTE is sent from Port B of EPROM and
I/O chip U21. It is inverted and applied to the RO reset input of
ripple counter U13. While XMTE is inactive, the ripple counter is
reset and its output is a logic zero (OV). XMTE when active allows
the ripple counter to divide the 12 %z clock output of oscillator
chip U9 by 6. The output of U13 is 2 MHz PULSED RF with a pulse width
of 1.1 ms. UllC and UllE drive the 2 MHz PULSED RF to RF
Transmitter/Receiver Assembly Al.
3-2
c
6.6ms 04
RECEIVE
I
-4.4ms
DOPPLER COUNTING
I
I I I I I
XMTE
(TRANSMIT)
ENABLE
WTGTE
I WATER GATE)
I
TIMER OUT
L. 4. L L LI
INTERRUPT I 2 3 4 5 6 7 6 9 IO II I2 I3 I4 I 2 3 4 5
COUNT
w
I
WI Figure 3-2. Transmit-Receive Timing Cycle
.-
Transmit circuitry on PCB Al consists of buffer Q13, and two
identical fore and aft power amplifiers with overload current protec-
tion and gain control. The TTL level (OV to 5V) 2 MHz PULSED RF
enters Al at 55 pin 5. The signal is applied across a voltage divider
network to the base of Q13. Due to the voltage divider it takes l.OV
of signal at J5 pin 5 to turn on emitter-follower Q13. This safety
margin prevents power amplification of spurious noise signals below
l.OV. The output of Q13 drives both the fore and aft channel power
amps. Since both channels are identical, only the fore channel will
be discussed.
The first stage of the power amplifier is a differential
driver stage consisting of Q4 and Q6. The gain of this stage is pro-
portional to the collector current of Q5. The collector current of Q5
is likewise proportional to th'e base-emitter voltage of Q5 which is
controlled by PWR ADJ potentiometer R19. The output of the differen-
tial amp is transformer coupled to a MOS FET push-pull amplifier con-
sisting of Q2 and Q3. The output of this final stage of amplification
is coupled by T2 to a transmission line which terminates in an impe-
dance matching network in the Unit 3 Transducer. The primary of T3, a
current sensing transformer, is in series with the transmission line
down to the Transducer. The voltage on the secondary of T3 is pro-
portional to the magnitude of the current flowing through the primary
of T3. CH~ and CR5 rectify the induced voltage before it is applied
to a current peak detector consisting of U5A and U5B, CR3 and C14.
The output of the peak detector is level shifted by Ql. An increase
in output from the peak detector due to overcurrent causes the collec-
tor current of Ql to decrease. This causes the base-emitter voltage
of Q5 to decrease and hence the collector current of Q5 also
decreases. A decrease in the collector current of Q5 decreases the
gain of the first stage differential amplifier which reduces the
signal to the push-pull amplifier. This lowers the current flowing
through the primary of T3 and forces the output current of the push-
pull amplifier to reach an equilibrium.
After the push-pull amplifier the 2 MHz PULSED RF is coupled
through the Transducer cable to an impedance matching network inside
the Transducer. This network matches the impedance of the cable to
the transmit crystal for an efficient transfer of power. The transmit
crystal then oscillates and transmits sonic energy into the water.
Both the fore. and aft channels of the Transducer operate in the same
manner and are identical except for the angle of transmission.
3.2.3 RECEIVE FUNCTION
The Receive Function consists of identical fore and aft
receiving channels. Both channels receive doppler shifted sonic
energy from the water and convert it to electrical energy. These
signals are then amplified to produce zero crossings (fore and aft)
3-6 CHANGE 1
and a threshold level for each channel. The difference in frequency
of the zero crossings (fore and aft) is found after processing by
p Doppler Gate circuitry. The difference in frequency is directly pro-
portional to speed. Speed calculations and reasonableness tests are
then performed by the lA2 CPU U19 before speed is updated and sent to
the display.
3.2.3.1 TRANSDUCER RECEIVE FUNCTION
.The fore and aft crystals of the.Transducer Assembly serve.
the dual function of transmitting and receiving their respective chan-
nels. When XMTE goes inactive low, transmission is terminated and the
Transducer crystals are free to receive reflected doppler shifted
signals from the water. The crystals convert the received sonic
energy into electrical pulses. Each channel applies its pulses
through impedance matching transformers in the Transducer Assembly to
impedance matching transformers on RF Transmitter/Receiver Assembly Al
in the Electronics Unit.
3.2.3.2 RECEIVER AMPLIFICATION
The fore .and aft receiver circuitry is identical, therefore
discussion will be limited to the fore channel.
Low level receive pulses are coupled by impedance matching
transformer T2 into a TR Switch. The TR Switch during transmission
protects receiver preamplifier Ul by using limiting diodes and forming
a high impedance path to the input of Ul. However, receive pulses are
not limited by the TR Switch which forms a low impedance path to Ul
for low level signals. Ul is a high gain, low noise differential
amplifier. The high impedance output of Ul is matched to the lower
input impedance of U2A by transformer T4. Also, T4 converts the
double-ended output of Ul to a single-ended output to drive the input
of U2A. The receive signal is further amplified by the cascaded
amplifiers U2A and U2B. The output of U2B drives the base of common-
emitter amplifier Q14. The collector output of Q14 is converted by T9
to a double-ended, balanced output to provide a low impedance source
to threshold demodulator U3. ZERO CROSSINGS (FORE) are coupled from
the balanced output of T9 by capacitors C74 and.C73 to Doppler Gate
circuitry on lA2 Doppler Gate/Processor Assembly.
3.2.3.3 THRESHOLD DETECTION
3-7
threshold level. It also provides a smooth, positive varying dc level
for the input of comparator U4B. A voltage on the inverting input of
U4B greater than the positive voltage preset by R55 causes the output
of U4B, THRESHOLD (FORE), to go active low. This indicates a good
receive signal and allows the fore channel Doppler Gate to function.
3.2.3.4 DOPPLER GATE
Due to the doppler shift principle the receive signal
reflected from the direction of travel has a greater frequency than
the frequency transmitted. Likewise, the receive signal reflected
opposite to the direction of travel has a lesser frequency than that
transmitted. The Doppler Gate circuitry determines the difference in
1 frequency between the fore receive signal and the aft receive signal.
Each channel has two counters; one counts zero crossings and one
counts gated 12 MHz clock pulses. All counters are cleared and
started simultaneously. The zero crossings counter, when it reaches a
count of 2048 zero crossings, halts and causes its associated 12 MHz
counter to halt. The CPU is alerted when both channels halt and then
views the content of both channels' 12 MHz counter. The difference
between the fore and aft 12 MHz counter is directly related to the
speed of the vessel. Fore and aft doppler circuitry are identical,
therefore discussion is limited to the fore channel.
ZERO CROSSINGS (FORE) HI and LOW are 180° out of phase and
are applied to comparator U17. The output of U17 is a TTL level
which is in phase with ZERO CROSSINGS (FORE) HI. U4A, U4B, and UlA
effectively invert ZERO CROSSINGS (FORE) before applying the signal to
NAND gate U2A and inverter UlC. The remaining circuitry of the
Doppler Gate counter is synchronous. Figure 3-3 shows the timing
diagram for the fore channel. The first event in the sequence occurs
when XMTE goes inactive low, indicating the start of the receive
cycle. The second event occurs when CTR RST (COUNTER RESET) goes
active clearing the ZERO CROSSINGS (FORE) counter, 12 MHz counter, and
D-latch U8A. The third event is when WTGTE goes active low. This
starts all counters simultaneously although counting will only occur
when THRESHOLD (FORE) is active low. The fourth event is'when the
ZERO CROSSINGS (FORE) counter reaches a count of 2048. QD of the
counter goes high causing control logic to halt the input of ZERO
CROSSINGS (FORE) and 12 MHz into their- respective counters. When both
the fore and aft zero crossings' counters reach a count of 2048 their
QD outputs are ANDED to create CTR F?DY (COUNTER READY), This signal
causes interrupt RST 6.5 which causes the processor to read the con-
tents of the fore and aft 12 MHz counters. The processor finds the
difference between the two counts, performs reasonableness tests, and
calculates a speed. Speed data is averaged for several Transmit-
Receive cycles before being sent to the Master Display Unit.
An exception to the previous Doppler Gate timing occurs if a
zero crossing counter fails to reach a count of 2048 before WTGTE goes
inactive. In that case the processor does not generate CTR RST,
thereby allowing the counter to finish its count during the next
receive cycle.
3-8 CHANGE 1
\’
XMTE
CTR RST
WTGTE
9, -2” OUTPUT OF
ZERO XINGS COUNTER
tHREsHoLD
(FORE)
0 OUTPUT OF UGA
I I i i
zmo CROSSINGS (FORE)
AS SEEN AT UIC 8 U2A
I I
1;2 MHZ CLOCK
IIIIIII IIII
OUTPUT OF UIOA a
II
I
INPUT TO I2 MHZ COUNTER
i I J I _ I
BEGINS
Control
Signal Function
CK CLOCK
(Output) Clock output for use as a system clock. The period of
CK is twice the Xl input period. Frequency is 3 MHz.
RD READ
(Output) A low level on RD indicates the selected memory or I/O
device is to be read and that the Data Bus is
available for the data transfer. Three-stated during
Reset.
RST RESET OUT
(Output) Indicates CPU is being reset. Can be used as a system
reset.
3-11
-
Table 3-l. CPU U19 Signals Functions-(Continued)
1 Control
Signal Function
RST 6.5 RESTART 6.5 (COUNTER READY INTERRUPT)
(Input) Interrupts the CPU to service the Counter Ready
subroutine. Lower priority than RST 7.5.
RST 7.5 RESTART 7.5 (TIMER OUT INTERRUPT)
(Input) Interrupts the CPU to service the Timer Out
subroutine. Higher priority than RST 6.5.
CJR WRITE
(Output) A low level on E indicates the data on the Data Bus
is to be written into the selected memory or I/O loca-
tion. Data is set up at the trailing edge of JR.
Three-stated during Reset.
x1 CRYSTAL INPUT 1
(Input) Xl is connected to an external clock in ut from a
logic gate. It drives an internal clot R generator
which divides the input frequency by two to give the
processors internal operating frequency.
3-12
Table 3-2. RAM, I/O, and Timer U20 Signals
Functions-(Continued)
Control
Signal Function
CE CHIP ENABLE
(Input) A high logic level on Address Bit 11 causes this chip
to be enabled.,
CK CLOCK
(Input) Input to the counter-timer.
PORT B PORT B
(Input- Same as PORT A above.
Output)
PORT C PORT C
(Input- Same as PORT A above,
Output)
RD READ
(Input) With CE active and IO/z pin low, the addressed RAM
content will be read out to the AD Bus. Otherwise
with IO/x high, the content of the selected I/O port
or command status registers will be read to the AD
Bus.
RST RESET
(Input) Input high on this line resets the chip and initial-
izes the three I/O ports to Input mode.
TIMER OUT TIMER OUT
(Output) Timer output. Negative going pulse every 0.55 ms for
0.33 us.
WR WRITE
(Input) With input low on this line with CE active causes the
data on the Address/Data Bus to be written to the RAM
or I/O ports and command/status register depending on
IO/X
3-13
Table 3-3. EPROM and I/O Signals Functions
Control
Signal Function
AD&m7
(Input- BIDIRECTIONAL ADDRESS/DATA BUS
Output) ' The lower 8-bits of the PROM or I/O address are
applied to the bus lines when ALE is high. During an
I/O cycle PORT A is selected if AD8 is low and PORT B
is selected if-AD8 is high. Data is presented onto
the bus when RD is low and CE is active.
ALE ADDRESS LATCH ENABLE
(Input) When active ADO-AD7, IO/%, A8-~10, and z enter the
address latches. The signals are latched on the
trailing edge of ALE.
CE CHIP ENABLE
(Input) Enables chip to be accessed when input is low.
CK CLOCK
(Input) Clock input for chip timing;
--
IO/Z INPUT OUTPUT/MEMORY
(Input) If the latched IO/M is high when E is low, the output
data comes from an I/O port. If it is low the output
data comes from the PROM.
PORT A PORT A.
(Output) PORT A is selected for site operations when the chip
enables are active and WR is low and a 0 was pre-
viously latched from ADO,
PORT B PORT B
(Input- Write operation is identical to PORT A but is selected
Output) by a l-latchedfrom ADO. Read operation is selected
by IO/M high, RD low, and CE active low. ADo high
selects PORT B. Each bit is individually programmed
as an output or input.
KIT READ
(Input 1 Reads the selected PROM location or I/O port when CE
is low and READ is low.
3-14
Table 3-3. EPROM and I/O Signals Functions-(Continued)
P Control
-.
Signal Function
RST RESET
(Input 1 In normal operation, an input high on RESET causes all
pins in PORT A and B to assume Input n-ode.
WR WRITE
(Input) If the latched CE is active, a low on K causes the
output port pointed to by the latched value of ADO to
'be written with the data on ADo-7. The state of IOfl
is ignored.
The main functions of the CPU are to read data from input
'ports and to retrieve and execute program commands, write data into
storage locations (RAM) or output ports, 'and to service RST
interrupts. Power-on reset or manual reset is accomplished by an RC
and switch network connected to RST (IN). This input,when active low
interrupts the program and resets the program counter to zero. The
CPU also receives 6 MHz at Xl and divides it by two to derive the CPU
'clock rate. The derived 3 MHz clock rate exits the CPU through pin CK
and provides timing for U20 and U21.
(P RAM, I/O,
read from or written
and Timer U20 is a multifunction
into RAM locations
chip.
in U20 or data may be read
Data may bc
from either PORT A, B, or C. The 3 MHz clock pulses received from Ul9
at CK are counted in an internal counter. When a terminal count is
reached, which occurs every 0.55 ms, the TIMER OUT output goes low for
0.33 us. This causes the Timer Out Interrupt RST 7.5. Section 3.2.1
explains how this interrupt generates XMTE and WTGTE. In a similar
manner it also generates other control signals and controls the output
of serial data.
The operating program is stored in EPROM and I/O chip U21.
The CPU reads that byte of data stored in the memory location pointed
to by the program counter. U21 has two bidirectional ports. PORT A
is the a-bit port through which digital speed is latched to the D-to-A
converter U16. PORT B bits O-3 are inputs for speed adjustment switch
Sl, and bits 4-7 are output pins. Data latched through pins 4-7
remains there until the processor writes new data to those pins.
3-15
3.2;S.l SPEED ADJUSTMENT SWITCH Sl
Sl is a DIP switch with six individual switches by which the
operator can input speed correction data to the processor. Switches 1
and 2 are inputs to PORT C of U20, and the remaining switches are
inputs to PORT B of U21. Speed corrections of +5% can be obtained.
The status of Sl is checked by the processor during every COUNTER
READY Interrupt RST 6.5. Section 5.4.2.1 contains procedures and a
chart for implementing speed corrections.
3.2.5.2 SERIAL INPUT DATA
The Electronics Unit processor requires status of Master
Display Unit switches OPERATE, TEST, MANUAL, INCREASE, and DECREASE.
Each switch is assigned a BCD code: OPERATE - 0, TEST - 1, MANUAL -
2, INCREASE - 3, and DECREASE - 7. Serial switch status information
is sent from the Master Display Unit through a differential line
driver to produce SID HI and LOW. Differential line receiver U18 in
the Electronics Unit receives the differential signal and converts it
to single-ended form. The output of U18 feeds directly to the SID
input of CPU U19. The transmitted data consists of 11 serial bits.
The first bit is a Start Bit (low logic). The next a-bits contain the
BCD switch code in order of LSB,to MSB. The last two bits are Stop
Bits (high logic). Each bit has a length of 1.65 ms. After trans-
mission the SID line remains at a high logic level until the next
Start Bit occurs. The processor checks SID during every TIMER OUT
interrupt RST 7.5. A new switch status word is noted when the Start
Bit goes low on the SID line which has been high since the last status
transmission.
3.2.6 ELECTRONICS UNIT OUTPUT FUNCTION
Speed data outputs consist of Serial Output Data (SOD) which
goes to the Master Display Unit and a Digital-to-Analog output. Both
types of output are covered in subsequent subsections.
3.2.6.1 SERIAL OUTPUT DATA (SOD)
Speed data is sent in serial form from the Electronics Unit
to the Master Display Unit. Serial speed data leaves the SOD output
of U19 and is inverted by UlOC before being applied to both sections
of dual differential line driver U22. It takes a high logic level on
input A3 to enable line driver A, and it takes a high logic level on
input B3 to enable line driver B. A factory installed jumper between
points B and C (see Figure 3-1) connects a high logic level from the
output of inverter U24D to both enable inputs. The input to U24D is
maintained at a low logic level by the output of U21 PORT B pin 4.
The processor, during initialization, sets the output of U21 PORT B
pin 4 to a low logic level and never changes it during operation.
This ensures continuous operation of both line drivers. An alternate
3-16
(7 method of jumpering
by software
between A and B is possible
and hence is not implemented.
but is not supported
This method would only
enable one line driver at a time. With the factory installed jumper
between B and C the output SOD HI is in phase with the serial data
exiting the SOD output of CPU U19. Although both line drivers, are
enabled and operating only the output of line driver B (SOD B output)
is connected by transmission cable to the Master Display Unit.
Serial speed data is sent to the Master Display in the form
of four a-bit words taking the following format:
MSB LSB
CHANGE 1 3-17
vessel's speed decreases below either 22 or 28 knots. Table 3-4 shows
low and high scale output voltages. Any output voltage for a known
speed can be calculated using the following formulas and making astern
speed a negative value and speed ahead a positive value.
Systems with stored program PN 1807161 or 1807226:
Low Scale 1
3-18 CHANGE 1
Table 3-4. D-to-A Converter Output
V=O.O675K+ 0.36
+’ RANGE=-4 TOt25K
-4 0 IO 20 30 40 50
SPEED (KNOTS)
SYSTEMS WITH EPROM
0 IO 20 30 40 50
SPEED (KNOTS)
SYSTEMS WITH EPROM
CHANGE 1 3-19
NOTE
The +5V regulator derives its power from the
+12v supply. Therefore, loss of one of these
outputs will affect the other output.
The majority of +5VDC, 212 VDC, and +32 VDC circuitry is
located on the A3 Power Supply Assembly6 Each supply has a bridge
rectifier, filter and regulation circuitry. The A5 Electronic Unit
Subassembly contains fuse, filter, and regulation circuitry for the
+5 VDC supply and filtering for the +32 VDC supply. The +12 VDC
supply has voltage regulators on the A5 assembly. +12 VDF is fused on
the A3 board while +5 VDC is fused on the A5 Subassembly. The +5 VDC
and +12 VDC supplies have overvoltage protectors VRl-VR3 on the A5
Subassembly. When activated by an overvoltage, these protectors clamp
the output voltage to approximately 2.0 VDC. VRl-VR3 are reset by
switching Mode switch Sl to OFF.
- 2
Tl
5I I5
TO AC POWER
iAimi 4
TO AC POWER
i
IFi
4
TO AC POWER
3
3
100 VAC CONNECTION II5 VAC CONNECTION 230 VAC CONNECTION
3-20 CHANGE 1
3.3 MASTER DISPLAY UNIT FUNCTIONS
The functional operation of the Master Display Unit is
described by.four functional groups: 1. Computation and Control, 2.
Input, 3. Output, and 4. Power. Figure 3-5 is the Functional
Schematic of the Master Display Unit. Refer to this diagram while
following the test of the functional descriptions.
3.3.1 MASTER DISPLAY COMPUTATION AND CONTROL
3-21/(3-22 blank)
.e- _j
-1 I-2Al ELECTRONIC COMPONENTS SUBASSEMBLY -
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SUBASSEMBLY
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ELECTRONICS l
UNIT .i2,15,16-k5V RET
Control
Signal Function
RST 7.5 RESTART 7.5
(Input) Second highest priority interrupt. Used to time
sequencing of software. Occurs every 0.55 ms as' set by
Programmable Timer U18.
Sl High for memory or I/O read cycles, low for memory or
(Output) I/O write cycles.
TRAP TRAP
(Input) Nonmaskable RESTART interrupt. Highest priority of any
interrupt.
3-27
3.3.2.2 SPEED/DISTANCE DISPLAY DIP SWITCH Sl
Switch 4 of Sl is placed in the open position for a Master,
Display Unit and in the closed position for a Remote Display Unit.
The CPU, at a regular rate, selects the I/O address for a-bit Buffer
Ull. This produces CSO which allows Sl status to be placed on the
Data Bus and to be read by the CPU. The open or high status of Switch
4 of Sl tells the processor that MANUAL and RESET MILES are valid
switches. A low level tells the processor to ignore MANUAL and RESET
MILES.
3.3.2.3 KEYBOARD SWITCH INPUT
The ten switches shown in Figure 3-5 on Keyboard Switch
Assembly AlAlA are membrane switches. These switches are connected
in a matrix pattern as shown in Figure 3-5. Each switch on the top
row has one of their two contacts connected to the 2Q output of Latch
UlO. The bottom row in a like manner is connected to 1Q of U13. Each
pair of switches in a column has the remaining contact tied together
and then connected to Buffer Ull.
The switches are read in the following manner. The CPU
applies a logic "1" level through 2Q of latch UlO to the top row of
switches. Next buffer Ull is enabled ,by CSO. If a switch is being
pressed, the logic level latched onto 2Q has a path through the switch
contacts into Ull and onto the Data Bus. The processor next enables
the bottom row of switches by applying a logic "1" level through the
1Q output of latch UlO, enabling Ull by CSO, and reading the Data Bus
to determine switch closures. This routine occurs every 0.55 ms.
3.3;3 MASTER DISPLAY UNIT OUTPUT FUNCTION
The Master Display Unit displays speed or distance on the LCD
Speed/Distance Display and also illuminates Status Lights. ,Illumina-
tion of the Speed/Distance Display, Keyboard Switch Panel, and Status
Light intensity is CPU controlled. In addition, the CPU transmits
serial speed and distance data to Remote Displays. Switch status is
serially transmitted to the CPU in the Electronics Unit. The Master
Display Unit provides speed information by means of relay contact
closures. Each form of output is discussed in subsequent subsections.
3.3.3.1 LCD SPEED/DISTANCE DISPLAY AND STATUS LIGHTS OUTPUT
The CPU writes a BCD word for each digit of the Speed/
Distance Display. The I/O address of the Speed/Distance Display is
entered onto the Address Bus. It is decoded to produce CS3. U8 is
selected and the BCD word on the Data Bus goes through U8 and into the
Decoder/Driver. Each BCD word is sent with a LOAD bit unique to the
Decoder/Driver addressed. The exception is the loading of the 10-l
bit. The BCD word is first latched through U8. Next the I/O address
3-28
of UlO is decoded to produce CSl. The LOAD 10-l bit placed on D7 is
Pi clocked by CSl to the 8Q output of UlO. The 10-l Decoder/Driver then
loads the BCD word, decodes it and displays it. The Decoder/Driver
holds the last number entered until loaded again..
LED Status Lights are illuminated by the output of Latches U9
and UlO. Each LED has a dedicated output line 'from U9 or UlO. A low.
logic level is used to light the LED. The proper logic level is sent
on the Data Bus and is clocked through either U9 or UlO depending on
the switch being pressed. The LED remains lit until the CPU changes
the logic level on the dedicated bit line.
3.3.3.2 STATUS, DISPLAY, AND PANEL INTENSITIES
Electroluminescent panels (ELP) DSlO and DSl are used to
illuminate the LCD display (DISPLAY) and the keyboard switch panel
(PANEL), respectively. ELPs are designed to work only on AC voltages.
The brightness of the ELP is controlled by a combination of pulse
width modulation and frequency control. The pulse width of the
driving voltage is varied from approximately one microsecond to 12.5
milliseconds at a rate of 40 Hz to change the ELP brightness from dark
to half scale, after which, the frequency is increased from 40 Hz to
1000 Hz for maximum brightness. The brightness of the LED status
lights (STATUS) is controlled by pulse width modulation throughout by
varying the applied pulse from one microsecond to 25 milliseconds at a
rate of 40 Hz.
All intensities are controlled by programmable timers U15 and
U18. The type of output produced by each timer is programmed through
the CPU. U18, selected by CS7, is initialized to produce a 40 Hz
,square wave at OUT 0, thereby providing the basic repetition rate for
u15. The three outputs of U15, OUT 2, OUT 1 and OUT 0, may produce
either symmetrical square waves or variable length pulses depending on
commands from the CPU. Initially, all three outputs of U15, selected
by CS6, are programmed to produce varying pulse widths 'at a 40 Hz
rate, however, as panel and display intensities are increased, OUT 1
and OUT 0 are changed to square wave output and the frequency is
increased. When square wave output is selected, the appropriate gate,
GATE 1, or GATE 0 is pulled to a high logic level instead of being
driven by the 40 Hz square wave.
The output of OUT 1 and OUT 0 are buffered by U16A and U16B
respectively. These buffers drive transistor driver stages which
supply the AC voltages DISPLAY DIM and PANEL DIM to light their
respective ELPs. OUT 2 is inverted by U19C to produce STATUS DIM.
Transistors Q2 and Ql drive the signal through the selected LED,Status
Lamps.
3-29
3.3.3.3 MASTER DISPLAY UNIT SERIAL OUTPUT TO THE ELECTRONICS UNIT
The Electronics Unit CPU requires the status of Master
Display Unit switches OPERATE, TEST, MANUAL, INCREASE, and DECREASE.
Each switch is assigned a BCD code: OPERATE - 0, TEST - 1, MANUAL -
2, INCREASE - 3, and DECREASE - 7. Serial switch information leaves
the SOD output of CPU U3 and enters differential line'driver U2A. U2A
is enabled by the CPU decoding CSS and latching a high logic level to
output 4Q of Latch Ull. The output of U2A is SID HI and LO.
SID consists of 11 serial bits. Bit 1 is a Start' Bit (low
logic). The next a-bits contain the BCD switch code in order of LSB
to MSB. The last two bits are Stop Bits (high logic). Each bit has a
length of 1.65 ms. After transmission the SID line remains at a high
logic level until the next Start Bit occurs.
3.3.3.4 MASTER DISPLAY UNIT SERIAL OUTPUT TO REMOTE DISPLAY UNITS
Remote Display Units require speed and distance from the
Master Display. This information is sent in the form of seven a-bit
serial words with the following format:
MSB LSB
WORD ONE D2 D1 Do S 0 0 0 0
WORD 'IWO Vll VlO 'vg v8 0 0 0 1
WORD THREE V7 V6 V5 V4 0
WORD FOUR V3 V2 Vl Vo 0
WORD FIVE 0 0 0 0 D8OOO D4000 D2000 DlOoO
WORD SIX D800 D400 D200 Dloo Da0 D40 D20 D10
WORD SEVEN D8 D4 D2 D1 D.8 D.4 D.2 D.1
In WORD ONE S is a Sign Bit. If S is a logic 0 then speed is ahead,
and if S is a logic 1 then speed is astern. D2 - D0 are undefined
bits. Vll - VO is the 12-bit binary speed word. Vll is weighted 25.6
knots and V0 is weighted 0.0125 knots. Words FIVE through SEVEN con-
tain distance traveled. Da000 -is weighted 8000 nautical miles and D-1
is weighted 0.1 nautical miles, The order of transmission is WORD ONE
through WORD SEVEN. Each word is sent LSB first. Each word is pre-
ceded by one Start Bit (low logic level) and is followed by two Stop
Bits (high logic level). Each group of seven words is followed by 21
Stop Bits. Each bit is 1.65 ms long.
When the CPU wants to send serial data to Remote Displays, it
addresses CS5 and latches a high logic level to the 34 output and a
low logic level to 4Q of Ull. This enables U2B and disables U2A.
Serial data then leaves the SOD output of CPU U3 and goes through dif-
ferential line driver U2B to become DATA OUT HI and LO.
3-30
3.3.3.5 RELAY CLOSURE OUTPUT
The system provides "relay closure" outputs for distance and for log
available status. Distance is provided as 200 closures per nautical mile
(internally selectable to 10 or 400 closures per nautical mile,or log
available closure). Log available (not used on this system), is provided as
an output which is closed when the log is available and is open when power is
off or if a log failure is recognized. Each of these signals is generated by
the Display Processor and is output ,to a latch U9 on Power Supply Subassembly
Card 2AlA3Al in the Master Display Unit. Inverters and Optical Isolators on
the card provide drive and current carrying capability for the outputs which
are made available at terminal board TBl on I/O Board 2A2Al. The type of
outputs selected and the terminals at which the selected outputs are available
are determined by the connection of jumpers on the Power Supply Subassembly
Card at the time of system installation. If this card is replaced, all
jumpers on the replacement card must be configured in the same manner as on
the card removed.
This system is wired at the factory to provide 200 ppm at all five
outputs on TBl. As shown on Figure 3-5, the 200 pulse per nautical mile
output at jumper point 3 has been connected to jumper points 2, 4, 6, 8, and
10 to provide five outputs of 200 ppm distance. The log available output at
jumper point 7 is not used on this system. Any other combination of distance
output may be selected with the constraint that two different distance signals
must not be connected to the same output. Refer to Figure 5-6 for
identification of physical jumper locations.
CHANGE 3 3-31
data for a finite period if power fails. Also 14 VDC is filtered by
~2 and switched through Kl and across C3-C5 to VRl and VR2. The out-
put of VR2 is +5 VDC and the output of VRl is approximately 5.7 VDC.
Approximately 0.7 VDC is dropped across CR8 so that Jl pins 26, 27,
30, 31, and 32 have +5 VDC to ground. If the output of VR2 fails or
drops below +5.0 VDC then diode CR2 conducts and batteries BTl-BT4
drive the above pins. This output is referenced as +5 VBAT.
3-32 CHANGE 3
c
3.4 DIGITAL-TO-SYNCHRO CONVERSION AND OUTPUT FUNCTION
p The SRD-331M Electronics Unit contains circuitry which con-
verts the standard four word digital output speed data to synchro for-
mat speed. This circuitry is completely contained on Synchro Output
Assembly card lA6. Figure 3-6 is the Functional Schematic Diagram of
the Conversion Circuit. Refer to this diagram while following the
text of the functional description.
The serial output data message (SOD output) which is applied
to the Master Display Unit is also applied as an input to Synchro
Output Assembly 1146. As described in paragraph 3.2.6.1, the message
consists of four 8-bit words with the four LSBs of each word con-
taining the word identification bits and the four MSBS of each word
containing either the sign bit or four bits of the twelve bit scaled
binary speed data. Each message is transmitted at a fixed rate of 600.
baud.
The serial speed data is applied through differential line
receiver Ul to a Universal Asynchronous Receiver/Transmitter (UART)
u3. The UART is wired to recognize the single start bit and two stop
bits which identify the field for each 8-bit word and to reconfigure
each word to parallel format. Clock chip U5 provides the 9600 Hz
clock which is required to shift data bits into the TJART and also pro-
vides the strobe for transfer of the reformatted data words into the
address accumulation and output storage registers. Each time a
complete word is accumulated, the UART sets data available (DAV) out-
put high. The next clock pulse causes flip-flop U2B to set and 5 goes
low. This action causes the two least significant bits of the speed
Pa* word to be strobed through decoder U4. Since the two LSBs of the word
contain the word identifier count, the decoded output from rJ4 loads
the four data bits into the correct storage position in the address
accumulation register.
The output from the address accumulation register and the
three MSBs of word four provide a 12-bit address word (sign bit plus
eleven scale bits) which is scaled directly to speed. This word is
used to address EPROMs U9 and UlO. Each EPROM is an 8K x 8-bit memory
which provides storage for look-up tables which convert the
12-bit binary speed (address) word to a 16-bit angular (data) word.
The memory contains two conversion tables, one scaled to the range of
-50 to +50 knots, and the second scaled to the range of 0 to +40
knots. The scaling factor selected is determined by the setting of
switch Sl, which is connected to the most significant address bit of
the EPROMs. When word four is formatted by the TJART, decoder TJ4 out-
put line 3 goes low. At this instant, the content of the addressed
location in the look-up table is latched into flip-flop register Ull,
u12. The fourteen LS.Bs of the latched word are applied to digital-to-
synchro converter U13 which converts the parallel binary word to three
wire ac synchro format.
3-33
In addition to the synchro speed output, card lA6 also pro-
vides two buffered (RS-232) digital speed outputs. 90th outputs, under
control of the clear to send (CTS) line from the external device, out-
put the standard four word speed message at 600 baud.
In addition to being applied directly to the UART, speed
input words are gated through'one half of differential line receiver
Ul to inverter buffers and to the digital RS-232 outputs. Since the
strobe input for this half of Ul is wired active, data is only trans-
ferred to the output when 1STRB input is high. The data transfer is
synchronized at the beginning of word 1 in the'following manner: When
clear to send (CTS) is set low by the receiving equipment (no data
requested), flip-flop U16A is reset by a low on the CL input. When the
receiving equipment sets CTS high, the D input of U16A is set high.
The flip-flop remains in the reset state until after word four of the
present speed data message has been input. When word four is for-
matted by the UART and decoder U4 output line 3 clocks low, flip-flop
~16~ is set and the strobe input to line receiver Ul is set high
synchronous with the beginning of the next speed data message. The
CTS input line is pulled up to +5 volts through a resistor to provide
continuous data transmission if this inpu,t is not used.
.:
3-34
r ELECTRONICS UNIT (UNIT I)
------ +
”
SPEE 0 OUT
+
5OfA
HEF
FIG3 I SODA 16. BIT
D-TYPE
FLIP-FLOP
LATCH
UII.UI‘? - WEFERENCE
CONVERTER
AC IN
-
-1
D5-Dl
NL’L I
5! 3PEN -50 TO +50
r
0 xR 5; :LOSED 0 TO t40
F ICP
1 --~
05 0
J
+5v
_--_--.~-- 10 u20
+5v
L _- __-_-
_..-_.._l.
L
--
3-35/(3-36 blank)
SECTION 4
TROUBLESHOOTING
4.1 GENERAL
4-l
Table 4-l. Test Procedure
Action Response
c. M indicator illuminates
4- 2
Table 4-l. Test Procedure-(Continued)
Action I Response
4-3
Q
I Table 4-2. Troubleshooting Chart
Q
Test
Procedure
Fault Ref Probable Cause Correction
Note 1: If Fl fails immediately upon replacement, disconnect 2AZAl Jl and replace Fl.
If Fl fails again then RVl or FL1 on 2A2 is probably shorted. If Fl does not
fail, disconnect PCBs and reconnect 2A2Al Jl. Next reconnect one at a time the
PCBs in Master Display until fault is isolated. Start with Power Supply
Assembly 2AlA3.
Table 4-2. Troubleshooting Chart-(Continued)
C
Test
Procedure
Fault Ref Probable Cause Correction
Test
Procedure
Fault Ref Probable Cause Correction
Note 2: Before replacing any board in Electronics Unit, first check for loose
cables or connections. Next check Electronics Unit power supplies and
fuses (See Fig. 6-2).
1 ) ) )
3
3
Test
Procedure
Fault Ref Probable Cause Correction
Note 3: A large AC ripple seen across lA4 'IBl pins 14 and 15 and across pins 10
and 11 indicates loss of regulation or filtering of +32 VDC supply.
Troubleshoot using Fig. 6-2.
Transducer or Transducer cable could be at fault. Remove Transducer
connections and add dummy loads to see if transmitters work correctly
into dummy load. See Table 4-3 on Transducer Assembly Resistance
Measurements.
r
Test
Procedure
Fault Ref Probable Cause Correction
MEASURE BETWEEN
ELECTRONICS UNIT
WIRES REMOVED FROM
CIRCUIT lA4 TBl PINS RESISTANCE
4-11/(4-12 blank)
4.4 SYNCHRO SPEED OUTPUT FAULT IDENTIFICATION
P A fault in Synchro Output Assembly lA6 can be easily iden-
tified by comparing the output of the synchro speed repeaters with the
Master Display Unit speed indication. Because of rounding up of the
speed value to the nearest IJlO knot by the Master Display TJnit, the
speed values may differ slightly. If the speed values track within
l/10 knot and the synchro speed output is stable, the channel can be
assumed to be operating properly. If the synchro output speed does
not agree with the Master Display Unit, open the Electronics Unit and
check for proper synchro reference voltage at card 196 terminal TEZ-1
to TBl-2. If reference voltage is correct (115 vat, 60 Hz for dash 1
card or 115 vat, 400 Hz for dash 2 card), then card 1.46 is probably at .
fault.
4-13/(4-14 blank)
SECTION 5
P MAINTENANCE AND ALIGNMENT
5.1 GENERAL
WARNING
With Power MODE switch in the OFF position, high
voltage can still be found in the Electronics
Unit. AC POWER (HOT) is found on pins 17 and 18
of,lA4 TB1 and AC POWER (NEUTRAL) is found on pins
20 and 21 of lA4 TBl. AC power is also present on
fuses Fl and F2, line filter FLl, and Power MODE
switch Sl of AS. Power must be removed at ship's
source before removal or servicing of A4 and A5.
CHANGE 1 5-l
::.
was'also changed. Because of the difference in signal/pin relation-
ship, the early version and late version of the cards cannot be inter-
mixed. The Electronics Unit must be configured with either both early
type cards and the early type cable or with both later type cards and
the later type cable. The early type cable (PN T966252) has black and
white wiring in twisted pair. The later type cable (PN T966252
Rev. A) has red.and white wiring in twisted pair. The following table
.outlines the part number compatibility.
Card Card Cable
1Al lA2 T966252
Compatible (SNl thru SN661 1976171 1976183 Blk/Wht
Compatible (SN67 and Up1 1976889 1976891 Red/Wht
Not Compatible 1976171 1976891 Neither
Not Compatible 1976889 1976183 Neither
WARNING
5-2 CHANGE 1
-.
5.4 ALIGNMENT AND BOARD PARTS LAYOUT
P
This section contains all the field serviceable adjustments
that need to be made if a PCB is changed. 'Board parts layout for each
PCB is given to aid in alignment and troubleshooting.
5.4.1 RADIO FREQUENCY TRANSMITTER/RECEIVER 1Al (1976171 or 1976889)
Figure 5-l gives the parts layout for 1Al. Removal of 1Al is
obvious and requires only a phillips head screwdriver. Make sure all
plugs are marked before removing. Adjustments must be made to board
during installation or if board is changed. These adjustments are
fore and aft transmit power and fore and aft threshold level. Each
adjustment procedure is given in subsequent subsections.
5.4.1.1 TRANSMIT POWER ADJUSTMENT
The following adjustments are to be made with the Transducer
connected.
Fore Channel Adjustment
I /
-
CR2 --lxm-
rm nf
$J-0;
1
I2
-Jig---
0
CR I2
IIt
I’ I”‘“1 Irix.., I
/ / I \ \
RI35 CONNECT RI37 RI36 CONNECT CONNECT SCOPE RIOI
SCOPE HIGH (THRESHOLD AFT ADJ) SCOPE HIGH GROUND HERE ‘(POWER ADJ AFT)
(THRESHOLD SET) (THRESHOLD AFT) (THRESHOLD AFT)
CHANGE 1 5-7
4. Find present percentage of change already entered on Sl.
Table 5-1 gives a listing of all combinations of Sl
switches and the percent change from null that each com-
bination provides. Find Sl in the Electronics Unit. It
is the only dip switch located on the A2 board. Read the
switch positions. Use Table 5-l to determine present per-
centage of change. Make this number negative if SW1 is
open and positive if SW1 is closed.
5. Add the percentage of change needed to the present per-
centage of change found in step 4.
6. Find that percentage on Table 5-l. Read across to -find
the switch positions to produce that percentage. Change
switches to input the new percentage. If results from
step 5 were negative, then SW1 should be open. If posi-
tive, then SW1 should be closed.
Example:
1. Actual Speed of Vessel: 24 knots
Displayed Speed: 25 knots
2. Actual Speed minus Displayed Speed = -1 knot
3. (-1 knot/Displayed Speed) 100 = -4 percent
4. If the switches of Sl had the following switch positions:
SW1 SW2 SW3 Sw4 SW5 SW6.
C C c C 0 0
0 = Open
C = Closed
Then using Table 5-l the present percentage change is
+1.94 percent.
5. -4 percent + 1.94 percent = -2.06 percent,
6. 2.06 is closest to 2.10 on Table 5-l. Recause result is
negative SW1 must be open. This gives the following
switch positions.
SW1 SW2 SW3 SW4 SW5 SW6
0 C 0 C 0 0
5-a
91 SI
SPEED s2 SPEED s2
ADJUSTMENT PAOCESSdR JUMPER POINTS ADJUSTMENT PROCESSOR JUMPER POINTS
SWITCH RESET FOR SOD FORMAT ‘SWITCH RESET +OR SOD FORMAT .
(1976163) USED ON SYSTEM SNI THROUQH SN66 (1976691 1 USED ON SYSTEM SN67 AND UP 1
(FOR REFERENCE ONLY 1
I
B Change From
Yull Position SW1 sw2. SW3 SW5 SW6
5.00 0
7
4.84 0
4.68 0
4.52 0
4.35 0'
4.19 0
4.03 -- 0
3.87 I I 0
3.71 T 0
3.55 0
3.39 I ::cc I 0
3.23 -I g 1 0
3.06 0 0 0 >. C C
2.90 0 C 0 C C
2.74 0 0 C C C
2.58 0 C C C C
2.42 C 0 0 0 0
2.26 C C 0 0 0
2.10 C 0 C 0 0
1.94 C C C 0 0
1.77 C 0 0 C 0
1.61 C C 0 C 0
1.45 C 0 C C 0
1.29 C C C C 0
1.13 C 0 0 0 C
0.97 C C 0 0 C
0.81 0 C 0 C
0.65 C C 0 C
0.48 0 0 C C
0.32 C 0 C C
0.16 0 C C C
0.00 C C C C
0 = Open
C = Closed
5-11
5.4.3 POWER SUPPLY DC ASSEMBLY 1A3 (1976181) m.
Figure 5-3 gives the parts layout for lA3. Removal of lA3
requires first removing a bracket using a l/4" hex head screwdriver.
Next use a phillips head screwdriver to remove board from bracket.
Make sure all plugs are marked before removing. R13 of PCB must be
adjusted during installation or if board is replaced. Adjustment of
R13 given below in subsection 5.4.3.1.
5.4.3.1 +5 VDC ELECTRONICS UNIT.POWER ADJUSTMENT
1. Switch Power MODE switch to LOCAL.
2. Connect Digital Voltmeter (+) lead to TPl and (-) or
ground lead to TP2.
3. Adjust R13 for +5.0 VDC 2.05 MC.
4. Return Power MODE switch to OPERATE.
5-12
RI3 +SbDC +SVDC JI
L-
VRI
-L ---E+--
--Eicl-
I37
-%z-
-I-
C7
IL10
.
Figure 5-3. Power Supply DC
Assembly lA3 (1976181)
S-13/(5-14 blank)
5.4.4 SPEED/DISTANCE DISPLAY ASSEMBLY 2AlAlAl (1976336)
r‘: Figure 5-4 gives the parts layout for 2AlAlAl. Removal of
2AlAlAl requires first performing the procedure detailed in subsection
5.3. It is necessary to remove Power Supply Assembly 2AlA3,, and
Display Processor 2AlA2 before 2AlAlAl can be removed. Board removal
is obvious and requires only a phillips head screwdriver. Make sure
all plugs are marked before removing. If P3 and P4 are reversed
during reassembly PANEL DIM and DISPLAY DIM will be reversed. A fault
in the Overlay Assembly 2AlAlA2 (1976486) which contains the membrane
switches requires the removal and replacement of Display Assembly
2AlAl (1976482). A fault in the liquid crystal display requires the
removal and replacement of 2AlAlAl. During installation switch Sl on
2AlAlAl is checked or if board is replaced Sl is checked in accordance
to 5.4.4.1 below.
5.4.4.1 DISPLAY MODE SWITCH 2AlAlAl Sl
1. Checking Sl does not require removal of 2AlAlAl. Remove
2Al assembly as detailed in 5.3.
2. Locate 2AlAlAl. It is the board at the bottom of the
piggyback stack and directly against the face of the unit.
3. Locate Sl switch 4.
Switch 4 is open for a Master Display
Switch 4 is closed for a Remote Display
S-15/(5-16 blank)
SI
--am---d
n r-l -ma- -ckKl-
- r-4 0
t us UI1
a n rl II El
oz
I II
I
I I
I u
Q
06’ DS4 OS5
J5
bJ
0 a 0
S-19/(5-20 blank)
u
I4
u
$I -
I
U3 RI7
us UID
0 I
UIZ
UZ
~
1 L
ue
uie
U6
2. Carefully pull 2Al from case until 2Al can be set face
downward.
3. Power is connected to the Power Supply Assembly. Do not
touch components with hands.
4. +5 VDC adjustment R22 is found on Power Supply Subassembly
2AlA3Al (1976338). It is the top board of the 2Al piggy-
back board assembly.
5. Lift 2Al assembly and press POWER ON.
5-23/(5-24 blank)
I
Si PROCESSOR
RESET DISTANCE
RELAY CLOSURE
JUMPER PINS
:i
-1I II
1.
TP2
0
IPI
n
L-J
m
R22
+&DC ADJUST\-
q TP3
5El l-U-1
UI u9
R26/
t5V EAT ADJUST
-i, ~
5-27
__jc FORWARO
TRANSOUCER CABLE
TRANSOUCER
ALIGNMEM’FLAT
TRANSDUCER CLAMP
SEA-CHEST CAP
-,,
ML4 PLATE
5-28
IIII- IIII
POUR SPOUT
5-29
-
13. De&d
14. Remove Transducer Assembly from sea-chest cap. Cut cable
close to transducer to facilitate removal from sea-
chest cap.
. ..
. NOTE
. .
If for any reason the Transducer Assembly
cannot be replaced after removal, then the
naked end of the cable returning to the
Electronics Unit should be protected from
environmental damage,,
5-30 CHANGE 2
1. Replace O-rings on the inside of sea-chest cap.
2. Clean sea-chest cap as necessary for replacement of
gasket.
3. Using silicon grease, grease O-rings, sea chest gasket,'
and replacemenk Transducer Assembly stem. Place gasket
on sea-chest.
4. Thread Transducer cable through sea-chest cap so that
Transducer is fully seated inside sea-chest cap.
5. Place sea-chest cap on gate valve and attach with 4
bolts.
. 6. Attach Transducer clamp to Transducer but do not tighten
so that clamp has free m3vement on Transducer stem.
Open gate valve. This should require 10 to 12 full
turns.
a. Push Transducer down into sea-chest until. . it. seats.
Transducer can catch upon internal projections and
cause a false seating. Subtract measured distance "Xn
recorded in Paragraph 5.5.2 step 2 from 14 inches (35.6
cm). The result of this subtraction is the length of
Transducer stem which should be projecting from the top
of the sea-chest cap when the Transducer is properly
seated. Wiggle Transducer while pushing down to unlodge
false seating.
NOTE -
Water pressure can push Transducer up in
sea-chest after it is seated. Until
transducer clamp is tightened, hand
pressure is necessary to keep Transducer
seated and flush with the hull.
9. Align Transducer so that alignment flat on top of trans-
ducer stem is facing forward and is 90' to keel line of
vessel.
10. Reinstall two allen head screws and lockwashers into
Transducer clamp, securing clamp to sea-chest cap.
Tighten so that Transducer clamp is still loose.
11. With Transducer seated and aligned, tighten Transducer
clamp onto Transducer.
12. Finish tightening screws attaching Transducer clamp to
sea-chest cap.
5-31
The remaining steps are used in making the cable splice. See
Figure 5-8. Use materials in the- In-Line-Splicing Kit 1806913.
NOTE
The Transducer Assembly comes with 30 feet of
cable. This cable has to be spliced to the
cable coming from the Electronics Unit.
During installation as little of the 30 feet
of Transducer cable as possible should be
used, but bear in mind that:
A. Solice reuuires matins cables to be hori-
zontal and stable.
B. Future splices have to be made above
installation splice.
. Cut cable above and close to previous splice.
. Remove Transducer Assembly from sea-chest cap. Cut cable
stub close to transducer to facilitate removal from sea-
chest cap.
13. If cable is armored, cut outside armor back 12 inches and
tape ends of armor.
14. Strip outer insulation back 5-l/2 inches and remove
insulation on ends of cables to be spliced together.
15. Scuff remaining outer insulation on both ends for a
distance of six inches with sandpaper.
16. Separate all the conductors and shield wires and remove
filler materials.
NOTE
The four conductors of each end are separated
into two pairs. One pair is black and the
other pair is red. This should be written on
the insulation of the pairs. Connect red pair
to red pair and black pair to black pair. Each
pair has a shield wire. Be sure to connect the
shield wires of the red pairs together and the
shield wires of the black pairs together. If a
red pair is accidentally connected to a black
pair, the SRD-331 will read speed in reverse
of what it actually shbuld be.
17. Stagger the four conductor splices. Strip conductors
back half the length of butt connectors.
5-32 CHANCE 2
18.Splice conductors and shields with crimper and butt
connectors.
P
19.Wrap the butt splices with electrical tape to insulate
them.
20.Install sealing collars with supplied elongated tape.
Make collars three layers thick.
21.Install mold ensuring a tight fit. Pliers may be used
to snap the mold halves together. Check to see that
both seams are completely snapped together. An error
in seating mold will result in loss of epoxy.
22.Wrap ends of mold with supplied elongated tape to seal
them.
23.Install pouring spouts.
24.Mix epoxy compound as specified on Scotchcast 2104 pouch.
A- ‘\
CHANGE 2 5-32a/(5-32b Blank)
25. Tip splice so that one pouring spout is higher than the
P other. Pour epoxy into high end of mold through spout..
26. Epoxy requires at least two hours to harden and set and
even longer in cold temperatures. Splice should remain
in a horizontal position so that spouts are pointing up
and epoxy cannot run out until it hardens.
5-33
NOTE
Do not use slip-joint pliers or other
means of attaching to Transducer stem.
This could damage glass epoxy stem.
6. Using a turning motion, try pulling Transducer up in
sea-chest. Use prying tools if mechanical assistance
is needed 'between clamp and sea-chest cap..
7. Continue raising Transducer using a combination of
steps 4, 5, and 6 until approximately 11 inches (27.9
cm) of the Transducer stem is showing above the sea-
chest cap.
a. Close gate valve. For most gate valves this requires
10 to 12 full turns. If Transducer hits gate valve,
repeat steps 4, 5, and 6.
9. Screw the two dllen head screws and lockwashers,
which were removed in step 3, into the two vacant
holes in the top of ,the sea-chest cap. This is done
for safekeeping of the screws and washers.
8. Lowering the Transducer
1. Follow the same procedure detailed in A.1 and A.2 for
raising the Transducer.
2. Remove the two allen head screws and lockwashe,rs from
the top of the sea-chest cap. .
3. Loosen Transducer clamp so that it falls onto .the top
of the sea-chest cap.
4. Open gate valve. This should require 10 to 12 full
turns.
5. Lubricate Transducer stem with silicon grease.
6. Push Transducer down into sea-chest until it seats.
Transducer can catch upon internal projections and
cause a false seating. Subtract measured distance IrXtl
recorded in Paragraph 5~5.2 step 2 from
14 inches (35.6
-1 l
The result of this subtraction is
the length of
Transducer stem which should be projecting from the top
of the sea-chest cap when the Transducer is properly
seated. Wiggle Transducer while pushing down to unlodge
false seating.
5-34
NOTE
p
Water pressure can push Transducer up
in sea chest after it is seated. Until
Transducer clamp is tightened, hand
pressure is. necessary to keep Transducer
seated.
7. Align Transducer so that alignment flat on top of
Transducer stem is facing forward and is 90° to keel
line of vessel.
8. Reinstall two allen head screws and lockwashers into
Transducer clamp, securing clamp to sea-chest cap.
Tighten so that Transducer clamp is still loose.
9. With Transducer seated and aligned, tighten
Transducer clamp onto Transducer.
10. Finish tightening screws attaching Transducer clamp
to sea-chest cap.
Tool List
1. Flashlight (2)
2. 3/16 Allen Head Key (wrench)
(7 3. Measuring Device (ruler, measuring tape)
4. Prying Tools
5. Silicone Grease (DC41
CLEANING
TRANSDUCER ASSEMBLY CLEANING
CAUTION
5-35
The Trans.ducer Assembly should never be painted. If the
Transducer Assembly is accidently painted, clean the paint off with
paint thinner, such as turpentine: then clean as described dbove to
ensure that no solvents remain.
5.7.2 CLEANING MASTER DISPLAY SWITCH PANEL
The display panel can be cleaned with alcohol and a soft
cotton cloth. Trichloroethylene can. be used for hard-to-remove
stains. Do not allow cleaner to run down into bezel seal, as it can
affect adhesives used in the panel.
5-36
5.8 REMOVAL AND REPLACEMENT OF SYNCHRO OUTPUT ASSEMBLY 1A6
.1c""c14\ (1976886)
i
i
WARNING
Synchro reference power is applied to terminals
lA6TB2 even when the Electronics Unit is turned
off. Before removing card lA6, turn off synchro
reference power at its source and tag source unit
out of service until card replacement has been
completed.
Figure 5-9 gives the parts layout for 1~6. Removal of 146
is obvious and requires only a phillips head screwdriver. Removal
requires first removing and tagging wires from terminal boards 146TBl
and lA6TB2 on the board. No installation adjustments are required.
If the board is replaced, switch Sl must be set to the same posi- -~
tion as on the board removed.
5-37/(5-38 blank)
u
I
I
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Ul3
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UQ
----
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-
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.
6-1
+.
..
I TRANSD~JCEFI suB~$is~ 1
/P/N 03956 - 185807fl 1
-42.72 )----
1llr -A---M-
------
-_-
-- ---
--- --. ---
I--012
--I (I. 250)
(16.00)
I
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.
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C
3
.
a
7
i
DISPLAY ti”CESSOR
Il,76l.Ol
OISCQErE a TESl
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--.-.--.-ii’
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ELECTROklC
pm AI
COYPOMEkl S”B;SSf”tiLY
11,7653Ot
/ co*7 OM SHT 2
--. -- -_--_-- ._--__-__----~_---- _______.. -- ____ -.- .__ -_-__--_-___ _______ -__-__-__-
6-g/(6-10 blank)
-_________ / --------------------- WI r-------------m___-_
_--____-
- __-______----_ /
I
j. .--
. .--P--F
L I_---. -- - J I1 1
I Pm AI
ELECTRONIC COUPOMCNT SL~AS.SEU~-Y
LLECTIIDNIC COYr&N- SL.*SsE”BL~
L __-________-__
?OWCRsup*.r
ll97S9Yl.
---e* _______ -__------ ----- - ----_--- --- -I L ---_- -
11¶?65901
CON-? FROM SH- I
---__-__ ----
6-11/(6-12 blank)
I
PARTS
LIST
NmENCLCiTlJ~E
IlEFEREtICE CODE wft’r tllv OR
OESIG IIiENT Il,EtITIFYItG HO DmxIP’rItiN
>
i i-illll’llitl Pm rs 3
C,3Y’S6 i’?76fx&-VAR ELf:CTflclNIC IJN1-f
HEL:EIVER/
TfuvtSllITTER
‘I
f’OWEfi SlIPPLY I .I
or . ASSEI1tiL.Y
1iCtSt:El 1
Ci:iNWtN PARTS 1
30 REF i) 3 <;ic;[j .197tSHG OlITLINE/INs~rL s
DRAWING,
SRD-331fl SYSTEll
CLAMP, r:irul..E,
ADHESIVE BACKED
CLAHP, LGGP
CLAMP * LGGP
O:39c;t
. J 1GOS637 LABEL EPRE8StJRE !;Ertsl i IVE v 19
ADHESIVE3
al
P
I
Figure 6-4. SRD-331M Electronics Unit, Assembly Drawing
ul (Sheet 3 of 7) '
’
?
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I
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LIST =+ SPERW SPERRY CORmRATION
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LIST D
RN OAT5 83-42-49
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03956 497.5423-VAR SRD-334 DISPLAY 2
UNIT VARIABLE
3 VARIABLE
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Figure 6-7. Master Display Assembly Drawing
(SheetZof4) I
PARTS
LIST SPERW SPERRY
C*RPoR*TION
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LIST
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[VARIABLE PARTS)
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PARTS
LIST
SPERW SPERRY COAWRATION
C”ARLOT,ESVILLE. “A PSDB
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2 VARIABLE
3 VARIABLE
CCONtlOt4 PARTS I
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3 VARIABLE
6 VARIABLE
7 VARIABLE
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9 VARIAiLE
11 VARIABLE
$2 VARIABLE
43 VARIABLE
14 VARIABLE
15 VARIABLE
16 VARIABLE
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7.1 GENERAL
This section contains installation drawings for the Sperry
SRD-331 Doppler Speed Log.
7.2 INSTALLATION ALIGNMENT
7-l/(7-2 blank)
I
I
2X
,NCL”OCD WITH OISPLA‘I
UNIT
[Il.{]
1.1
S.,
s..
8.8
8.‘
I.1
L.
r10,
U261 so I1 (1s It)
4.5 1XE TAAXWJCft YllCC Wtt MO1 AWIll WE lIlTIN
IXSlALUlIQ.
b.1 CAIlf ut fLfclnIcAI IfDulIf)(tYls:
:.
6.6.1 WlUAL WACIlA.YCf IS Y, ?f/fl MAX Al I Ul2.
Lb.2 UPACIIAKI WULAW It Lfll 1WJl 10X.,
6.63 cn~~ciftlsiic Iwf~*~tf Is bfitzfX n m PO a4
&.I DtSlUlfD CLlLf CDcDl tmlllC I1 SYY IQ WLK TWfS
II fllS1 tDluol Of 1MLf III. CULL WES BAT CPITAII
IX111 YIIES. 1191 EW Aim TIE WAXE Yllfl II CMLI.
6.8 llf CANE SiIlflDS 10 111 8 Ot 181 IX DIPUT AS
MfUlsAll 10 Ifcucf fLfClXIul WIP.
b.V llf UILE sllIfLOt IX flfclnalCf Ull 10 A4 yylo
)*uylIYG LUG. llf At CIQYO 10 IVJMlIIC SUN.
6.10 Ullf l&51 swcYP0 XffflfKf IS 11s wt. hoon
ClJlfUl It RI b%lS, 1.5 VA KAX, KALE0 10 0 TO 10
01 -33 10 *so MlS (lrlfwAllr SfLfClMLf).
Transducer Splice I
I
J, b+ -.~~~l--???~
output,
-v
,- I UI u9
t JV BAT
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ADJUST - “fiq-Ry
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IF -
’ 033
I; 034
-.-~ ---T-m.3
____ --.
TO
20 fi
/
0
L- ---- -. ---7 --
A-l
A.2 STANDARD SPARE PARTS KIT (18063631
Lockwasher 2 MS35338-139
Socket Head Screw Key '1 56232-0181-10
Gasket 2 1856911
A-2