DP2269

High Performance Current Mode PWM Controller

Product Specification
GENERAL DESCRIPTION
DP2269 is a highly integrated current mode PWM
control IC optimized for high performance, low FEATURES
standby power and cost effective offline flyback
■ Less than 75mW Standby Power at Universal
converter applications.
Input
PWM switching frequency at normal operation is
■ Power on Soft Start Reducing MOSFET Vds
internally fixed and is trimmed to tight range. At no
Stress
load or light load condition, the IC operates in
■ Frequency Shuffling for EMI
extended burst mode to minimize switching loss,
■ Fixed 65KHz Switching Frequency
which can achieve less than 75mW standby.
■ Internal Synchronized Slope Compensation
VDD low startup current and low operating current
■ Low VDD Startup Current and Low Operating
contribute to a reliable power on startup and low
Current
standby design with DP2269.
■ Built-in Leading Edge Blanking
DP2269 offers comprehensive protections
■ On-chip Thermal Shutdown
coverage with automatic self-recovery feature
■ Soft Gate Driver for Good EMI Performance
including Cycle-by-Cycle current limiting (OCP),
■ Over Load Protection
over load protection (OLP), on-chip Thermal
■ Cycle-by-Cycle Current Limiting
Shutdown (OTP), VDD over voltage protection
■ VDD Under Voltage Lockout with Hysteresis
(VDD OVP) and VDD under voltage lockout
(UVLO)
(UVLO), etc. Excellent EMI performance is
■ VDD OVP & Clamp
achieved with frequency shuffling and soft totem
pole gate drive
The tone energy at below 20KHz is minimized in APPLICATIONS
the design and audio noise is eliminated during
operation. Offline AC/DC flyback converter for
DP2269 is offered in SOP8 package. ■ AC/DC Adapter
■ Open-frame SMPS

TYPICAL APPLICATION

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High Performance Current Mode PWM Controller

Package Dissipation Rating

GENERAL INFORMATION Package RJA (℃/W)
Pin Configuration SOP8 150
The pin map of SOP8 package is shown as below.
Absolute Maximum Ratings
Parameter Value
VDD Zener Clamp Voltage VDD_Clamp
VDD Clamp Continuous
10 mA
Current
CS Input Voltage -0.3 to 7V
FB Input Voltage -0.3 to 7V
GATE Voltage Range 20V
Maximum Operating Junction
150 oC
Temperature TJ
Min/Max Storage Temperature
-55 to 150 oC
Tstg
Lead Temperature (Soldering,
260 oC
10secs)
Note: Stresses beyond those listed under “absolute maximum
ratings” may cause permanent damage to the device. These
are stress ratings only, functional operation of the device at
these or any other conditions beyond those indicated under
Ordering Information “recommended operating conditions” is not implied. Exposure
Part Number Description to absolute maximum-rated conditions for extended periods
DP2269 SOP8, Pb free in T&R may affect device reliability.

Marking Information

DP2269 for product name;

XXXXXX The first X reresents the last year,2014 is 4; The second X represents the month, in
A-L 12 letters;The third and fourth X on behalf of the date, 01-31 said; The last two X represents
the wafer batch code.

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High Performance Current Mode PWM Controller

TERMINAL ASSIGNMENTS
Pin Num Pin Name I/O Description
1 GND P Ground.
Feedback pin. The loop regulation is achieved by connecting a
2 FB I photo-coupler to this pin. PWM duty cycle is determined by this pin voltage
and the current sense signal at Pin 4.
3 VDD P Power supply.
4 NC - No connection.
5 NC - No connection.
6 CS I Current sense input.
7 VDD P Power supply.
8 GATE O Totem-pole gate driver output to drive the external MOSFET.

BLOCK DIAGRAM

RECOMMENDED OPERATING CONDITION

Symbol Parameter Min Max Unit
VDD VDD Supply Voltage 11 26 V
TA Operating Ambient Temperature -40 85 o
C

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High Performance Current Mode PWM Controller

ELECTRICAL CHARACTERISTICS
(TA = 25OC, VDD=18V if not otherwise noted)
Symbol Parameter Test Conditions Min Typ Max Unit
Supply Voltage Section (VDD Pin)
Start-up current into VDD
IVDD_st 2 10 uA
pin
IVDD_Op Operation Current VFB=3V,GATE=1nF 1.2 2 mA
IVDD_standby Standby Current 0.4 1 mA
VDD Under Voltage
VDD_ON 13.5 14.5 15.5 V
Lockout Exit
VDD Under Voltage
VDD_OFF 8.6 9.4 10.2 V
Lockout Enter
VDD_OVP VDD OVP Threshold 27 28.5 30 V
VDD Zener Clamp
VDD_Clamp I(VDD ) = 7 mA 30.5 32 33.5 V
Voltage
Feedback Input Section (FB Pin)
VFB_Open FB Open Voltage 4.5 5.4 6 V
Short FB Pin to GND,
IFB_Short FB Short Circuit Current 0.3 mA
Measure Current
ACS PWM Gain ΔVFB/ΔVCS 2.0 V/V
FB Under Voltage GATE
Vskip 1.0 V
Clock is OFF
Power Limiting FB
VTH_OLP 3.6 V
Threshold Voltage
Power Limiting Debounce
TD_OLP 43 ms
Time
ZFB_IN FB Input Impedance 20 Kohm
Current Sense Input Section (CS Pin)
CS Input Leading Edge
TLEB 250 ns
Blanking Time
Vcs(max) Current limiting threshold 0.97 1.0 1.03 V
Over Current Detection
TD_OCP 70 ns
and Control Delay
Oscillator Section
Normal Oscillation
FOSC 60 65 70 KHz
Frequency
ΔF(shuffle) Frequency Shuffling
-4 4 %
/FOSC Range
Maximum Switching Duty
DMAX 66.7 %
Cycle
Burst Mode Base
FBust 22 KHz
Frequency
On-chip Thermal Shutdown
TSD Thermal Shutdown --- 165 -- °C

TRC Thermal Recovery 140 -- °C

GATE Driver Section (GATE pin)

VOL Output Low Level Igate_sink=20mA 1 V
VOH Output High Level Igate_source=20mA 7.5 V
VG_clamp Output Clamp Level VDD=24V 16 V
T_r Output Rising Time GATE=1nF 150 ns
T_f Output Falling Time GATE=1nF 60 ns

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High Performance Current Mode PWM Controller

CHARACTERIZATION PLOTS

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High Performance Current Mode PWM Controller

OPERATION DESCRIPTION
DP2269 is a highly integrated current mode prevents the sub-harmonic oscillation and thus
PWM control IC optimized for high performance, reduces the output ripple voltage.
low standby and cost effective offline flyback
converter applications. The IC can achieve less  Extended Burst Mode Operation
than 75mW standby power and helps the design At zero load or light load condition, most of the
easily to meet the international power power dissipation in a switching mode power
conservation requirements. supply is from switching loss on the MOSFET
transistor, the core loss of the transformer and
 Startup Current and Start up Control the loss on the snubber circuit. Reducing
Startup current of DP2269 is designed to be very switching events leads to the reduction on the
low so that VDD could be charged up above power loss and thus conserves the energy.
UVLO threshold level and device starts up DP2269 self adjusts the switching mode
quickly. A large value startup resistor can according to the loading condition. At no load or
therefore be used to minimize the power loss yet light load condition, the FB input is below burst
reliable startup in application. mode threshold level. Device enters Burst Mode
control. The Gate drive output switches only
 Operating Current when VDD voltage drops below a preset level
The operating current of DP2269 is as low as and FB input is active to output an on state.
1.2mA. Good efficiency is achieved by the low Otherwise the gate drive remains at off state to
operating current together with extended burst minimize the switching loss thus reduce the
mode control schemes at No/light load standby power consumption to the greatest
conditions. extension. The nature of high frequency
switching also reduces the audio noise at any
 Soft Start loading conditions.
DP2269 features an internal 4ms (typical) soft
start to soften the electrical stress occurring in  Audio Noise Free Operation
the power supply during startup. It is activated DP2269 can provide audio noise free operation
during the power on sequence. As soon as VDD from full loading to zero loading.
reaches UVLO(OFF), the peak current is
gradually increased from nearly zero to the  On-chip Thermal Shutdown (OTP)
maximum level of 1V. Every restart up is When the IC temperature is over 165 OC, the IC
followed by a soft start. shuts down. Only when the IC temperature drops
to 135 OC, IC will restart.
 Oscillator with Frequency Shuffling
PWM switching frequency in DP2269 is fixed to  VDD OVP and Zener Clamp
65KHz and is trimmed to tight range. To improve When VDD voltage is higher than 28.5V (typical),
system EMI performance, DP2269 operates the the IC will stop switching. This will cause VDD
system with 4% frequency shuffling around fall down to be lower than VDD_OFF (typical
setting frequency. 9.4V) and then the system will restart up again.
An internal 32V (typical) zener clamp is
 Current Sensing and Leading Edge integrated to prevent the IC from damage.
Blanking
Cycle-by-Cycle current limiting is offered in  Soft Gate Drive
DP2269. The switch current is detected by a DP2269 has a soft totem-pole gate driver with
sense resistor into the CS pin. An internal optimized EMI performance. An internal 16V
leading edge blanking circuit is built in. During clamp is added for MOSFET gate protection at
this blanking period (250ns, typical), the higher than expected VDD input. Too weak the
cycle-by-cycle current limiting comparator is gate drive strength results in higher conduction
disabled and cannot switch off the GATE driver. and switch loss of MOSFET while too strong
gate drive output compromises the EMI.
 Synchronous Slope Compensation Good tradeoff is achieved through the built-in
In DP2269, the synchronous slope totem pole gate drive design with right output
compensation circuit is integrated by adding strength and dead time control. The low idle loss
voltage ramp onto the current sense input and good EMI system design is easier to achieve
voltage for PWM generation. This greatly with this dedicated control scheme.
improves the close loop stability at CCM and

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High Performance Current Mode PWM Controller

Package Dimension
SOP8

尺寸(毫米) 尺寸(英寸)
符号
最小 最大 最小 最大
A 1.350 1.750 0.053 0.069
A1 0.100 0.250 0.004 0.010
A2 1.350 1.550 0.053 0.061
b 0.330 0.510 0.013 0.020
c 0.170 0.250 0.006 0.010
D 4.700 5.100 0.185 0.200
E 3.800 4.000 0.150 0.157
E1 5.800 6.200 0.228 0.244
e 1.270 (中心到中心) 0.050 (中心到中心)
L 0.400 1.270 0.016 0.050
θ 0º 8º 0º 8º

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