Digital 3
Digital 3
SCHOOL OF ENGINEERING
GROUP MEMBERS
Assignment submitted to the Department of Electrical and Computer Engineering in partial fulfillment for
requirement of the award of an undergraduate degree at Makerere University.
8th-November- 2019
Figure 1 showing circuit design
Truth table
Counting state 1ST traffic light 2ND traffic light 1st traffic light for 2NDtraffic light
for cars for cars pedestrians for pedestrians
R1A1G1 R2A2G2 R1A1G1 R2A2G2
Since pedestrian’s lights operate in the same way, we only included two to represent all
the four.
From the truth table, (110) counting state is similar to the first counting state therefore, we
required a (MOD-6) counter circuit to go through all the counting states, and this was
implemented using three D-type flip-flops. The circuit design is such that the counter counts
from 0 to 5, and then on the 6th count it automatically resets to begin the count again.
It starts as a MOD-8 counter and we then identify the binary sequence 110, which is 6 in
decimal. Since this binary sequence is different from the rest, we identify the last two most
significant bits (sequence of 1’s) and feed them into an AND gate. The output from the AND
gate is then used to control the RESET function on all three flip-flops. The counting states of the
counter and frequency of the clock pulse help in the automation of the circuit and changing of
state of the lights.
The three bits of the counter are fed into two 3 line to 8 line decoders, to obtain the proper
operation, the enable inputs of the decoders are kept in their active states. Because we are using a
mod-6 counter, the last two outputs of the decoders are not utilized therefore are not connected.
Depending on the counting state, one of the outputs of the decoders is activated and because
these outputs are active low, we needed to connect them to inverters since the traffic light inputs
are active high. Since the decoder outputs are 6 and the traffic lights take in three inputs, we
connect the inputs that activate the same traffic light colour to a NAND gate and connect its
output to the input of that specific traffic light colour.
For instance, for the first traffic light, the first, and the last two counting states activate red light.
We therefore connect these outputs to a 3-input NAND gate following the truth table below
Counting state State at first State at second last State at last NAND inputs NAND output
red output red output red output
From the truth table, the nand output is high every time the red output is to be activated and this
occurs thrice in a counting sequence.
As for the pedestrian lights, it is designed in that they can only cross when all the cars have
stopped for safety reasons and this occurs in the fifth counting state as shown in the very first
truth table showing circuitry operation. In the fourth state, the amber light is activated for them
as an indicator to get ready to cross, and it is later activated for them immediately after the green
light. then in the rest of the states, it is designed that their red light is on since it will not be safe
for them to cross.