Texas Instruments - IT Dept.

| TI Automotive mmWave Sensors Device Overview

Hello and welcome to the device overview for TI's AWR1x family of single-chip CMOS-based mmWave radar sensors. In this video,
we'll start with a brief introduction of TI's mmWave sensors, look at the signal processing chain as it relates to these devices and a
few system topologies in which these devices can be deployed. We'll then get into the details of these devices, touching upon the

major functional blocks. Finally, we'll go over the boot modes and a quick overview of the software development platform available
for developing with TI's mmWave sensors.

Let's start with a brief overview of the devices. The AWR1243, 1443, and 1642 belong to the AWR1x family of single-chip mmWave

radar sensors for Advanced Driver Assistance Systems, or ADAS applications. These devices are capable of operating in the 76- to
81-GHz band, with up to 4 GHz continuous CHIRP bandwidth.

These devices are built with TI's low-power 45 nanometer RF CMOS-technology and enable unprecedented levels of integration in

an extremely small form factor. These radar sensors provide an ideal solution for low-power and self-monitored ultra accurate

radar systems for advanced automotive applications, such as adaptive cruise control, automatic emergency brake, blind-spot
detection, pedestrian or bicyclist protection, collision avoidance, urban driving, and automated highway driving, to name a few.

The device family scales from the AWR1243 radar front end all the way up to a complete single-chip radar by integrating analog

and digital components, including multiple transmit and receive chains, PLL, A2D converters, ARM Cortex-R4F MCU or C674x DSP

or an FFT accelerator, memories, and various I/O interfaces. These devices also feature continuous self monitoring and calibration

of the RF and analog functionality to a dedicated, built-in ARM R4F-based radio process subsystem which is responsible for front-
end configuration, control, and calibration.

This section shows the key features of these devices. These sensors are based on FMCW radar technology with capability to

operate in the 76 to 81 GHz frequency range and support CHIRP bandwidths of up to 4 GHz. Up to three transmit and four receive

chains are provided from MIMO radar operation. TI's mmWave sensors support highly programmable and flexible CHIRP profiles to

support multiple-sensing profiles in the same radar frame. The 1443 has an onboard hardware accelerator for FFT operations and

Continuous False Alarm Rate, or CFAR-based detection algorithms, while the 1642 provides a full-featured C67x high-performance
DSP code for FMCW signal processing and advanced algorithms, such as clustering, tracking, and object classification.

There are two ARM Cortex software FMCUs running at 200 MHz. One of these is locked and used by the calibration and monitoring
engine, that is, the radio subsystem. This R4F is programmed through firmware provided by TI and is not available for user code.

However, the second cortex software F is available for high-level application processing. The devices support various industry

standard input-output interfaces, such as CAN, SPI, I2C, UART, and support high-speed raw ADC data output using CSI2.

This slide shows the components of a typical FMCW radar chain and maps them to the signal processing capabilities of the 12, 14,
and 16x devices. The receiver chain starts with the RF front end receiving the reflected radar signal, which is mixed with the

transmitter signal to generate a beat frequency signal, which is delivered to the ADC. The ADC converts the analog signal to digital

samples which are pre-processed for digital processing.

Successive FFTs are computed on the digitized samples for range, velocity, and angle of arrival calculation. The radar hardware

accelerator onboard the 14xx device can be used to offload the FFTs and detection processing to get a point cloud output. The

16xx device can be used to run advanced clustering, tracking, and object classification algorithms using the onboard C674x DSP.
Here we show a few topologies where these devices can be deployed in advanced automotive applications. The first application

shows four AWR1243 devices connected in a cascaded configuration for high-resolution imaging. The 1242 radar front end

provides the high-frequency clock synthesizer output on device bin boundary, which can be fed to other AWR1242 devices to make

them all work in sync and act as a single sensor for higher angular resolution.

With cascading, the angular resolution increases exponentially as the number of devices goes up because the total number of

angular bins is a product of the total number of physical transmit and receive channels. For instance, a single AWR1243 with three

transmit and four receive antennas provides for four times three, or 12 angular bins. But with two AWR1242 devices in cascaded

mode, the number of angular bins goes up to six times eight, that is, 48.

The radar sensors are connected over CSI2 to an external processor which performs the FMCW signal processing on the raw ADC
data coming from the sensors. The processor also handles the configuration and control of the radar sensors. Similarly, a smaller

cascading configuration with two AWR1243 devices can be used for mid-range radar or corner radar applications, which is shown

in the second picture.

The third application shows a single AWR1243 connected over CSI2 to an external processor for a long-range radar. Such a

configuration finds use in automated highway driving and adaptive cruise control applications, and hence, the sensor should be

configured for maximum range and velocity. An out-of-bin [INAUDIBLE] is used to achieve longer range. The last picture shows a

satellite configuration where multiple 1642 devices are connected to an external application processor RF-BGA or CAN-FD. Each
1642 device processes its radar sensor data using the on chip C674x DSP and provides point cloud output to the external

processor.

The DSP on the 1642 can be used to run advanced clustering and tracking algorithms as well to provide more intelligent inputs to

the external processor. The external processor collects the respective outputs and makes higher level decisions pertaining to the

application. Such a configuration can be used for surround sensing in automated urban driving.

Moving on to the next section, we'll look at the millimeter-based sensor devices in more detail to understand the various functional

blocks. This picture shows a composite block diagram of the AWR1x device family. The 1243 radar front end includes only the

RF/analog subsystem and radio subsystem logs. Both 14 and 16x devices include the master subsystem, while the DSP subsystem

is present only on the 16x.

The device architecture can be divided into the following main blocks, the RF, or analog subsystem, the radar subsystem, and the

master subsystem. In addition to these three systems, the 16xx device also includes the DSP subsystem, which is outlined blue in

this picture.

Let us look at the RF and analog subsystem in more detail. This subsystem includes the RF and analog circuitry, that is, the

synthesizer, the PA, LNA, mixer, IF, and ADC. This subsystem also includes the crystal oscillator and temperature sensors.

The RF and analog subsystem can be divided into three subcomponents, namely, the clock subsystem, the transmit subsystem,

and the receive subsystem. We'll take a look at these subcomponents in more detail, starting with the clock subsystem. The clock

subsystem generates 76 to 81 GHz frequency from an input preference of 40 MHz crystal. It has an inbuilt oscillator circuit,
followed by a clean-up PLL and an RF synthesizer circuit.

The output of the RF synthesizer is then processed by a 4x multiplier to create the required frequency in the 76 to 81 GHz

spectrum. The RF synthesizer output is modulated by the timing engine block in order to create the required waveforms for

effective sensor operation. The timing engine is highly flexible and is programmed via the R4F-based radio controller subsystem.
The output of the RF synthesizer is available at the device bin boundary for multi-chip cascaded configuration. The clean-up PLL

also provides a reference clock for the host processor after system wake-up. The clock subsystem also has built-in mechanisms for

detecting the presence of a crystal and monitoring the quality of the generator clock.

Moving on to the next component of the RF and analog subsystem, which is the transmit subsystem. Depending upon the device,

the transmit subsystem consists of two or three parallel transmit chains. Each transmit chain has independent phase and

amplitude control.

A maximum of two transmit chains can be operational at the same time. However, all three chains can be operated together in a

time-multiplexed fashion. The device also supports binary phase modulation for MIMO radar and interference mitigation.

Finally, we look at the receive subsystem. The receive subsystem consists of four parallel channels where each receive channel

consists of an LNA, a mixture, IF filtering, A2D conversion and decimation. All four receive channels can be operational at the

same time. Individual powered on option is also available for system optimization.

Unlike conventional real-only receivers, TI's radar sensors support a complex baseband architecture which uses quadrature mixer

and dual IF and ADC chains to provide complex I/Q output for each receiver channel. The bandpass IF chain has configurable lower

cut-off frequencies, about 350 KHz. And the continuous time sigma delta ADC supports bandwidths of up to 15 MHz.

We now look at the next functional block, which is the radar subsystem. The radar processor is actually a second dedicated ARM

Cortex-R4F micro-controller running at 200 MHz. Note that this process is programmed by TI and takes care of out-of-calibration

self-test and monitoring functions. This processor is not available for customer application.

User applications running on the master subsystem do not have direct access to the radar system. The master system accesses

that radar subsystem through well-defined API messages which are sent over hardware mailboxes. This interface is also known as

the mmWaveLink. And TI's mmWave SDK includes the mmWaveLink API.

The next functional block is the master subsystem. The master subsystem includes an ARM Cortex-R4F processor clocked at 200

MHz for running user application code. User applications executing on this processor control the overall operation of the device,

including radar control via well-defined API messages, radar signal processing, which is assisted by the radar hardware
accelerator, or DSP, and peripherals for external interface. This subsystem also includes the various external interfaces available

on the 14 or 16xx devices.

A Quad Serial Peripheral Interface, or QSPI, is available which can be used to download customer code directly from a serial flash.

A CAN interface is included that can be used to communicate directly from the device to a canvas. An SPI/I2C interface is available

for power management IC or payment control. For more complex applications, the device can operate under the control of an

external MCU which can communicate with the 14 or 16xx device or SPI interface.

The next functional block is the DSP subsystem. The DSP subsystem, which is available only on 16xx devices, contains IT's high-

performance C674x DSP for FMCW signal processing, including FFT and detection and also advanced radar signal processing. This

allows the 16xx to serve as a complete single-chip radar with advanced capabilities for clustering, tracking, and object

classification.
Next we look at the radar hardware accelerator, which is the last functional block in this device overview. The readout hardware

accelerator is available only on 14xx devices. And it enables offloading certain frequently used computations and FMCW radar

signal processing from the main processor. FMCW radar signal processing involves the use of FFT and log-magnitude computations

in order to obtain a radar image across range, velocity, and angle dimensions. Some of the frequently used functions in FMCW

radar signal processing can be done within the radar hardware accelerator while still retaining the flexibility of implementing other

proprietary algorithms in the master system processor.

As shown in this diagram, the accelerator contains two functional parts. The first functional part is used for FFT and related pre-

processing and log-magnitude operations. The second functional part provides for CFAR, or Constant False Alarm Rate based

detection algorithms. Data movement to and from the radar hardware accelerator is based on TI's EDMA, or Enhanced Direct

Memory Access controller. Please refer to the Radar Hardware Accelerator User Guide or Radar Hardware Accelerator Online

Training for more details.

Having covered the various functional blocks, we now take a brief look at the boot modes available on TI's radar devices. TI's

mmWave radar devices support two boot modes, namely, flashing mode and functional mode. The desired boot mode is selected

by configuring the Sense On Power, or SOP, pins, as described in the device data sheet.

Let's talk about the flashing mode first. This boot mode is used to burn or store the program binary image into the QSPI serial flash.

When this boot mode is enabled, the bootloader enables the UART driver and expects a data stream consisting of the application

binary image. On receiving a valid application binary image, the bootloader stores the binary into appropriate sections of the serial

flash. This boot mode could be used during software development to upgrade the application binary on the flash.

The second mode, which is the functional or deployment mode is used to boot the device from the QSPI flash using a previously

stored application binary. With this boot mode selected, the bootloader looks for a valid application image in the QSPI flash. On

finding a valid image, the bootloader copies the image to the master subsystem's memory to start the boot process. In this, way

the device boots up autonomously from the serial flash.

In the last part of this presentation, we take a quick look at the software platform available for programming TI's mmWave radar

devices. TI's mmWave radar sensors are complemented by a rich software offering which consists of an SDK, TI designs,

examples, and tools. The software platform is divided into three main components, as shown.

The first one is the mmWave SDK, which provides various foundational software components, such as TI's SYS/BIOS RTOS and

drivers corresponding to the hardware peripherals available on the radar devices. It also includes the mmWaveLink and mmWave

API to enable programming the radar sensor using high-level API. It also includes signal processing libraries for both the C67x DSP

and the radar hardware accelerator.

Besides the mmWave SDK, the software offering also includes an out-of-box demo, various TI designs, and labs. The out-of-box

demo enables the user to quickly evaluate the radar EVM and visualize the range, velocity, and angle of the target object. The TI

designs demonstrate the applicability of TI's mmWave radar in specific applications, such as level sensing and traffic monitoring.

Last but not least, we have the mmWave Studio which provides a system estimator tool and raw ADC data capture capabilities.

We'll look at the system estimator tool in the next slide.

simplify the complex task of defining CHIRP parameters for TI's mmWave radar sensors for their desired sensing configuration.

This tool allows the user to provide application-level inputs, such as the desired maximum range, velocity, range resolution,

velocity resolution, etc., and outputs the CHIRP configuration, which can be used with the mmWave API to program the sensor

accordingly. It also estimates the radar data queue memory requirements corresponding to the CHIRP configuration and flags out-

of-bound parameters as well.

This picture shows an architectural diagram of TI's mmWave SDK. The components in blue are provided by the SDK, while the

components in red indicate application code. As we can see, the SDK has a modular design and is divided into various layers. Each

layer provides a well-defined API to the layer above it, thus obstructing complexity. For instance, the mmWave front-end firmware,

which runs on the radar subsystem, completely encapsulates the configuration, control, calibration, and monitoring of the RF and

analog functionality.

It exports the mmWaveLink API using which the master subsystem communicates with it to control and monitor the sensor front

end. The mmWave SDK not only implements the application side of the mmWaveLink, but it also provides another level of

abstraction to the mmWave API. The API provides high-level functions to program and control the radar front end. The mmWave

API internally uses the mmWaveLink API. This picture shows the directory organization of the mmWave SDK.

This concludes the overview of TI's automotive mmWave radar sensors. To learn more about these devices, please refer to these

resources. Thank you.