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2023 EEEE4118 Coursework 1

This document provides instructions for Coursework 1 of the EEEE4118: Advanced Power Electronics module. It accounts for 30% of the total module marks and assesses learning outcomes related to power semiconductor devices. Students must submit both a report and simulation files by the deadline, uploading them as separate files according to the new department policy. The coursework consists of 4 tasks involving simulation and analysis of power devices using LTSpice software. Task 1 involves a literature survey on double pulse testing. Tasks 2 and 3 involve simulating and comparing the performance of silicon and silicon carbide MOSFETs using double pulse testing. Task 4 requires discussing the impact of device technology on losses under different operating conditions based on the findings of Task 3.

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MUHAMMAD ABBAS
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59 views4 pages

2023 EEEE4118 Coursework 1

This document provides instructions for Coursework 1 of the EEEE4118: Advanced Power Electronics module. It accounts for 30% of the total module marks and assesses learning outcomes related to power semiconductor devices. Students must submit both a report and simulation files by the deadline, uploading them as separate files according to the new department policy. The coursework consists of 4 tasks involving simulation and analysis of power devices using LTSpice software. Task 1 involves a literature survey on double pulse testing. Tasks 2 and 3 involve simulating and comparing the performance of silicon and silicon carbide MOSFETs using double pulse testing. Task 4 requires discussing the impact of device technology on losses under different operating conditions based on the findings of Task 3.

Uploaded by

MUHAMMAD ABBAS
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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EEEE4118: Advanced Power Electronics

Coursework 1: Performance evaluation of power devices

Coursework 1 accounts for 30% of the total mark for this module. It assesses learning
outcomes of Theme A: Power Semiconductor Devices and Packaging. Please check
Moodle for submission details and the exact deadline.

You are required to submit:


(a) a report as a stand-alone separate document (e.g. .pdf) and
(b) the model/simulation files (zipped).

Important – new department policy on submitting reports:


There is only one submission link for both the report and the model/simulation files.
You are expected to upload two files: (a) the report (e.g. .pdf) and (b) simulation files
(zipped). It is important that you upload your report as a separate document, alongside
the .zip file containing the simulation files so that it can be put through Turnitin.
According to the new department policy, if the report is placed inside the .zip file, the
report will NOT be marked. This is because files put in a zip cannot go through Turnitin.
If you are in doubt, please ask for advice well in advance of the submission deadline.

Prerequisites
LTSpice simulation software. Please download and install from the developer’s
website directly:
https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-
simulator.html#

Task 1 (20 marks)


Perform a short survey (2 pages long) with scope to identify an appropriate power
electronics test circuit (with inductive load) which can be used for the double pulse test
of power semiconductor devices. For full marks please include the following:
1.1 Explain what the double pulse test is and why it is used
1.2 Explain the appropriateness of the test for the evaluation of switching performance
of power devices.
1.3 Include the equivalent circuit schematic.
1.4 Explain the circuit components and their role.
1.5 Sketch the double pulse waveforms.
1.6 Explain the role of the first pulse.
1.7 Explain the role of the second pulse.
1.8 Explain how the test voltage can be defined/set at the start of each test.
1.9 Explain how the test current condition is set at the start of each test.
1.10 Give any appropriate equations which can enhance your answers.
1.11 Include your references ( at least 5 ) and use IEEE referencing style when citing
your sources.

EEEE4118 CW1 Dr Neo Lophitis 1


Task 2 (20 marks)
Device manufacturers provide spice models of their products; these behavioural
models aim to replicate in simulations the real device waveforms. LTSpice includes a
library with limited number of component models which can be expanded by users. In
Task 2 you are required to use LTSpice to analyse the performance of the 600V, 20A
rated Rohm N-Channel MOSFET R6020PNJ power semiconductor device using the
“double pulse test” methodology and report on your findings.
2.1 With the use of LTSpice create the schematic/model of the test circuit identified in
Task 1.

The device under test should be the 600V, 20A rated Rohm N-Channel MOSFET
R6020PNJ, the test voltage 350V and test current 15A.
Include a snapshot of your model in your report, which should include the following
components with their associated values.
Clearly justify the values chosen and show any calculations done.
• DC link voltage source (VDC-link )
• Freewheeling diode (FWD): You can use an ideal diode
• Commutation inductance / inductive load (Lload ): By performing a survey of the
literature, choose an appropriate value and justify your choice – remember, the
inductor can affect the rate of change of current.
• Device Under Test (DUT): Rohm N-Channel MOSFET R6020PNJ. The model
of this device can be found in the standard list of devices within LTSpice.
• Gate resistor (RG): Use the datasheet of Rohm N-Channel MOSFET R6020PNJ
transistor to select an appropriate gate resistance.
• Gate voltage source (VGS) with Pulse Width Linear (PWL) function (or
alternative), being able to produce gate voltage pulses of appropriate widths to
conduct the double pulse test.

2.2 Conduct the double pulse test simulation with Rohm N-Channel MOSFET
R6020PNJ as the device under test.

Conduct the test with Vdc=350V and at conduction current (Ion) = 15A.
Give an overview of switching waveforms, over the period from 0s till the double pulse
test is complete.
Also include the switching waveforms focused during the turn -on period and the turn-
off period.
Include the waveforms of:
• the gate to source voltage (VGS),
• dc link voltage (Vdc),
• drain to source voltage (VDS),
• drain to source current (IDS) and
• Inductor current (IL).

2.3 Plot the power waveform

EEEE4118 CW1 Dr Neo Lophitis 2


Plot the power waveform of the device under test, focused during the turn-on period
and the turn-off period.

2.4 Extract the turn-on energy loss (ETurn-on ).


Use LTSpice to extract E Turn-on. Show all your working and explain the procedure
followed.

2.5 Extract the turn-off energy loss (ETurn-off).


Use LTSpice to extract E Turn-off. Show all your working and explain the procedure
followed. E Turn-off
2.6 Extract the conduction voltage drop (Von).
Extract the conduction voltage drop (Von) of the device under test when conducting
current (Ion) of 15A.

Task 3 (35 marks)


In this task you are required to u se the circuit model and techniques developed during
Task 2 with appropriate devices available from device manufacturers to evaluate and
compare Silicon and Silicon Carbide MOSFETs. Choose one Silicon and one Silicon
Carbide MOSFET of your choice as the device under test for this task. The devices
chosen should be rated at least 800V, 10A.
3.1 Clearly state which two devices have been selected.
The devices should be comparable (similar voltage and current rating). Clearly state
which two devices have been selected and explain how your choices allow a fair
comparison of the two device technologies.

3.2 Clearly demonstrate the successful incorporation of appropriate device models in


LTSpice
Demonstrate successful incorporation of appropriate device models in LTSpice by
including snapshots of your working devices and the two double pulse waveforms at
the same test conditions.

3.3 Calculate the turn-on energy losses (ETurn-on), turn-off energy losses (ETurn-off) and
conduction voltage drop (Von) of the devices for the following conditions:

a. Vdc-link voltage ≈ half of the rated device voltage, ION ≈ half rated current,
R G ≈ value suggested in datasheet. Then vary RG between 1Ω - 100Ω.

Construct a table like the one given below to depict your answers.
Also plot the ETurn-on , ETurn-off, and VON vs R G plots.

Device: Silicon/Silicon carbide (include device reference number)


VDC-link ≈ 1/2 rated V DS = ……. V
ION ≈ rated IDS = ……. A

EEEE4118 CW1 Dr Neo Lophitis 3


RG VON ETurn-on ETurn-off
1
…
Value
suggested in
datasheet
…
100Ω

b. Examine how the ETurn-on, ETurn-off, and VON vs R G depends on load


conditions. To show this, calculate how the ETurn-on, ETurn-off, and VON vs RG
plots change with changing ION. Simulate 25%, 50%, 75% and 100% of rated
ION current. Create new Energy vs R G plots to showcase the new results.

c. Clearly show your working and include clearly annotated figures or


waveforms.

Task 4 (20 marks)


By making use of the findings from Task 3 and the fundamental properties of Silicon
and Silicon Carbide, discuss the impact of device technology and semiconductor
material on the losses under various operating conditions.

Further assessment criteria (5 marks)


The report should have a logical structure throughout, a title/cover page, pagination,
table of contents, sections and appendixes clearly labelled.
Figures, plots and tables should be enumerated and must have captions. They should
be appropriate, of high quality, clean, any embedded text should be of large font size
and cross references should be used consistently when commenting or referring to
them in the body of the report. Appropriate axis labels should be included when plots
are presented.
Written explanations should be relevant, clear, easy to understand with few spelling
mistakes.
Where external sources are used, correct referencing and citation should be
conducted using an appropriate referencing style (e.g. IEEE referencing style).

EEEE4118 CW1 Dr Neo Lophitis 4

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