Scribd
Upload
39 views19 pages

Lecture 14

The document discusses dynamic random access memory (DRAM). It explains that DRAM stores data as charge on capacitors and uses transistors to access these capacitors. A key aspect of DRAM is that it must periodically refresh the charge on the capacitors before they decay, as reading or time causes the charge to dissipate. This refresh operation is why DRAM is considered "dynamic" memory.

Uploaded by

7t854s6wd2
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
39 views19 pages

Lecture 14

The document discusses dynamic random access memory (DRAM). It explains that DRAM stores data as charge on capacitors and uses transistors to access these capacitors. A key aspect of DRAM is that it must periodically refresh the charge on the capacitors before they decay, as reading or time causes the charge to dissipate. This refresh operation is why DRAM is considered "dynamic" memory.

Uploaded by

7t854s6wd2
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 19

Introduction to Digital VLSI

Lecture 14
Dr. Shaeen Kalathil
Memory
• To store binary data (‘0’s and ‘1’s)
• Random Access Memory (RAM)
• Read Only Memory (ROM)
Memory
Definitions
Memory Block Diagram
Memory Organization Example
Basic Memory Operations
Basic Memory Operations
Dynamic RAM(DRAM)
• DRAM works by using the presence or absence of charge on a capacitor
to store data.

• Since a single DRAM cell is composed of only two components—a


transistor and a capacitor—DRAM can be made in high densities, and it is
inexpensive compared to other types of memory.
During a 'read' operation, the 'word' line is also asserted, which turns on the access transistor.

The enabled transistor allows the voltage on the capacitor to be read by a sensitive amplifier circuit through
the 'bit' line.

This sense circuit can determine whether a '1' or '0' is stored in the memory cell.

The simple operation of reading the data of a memory cell is destructive to the stored data.

This is because the cell capacitor undergoes discharging every time it is sensed through the 'bit' line.

In fact, the stored charge in a DRAM cell decays over time even if it doesn't undergo a 'read' operation.

Thus, in order to preserve the data in a DRAM cell, it has to undergo what is known as a 'refresh' operation.

A refresh operation is simply the process of reading a memory cell's content before it disappears and then
writing it back into the memory cell. Typically, it is done every few milliseconds per word.

The need for regular refreshing gave DRAMs the name 'dynamic'.
During a 'write' operation, the data to be written ('1' or '0') is
provided at the 'bit' line while the 'word line' is asserted. This turns
on the access transistor and allows the capacitor to charge
up or discharge, depending on the state of the bit line.

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy