Slide 1
Slide 1
Halfword and signed Improved Arm/Thumb SIMD Instructions Thumb-2 64-bit registers
halfword/byte support Interworking Multi-processing NEON Privilege Levels
System mode CLZ v6 Memory architecture TrustZone New exception model
Thumb instruction set Saturated Unaligned data support Virtualization New memory model
arithmetic Extensions Architecture Profiles New instructions
DSP multiply- Thumb-2 (v6T2) v7-A (Applications): Armv7 compatible
accumulate TrustZone (v6Z) NEON
instructions Multicore (v6K) v7-R (Real-time): v8-M (Microcontroller)
Thumb-only (v6-M) Hardware divide 32-bit only
v7-M (Microcontroller): Baseline / Mainline
Hardware divide, TrustZone for Armv8-M
Thumb-only
Cortex-M55
Cortex-M35P
Arm Neoverse and Cortex-X processors also fall under the Application profile Cortex-M33
Cortex-M23
7 xxxx rev 00000
Arm Developer
Developer resources website
https://developer.arm.com/documentation
• Arm blogs
• Forum posts
https://community.arm.com/developer/ ts/processors/b/processors-ip-blog/posts/cortex-m-resources
ip-products/processors/b/processors-ip-
blog/posts/cortex-m-resources