1.

An architecture used in any microcontroller is called

a)Harvard architecture b) Von-Neumann architecture
c) Princeton architecture d) both (a) and (c).

2. More address pins, the more memory locations are inside the chip.
a) TRUE b) FALSE c) Insufficient data d) None of these.

3. If there is no data transfer in serial communication and the line is high, it is called
a) MARK b) STOP BIT c) SPACE d) START BIT.

4. The transducer must be connected to signal conditioning circuit before it is sent to the ADC.
a) TRUE b) FALSE c) Insufficient data d) None of these

5. Which of these are real-time applications scenarios? Identify.

a) An on-line bus ticketing system
b) Printing of annual report of a company
c) Reconciling a day's transaction in an account book of a small company
d) An aircraft's yaw control system.

6. Identify the category of the following real-time systems as “hard, soft or firm”.
a) An on-line celebrity cricket bat auction
b) A patient monitoring system in an ICU
c) A library book reservation system
d) A bank's credit card defaulters notice generation program.

7. Which of the following describe the ROTS design philosophy best ?

a) Maximize the throughput of the system
b) Maximize the processor utilization
c) Maximizing the response time
d) Response within certain stipulated time period.

8. Which of the following are commercially claimed RTOSs ?

a) Linux b) Windows CE c) Windows NT d) Vx works e) Sun Solaris.

9. The device ‘Touch screen’ can be used as

a) input device b) output device
c) both input and output device d) none of these.

10. Which one of the following scheduling algorithm checks the rate of occurrence of the task ?
a) RAM b) EDF
c) Co-operative d) All of these.

11. Which of the following has the highest “storage performance” ?

a) DRAM b) SRAM c) OTP ROM d) Masked ROM.
12. Cyclic scheduling is best for which of the following task ?
a) Aperiodic b) Sporadic c) Periodic d) None of these.

13. POSIX is an example of

a) Application Software b) Traditional Operation System
c) Real Time Operating System d) None of these.

14. Which software architecture is the most Complex ?

a) Round robin b) Round robin with interrupt
c) Functional queue scheduling d) RTOS.

15. The main function of RTOS is

a) real time task scheduling and interrupt latency control
b) process management
c) device management
d) memory management.

16. Which of the following device is not an embedded system ?

a) Cell-phone b) Mainframe c) Modem d) Automobile.

17. Automobile engine control system is the example of

a) soft real time b) hard real time c) firm real time d) none of these.

18. Which of the following is volatile memory ?

a) EEPROM b) SRAM c) NV-RAM d) Flash memory EPROM.

19. A microcontroller unit must have

a) oscillator and reset circuits b) oscillator, reset, watchdog and linear circuits
c) oscillator circuits d) external memory interfacing circuits.

20. A program that combines object code files into an executable program is called a/an
a) compiler b) linker c) loader d) assembler.

21. I2C bus stands for

a) intra IC connect bus b) interface IC connect bus
c) inter IC connect bus d) none of these.

22. The number of bit of microcontroller in sophisticated embedded system is

a) 8 or 16 b) 16 or 32 c) 32 or 64 d) none of these.

23. MAC unit is present in which type of processor ?

a) ARM processor b) DSP processor c) ASIP processor d) None of these.

24. In distributed embedded controller which type of bus is used ?

a) CAN bus b) I 2C bus c) USB bus d) None of these.
25. Architecture used in DSP processor is
a) Von Neumann b) Harvard architecture c) SIMD d) All of these.

26. Let h be the hit rate, M be the miss penalty, C be the time to access information in the cache.
The average access time experienced by the processor is
a) t avg = ( 1 – h ) C + ( 1 – h ) M
b) t avg = h C + ( 1 – h ) M
c) t avg = ( 1 – h ) C + h M
d) t avg = h C + h M.

27. Which of the following has highest storage performance ?

a) DRAM b) SRAM c) OTP ROM d) Masked ROM.

28. Which one of the following scheduling algorithms checks the rate of occurrence of the task ?
a) DMA b) EDF c) Co-operative d) All of these.

29. 8051 is a ............... bit microcontroller.

a) 16 b) 8 c) 32 d) None of these.

30. Which of the following is commercially claimed RTOSS ?

a) Linux b) Windows c) Window NT d) VX Works.

31. A small scale embedded system is designed with........... bit microcontroller.

a) 8 b) 16 c) 32 d) 8 or 16.

32. Which is the heart of an embedded system ?

a) Interrupt controller b) Processor
c) I/O devices d) power supply.

33. In successive approximation method conversion time is equal to .................... for 8-bit system
running with 1 MHz clock.
a) 8 μsec b) 4 μsec c) 1 μsec d) none of these.

34. A model in which there are finite states, which had given a set of inputs or state changes
according to the state transition function, is
a) FSM b) ADFG c) DFG d) State transition function.

35. A program that conmbines object code files into an executable program is called a
a) Compiler b) Linker c) Loader d) Assembler.

36. Which of the following is volatile memory ?

a) EEPROM b) SRAM c) NV RAM d) Flash memory EPROM.

37. Automobile engine control system is the example of

a) soft real sime b) hard real sime c) both of these d) none of these.
38. Which of the following devices is not an embedded system ?
a) Cell phone b) Mainframe c) Modem d) Automobile.

39. Which software architecture is the most complex ?

a) Round robin b) Round robin with interrupt
c) Functional queue scheduling d) RTOS.

40. Real time means

a) actual time
b) time from start of task
c) time measured using the system clock of RTOS
d) time that has a fixed unalterable zero reference in which a clock advances at constant
interval and which cannot be reloaded.

41. A device driver would ordinarily be written in

a) machine language
b) assembly language
c) a platform-independent language such as JAVA
d) an application-oriented language.

42. Which chip has a large number of arrays with each element having fusible links ?
a) GPP b) ASSP c) FPGA d) Register.

43. An architecture used in any microcontroller is

a) Harvard b) Vonneuman c) Princeton d) both (a) and (c).

44. Cyclic scheduling is best for which of the following tasks ?

a) Aperiodic b) Sporadic c) Periodic d) None of these.

45. RTOS is one which

a) allows flexible scheduling of the system resource to several task
b) controls task synchronization
c) is an operating system for microcontroller
d) is an operating system for pre-emptive scheduling.

46. More address pins, the more memory locations are inside the chip. It is
a) True b) False c) Insufficient data d) None of these.

47. If there is no data transfer in serial communication and the line is high, it is called
a) MARK b) STOP BIT c) SPACE d) START BIT.

48. The transducer must be connected to signal conditioning circuit before it is sent to the ADC.
a) True b) False c) Insufficient data d) None of these.

49. A powerful modeling language which is extensively used in the software development process,
specially designed for
 a) UML b) C c) SMI d) JAVA.

50. Address lines requires for 32 k-byte memory chip is

a) 13 b) 14 c) 15 d) 16.

51. EEPROM is
a) flash also
b) for erase at a time of one byte and flash for a sector of byte
c) different from flash
d) works identically for erase as well as write.

52. The term hand-shaking is used in

a) interrupt data transfer scheme
b) DMA data transfer scheme
c) synchronous data transfer scheme
d) asynchronous data transfer scheme.

53. Which chip has a large number of arrays with each element having fusible links ?
a) GPP b) ASSP c) FPGA d) Register.

54. The main function of RTOS is

a) Real time task scheduling and interrupt latency control
b) Device management
c) Process management
d) Memory management.

55. Which one of the following is used as an additional processing unit for running the application
specific tasks in place of processing using embedded software ?
a) Micro-controller b) DSP
c) FPGA d) ASSP.

56. Which of the following has the highest "storage performance" ?

a) DRAM b) SRAM c) OTP ROM d) Masked ROM.

57. Which of the following are commercially claimed RTOSs ?

a) Linus b) Windows CE c) Windows NT d) Sun Solaris.

58. Which of the following scheduling algorithms checks the rate of occurrence of the task ?
a) DMA b) EDF c) Co-operative d) All of these.

59. Which is the heart of an embedded system ?

a) Interrupt controller b) Processor
c) I/O devices d) Power supply.

60. A model in which there are finite states, which have given assets of inputs, or state changes
according to the state transition function is
 a) FSM b) ADFG c) DFG d) UML

61. A small scale embedded system is designed with ........... bit micro-controller.
a) 8 b) 8 or 16 c) 32 d) 64.

62. DMA modules can communicate with CPU through

a) interrupt b) cycle stealing
c) branch instruction d) none of these.

63. Object code is

a) input of assembler b) output of assembler
c) intermediate code d) none of these.

64. A CPU has 16 bit program counter. This means CPU can have ............ address memory
locations.
a) 16K b) 32K c) 64K d) 256K.

65. How many layers are there in an embedded system design?

a)02 b)03 c)04 d)05

66. Architecture used in 8051 microontroller is?

A)SIMD b)Harvard c)von-Neumann d)MISD

67. In embedded system design, actuator acts as a/an

a)input device b)output device c)memory device d) both a) and b)

68. which one is a serial synchronous communication protocol?

a)RS232 b)USB c)PCI d)I2C

69. which one of the following is an RTOS?

a)windows NT b)Unix c)Ubuntu d)Windos CE

70. G- sensor is used to sense

a)Position b)pressure c)Acceleration d)Gravitational Force

71. A program that combine object code files into an executable program is called a
a) Compiler b)linker c)both a) and b) d)none of these

72. a robotic arm is a

a)Hard real time system b)soft real time system
c)discreet system d)feedback system

73. A thread is a
a)Heavy weight process b)light weight process
 c)parallel process d) none of these

74. In UML, package is a collection of

a)classes and objects b)data elements
c)abstract data elements d)all of these

75. Which of the following device is not an embedded system ?

a) Cell-phone b)laptop c)Washing Machine d)pacemaker

76. ARM architecture is of

a) 32 bit b) 8 bit c) 16 bit d) none of these

77. who determines which task/ process is to be executed at a given point of time?
a)process manager b)context manager
c)scheduler d)both b0 and c)

78. Which is special variation that is used to take note of certain actions to prevent any task or
process from processing?
a) semaphore b) mutex c)buffer d)counting semaphore

79. USB stands for

a) Universal serial bus b) Uniform serial bus
c) Universal service bus d) None of these

80. Cache memory is used to reduce the speed gap between

a)CPU and main memory b)CPU and secondary storage
c)CPU and virtual memory d)main memory and virtual memory

81. Compared to FPGA, gate array design style has

a) Less chip utilization factor b) more chip speed
c) More flexibility d) none of these

82. DRAM is widely used because of the following:

a) Refreshing operation is not needed b) low cost and high density
c) Low power consumption d) high speed

83. VLIW processor means

a) Very Large Instruction Word b) Very Low Integrated Word
c) Very Load Instruction Word d) None of these.

84. Sigma-delta converter is a

a) A to D converter b) D to A converter
c) both (a) and (b) d) none of these.

85. Which one is not embedded in a single chip in an embedded system?

a) Memory b) Processor
 c) A to D converter d) None of these.

86. Fastest type of ADC is

a) Flash type b) Dual-slope
c) Successive-approximation d) None of these.

87. Strain gauge has a property called

a) Piezo-resistive b) Piezo-electric
c) Photo-electric d) None of these.

88. Among the following which one has the greatest gate integration capacity ?
a) FPGA b) CPLD c) ASIC d) PLD.

89. Configurable logic blocks are used in

a) Gate array design b) Full custom design
c) FPGA design d) Standard cell based design.

90. A microphone has a diaphragm behaving like a

a) capacitive device b) resistive device
c) inductive device d) active device.

91. In Harvard architecture

a) separate address and data buses are used to access program and data memory
b) same address and data buses are used to access program and data memory
c) separate address bus but same data buses are used to access program and data memory
d) same address bus but separate data buses are used to access program and data memory.

92. Sequential execution of program statements pre-stored in memory is the fundamental principle
of
a) von Neumann computing b) dataflow computing
c) pipelining d) embedded processors.

93. Maximum efficiency of pipelined computing can be obtained when the pipe is
a) full b) empty c) partially full d) full in an interleaved manner.

94. FPGA configuration is done by

a) Solid-state fuses b) LUTs
c) EEPROMs d) none of these.

95. For XTAL = 11·0592 MHz, the TH1 value in decimal for baud rate 9600 is
a) – 9 b) – 6 c) – 2 d) 6.

96. What is the organization of a 4116 DRAM ?

a) 15,000 x 2 bits b) 16,384 x 1 bit
 c) 10,000 x 1 bit d) none of these.

97. A micro-controller normally has which of the following devices on chip ?

a) RAM b) ROM c) I/O d) All of these.

98. Which chip has a large number of arrays with each element having fusible links ?
a) GPP b) ASSP c) FPGA d) Register.

99. The main function of RTOS is

a) Real time task scheduling and interrupt latency control
b) Process management
c) Device management
d) Memory management.

100. Which software tools and modules are used for complex sets of the codes, functions and
expressions from the library routines ?
a) Compiler b) Assembler c) Simulator d) Gross-assembler.

101. Which of the following processor architectures supports easier instruction pipelining ?
a) Harvard b) Von Neumann c) Both (a) and (b) d) None of them.

102. Which of the following is one time programmable memory ?

a) SRAM b) PROM c) FLASH d) NVRAM.

103. How many memory cells are present in 1 kb RAM ?

a) 1024 b) 8192 c) 512 d) 4096.

104. What is the minimum number of interface lines required for implementing I2C ?
a) 1 b) 2 c) 3 d) 4.

105. Name the register holding the address of the memory location for the next instruction to fetch.
a) DPTR b) PC c) SP d) None of these.

106. Name the register holding the address of external data memory to be assessed in 16 bit external
data memory operation.
a) DPTR b) PC c) SP d) None of these.

107. The design of an integrated circuit with built in ADC is an example for
a) analog b) digital c) mixed signal d) none of these.

108. The representation of interconnection among various components of a hardware in 'Layout' is

known as
a) footprint b) route/trace c) layer d) none of these.

109. In embedded hardware design context, a 'VIA' is a

a) conductive drill hole b) interconnection among components
 c) ground line d) none of these.

110. The program that converts machine codes into target processor specific assembly code is known
as
a) disassembler b) assembler
c) cross-compiler d) simulator.

111. Which of the following ICs is an example of IC buffer ?

a) 74LS00 b) 74LS244 c) 74LS08 d) 74LS373.

112. The number of logic gates present in IC is 500. The integration type of IC is
a) MSI b) LSI c) SSI d) VLSI.

113. MAC unit is present in which type of processor ?

a) ARM processor b) DSP processor
c) ASIP processor d) none of these.

114. SOC means

a) a single chip that would realize the entire system
b) a system is distributed in different chips
c) a partially filled system within a chip
d) various program modules included within a chip.

115. L1 Cache is made of

a) DRAM b) SRAM c) Both of these d) None of these.

116. Memory requirement of ARM in Thumb mode is

a) less b) same c) more d) depends on the system.

117. UART stands for

a) Uniform Access for Receiver & Transmitter
b) Universal Access for Receiver Transmitter
c) Universal Asynchronous Receiver Transmitter
d) none of these.

118. A device driver would ordinarily be written in

a) machine language
b) assembly language
c) a platform-independent language, such as JAVA
d) an application-oriented language.

119. Which chip has a large number of arrays with each element having fusible links ?
a) GPP b) ASSP c) FPGA d) Register.
120. Which one of following is used as an additional processing unit for running the application
specific tasks in place of processing using embedded software ?
a) Microcontroller b) DSP c) FPGA d) ASSP.

121. Real time means

a) actual time
b) time from start of task
c) time measured using the system clock of RTOS
d) time that has a fixed unalterable zero reference in which a clock advances at constant and
which cannot be reloaded.

122. Which one of the following scheduling algorithm checks the rate of occurrence of the task ?
a) RMA b) EDF c) Co-operative d) All of these.