Code No: R1632044 R16 SET - 1

III B. Tech II Semester Regular Examinations, April/May - 2019

DIGITAL SIGNAL PROCESSING
(Electronics and Communication Engineering)
Time: 3 hours Max. Marks: 70
Note: 1. Question Paper consists of two parts (Part-A and Part-B)
2. Answer ALL the question in Part-A
3. Answer any FOUR Questions from Part-B
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

PART –A
1. a) What is the condition for stability of an LTI system? [2M]
b) What are the number of computations required for the direct computation of 𝑁- [2M]
point DFT?
c) What is the relation between digital and analog frequencies in bilinear [2M]
transformation?
d) What are the characteristics of FIR digital filters? [3M]
e) List the applications of multirate signal processing. [3M]
f) What are the on-chip peripherals of programmable DSP? [2M]
PART -B
2. a) What are the advantages of DSP over ASP? Explain. [7M]
b) Find the impulse response ℎ[𝑛] of the system described by the difference [7M]
equation
8𝑦 𝑛 + 6𝑦 𝑛 − 1 = 𝑥[𝑛]

3. a) Compute the DFT of the three point sequence x(n) = { 2, 1, 2 }. Using the [7M]
same sequence, compute the 6 point DFT and compare the two DFTs.
b) Give the steps involved in implementing Radix –2, DIT FFT algorithm. [7M]

4. a) With an example explain the design procedure for Butterworth filter. [7M]
b) Explain the differences between Direct form-I and Direct form-II structures. [7M]
5. a) What are the characteristics of linear phase FIR digital filters? [7M]
b) Design an FIR digital low pass filter with cutoff frequency 1.2 radian and [7M]
length 𝑁 = 7. Use frequency sampling method.

6. a) What are the basic building blocks of multirate system? Explain. [7M]
b) Describe the multi-stage implementation of a 32-fold decimator. [7M]

7. a) Explain the difference between Von Neumann and Harvard architectures. [7M]
Which architecture is preferred for DSP applications and why?
b) Explain what is meant by instruction pipelining. [7M]

*****

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 Code No: R1632044 R16 SET - 2

III B. Tech II Semester Regular Examinations, April/May - 2019

DIGITAL SIGNAL PROCESSING
(Electronics and Communication Engineering)
Time: 3 hours Max. Marks: 70
Note: 1. Question Paper consists of two parts (Part-A and Part-B)
2. Answer ALL the question in Part-A
3. Answer any FOUR Questions from Part-B
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
PART –A
1. a) State the time shifting property of z-transform. [2M]
b) Draw the butterfly structure for computation of 4-point DFT of a DT sequence. [2M]
c) What is meant by frequency warping effect? [2M]
d) Draw the frequency response of digital low pass and high pass filters. [3M]
e) What do you mean by fractional sampling rate conversion? [3M]
f) What is the use of MAC unit in DSP architecture? [2M]
PART -B
2. a) What are the conditions for stability and causality of an LTI system? Explain. [7M]
b) For a system described by 8𝑦 𝑛 + 4𝑦 𝑛 − 1 + 𝑦 𝑛 − 2 = 𝑥[𝑛] [7M]
Find the response to a unit amplitude complex sinusoidal excitation at a DT cyclic
frequency Ω.
3.  [7M]
a) Compute the 4-point DFT of x(n)  Cos n 0 n 3 using Radix–2 DIT FFT
2
algorithm.
b) Compute the circular convolution of the sequences [7M]
𝑥1 𝑛 = { 1, 2, 0, 1 } and 𝑥2 (𝑛) = { 2, 2, 1, 1 }

4. Design a low pass digital filter that will operate on sampled analog data such that [14M]
the analog cutoff frequency is 200 Hz (1 dB acceptable ripple) and at 400 Hz the
attenuation is at least 20 dB with monotonic shape past 400 Hz. The sample rate is
2000 samples/sec. Use impulse invariant transformation.

5. a) Distinguish between IIR and FIR filters. [7M]

b) Explain the frequency-sampling method of FIR filter design with an example. [7M]

6. a) Show that down-sampler is a time-variant system. [7M]

b) What is the need for multi-stage implementation of sampling rate converters? [7M]
Explain with an example.

7. a) What is meant by bit reversed addressing mode? What is the application for which [7M]
this addressing mode is preferred?
b) Draw the pipelined MAC configuration to perform convolution operation and [7M]
explain with neat timing diagrams.

*****

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 Code No: R1632044 R16 SET - 3
III B. Tech II Semester Regular Examinations, April/May - 2019
DIGITAL SIGNAL PROCESSING
(Electronics and Communication Engineering)
Time: 3 hours Max. Marks: 70
Note: 1. Question Paper consists of two parts (Part-A and Part-B)
2. Answer ALL the question in Part-A
3. Answer any FOUR Questions from Part-B
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
PART –A
1. a) 𝑧2 [2M]
Draw the pole-zero plot of 𝐻 𝑧 = 1
𝑧−1 𝑧−
4
b) Compute the DFT of 𝑥 𝑛 = [1,0]. [2M]
c) 1 [2M]
Find 𝐻(𝑧) using bilinear transformation transformation, if 𝐻𝑎 𝑠 = 𝑠 .
d) What is Gibb’s phenomenon? [3M]
e) 1 𝑛 [3M]
𝑛 ;0 ≤ 𝑛 ≤ 3
Plot 𝑦 𝑛 = 𝑥 , if 𝑥 𝑛 = 2
2
0 ; 𝑒𝑙𝑠𝑒𝑤ℎ𝑒𝑟𝑒
f) What do you mean by circular buffer? [2M]
PART -B
2. a) State and prove the properties of convolution. [7M]
b) Using the z-transform, find the total solution to the following difference equation [7M]
with initial conditions, for discrete time 𝑛 ≥ 0.
5𝑦 𝑛 + 2 − 3𝑦 𝑛 + 1 + 𝑦 𝑛 = 0.8 𝑛 𝑢 𝑛 , 𝑦 0 = −1, 𝑦 1 = 10

3. a) Compute the DFT of the given sequence 𝑥 𝑛 using DIT FFT algorithm. [7M]
𝑥[𝑛] = {1, −1, 1, − 1, 1, − 1, 1, − 1}
Show the intermediate result on the flow graph.
b) Prove that the convolution in time-domain leads to multiplication in frequency [7M]
domain for discrete time signals.

4. Determine the system function 𝐻(𝑧) of the lowest order Butterworth digital filter [14M]
with the following specification
(i) 3 dB ripple in pass band 0 𝑤  0.2 
(ii) 25 dB attenuation in stop band 0.45  𝑤 .

5. Design a linear phase FIR filter with the magnitude response [14M]
𝜋
𝐻 𝑒 𝑗 Ω = 1 𝑓𝑜𝑟   8
= 0 𝑓𝑜𝑟  8    𝜋

Use Hamming window. The length of the impulse response is limited to 9. Draw the
Direct form structure of the filter.

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 Code No: R1632044 R16 SET - 3

6. a) An up-sampler and X (  ) are depicted in the following figure. Draw the spectrum of [7M]
y[ n ].

b) Show that the up-sampler is a time-variant system. [7M]

7. a) What are the architectural features of TMS320C5x DSP? [7M]

b) What are the special addressing modes of DSP? Explain. [7M]

*****

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 Code No: R1632044 R16 SET - 4

III B. Tech II Semester Regular Examinations, April/May - 2019

DIGITAL SIGNAL PROCESSING
(Electronics and Communication Engineering)
Time: 3 hours Max. Marks: 70
Note: 1. Question Paper consists of two parts (Part-A and Part-B)
2. Answer ALL the question in Part-A
3. Answer any FOUR Questions from Part-B
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
PART –A
1. a) What are the limitations of DSP? [2M]
b) Draw the discrete spectrum of the DT sequence 𝑥 𝑛 = 1,1,1,1 . [2M]
c) 1 [2M]
Find 𝐻(𝑧) using impulse invariant transformation, if 𝐻𝑎 𝑠 = 𝑠+1.
d) Draw the spectrum of rectangular window function. [3M]
e) Find 𝑦 𝑛 = 𝑥 3𝑛 , if 𝑥 𝑛 = [1,2,3,4]. [3M]
f) Draw the configuration of a pipelined MAC unit. [2M]
PART -B
2. a) State and prove final-value theorem of z-transform. [7M]
b) What are the basic elements of a DSP system? Explain. [7M]

3. a) 1 1 1 1 [7M]
Compute the DFT of a sequence 𝑥 𝑛 = 2 , 2 , 2 , 2 , 1, 1, 1, 1 using DIF-FFT
b) State and prove convolution property of DFT. [7M]

4. Determine the system function 𝐻(𝑧) of the lowest order Chebyshev digital filter [14M]
with the following specification
(i) 3dB ripple in pass band 0 𝑤  0.25 
(ii) 30 dB attenuation in stop band 0.35  𝑤 .

5. Design a linear phase FIR filter with the magnitude response [14M]
𝜋
𝐻 𝑒 𝑗 Ω = 1 𝑓𝑜𝑟   4
𝜋
= 0 𝑓𝑜𝑟    𝜋
4

Use Rectangular window. The length of the impulse response is limited to 7. Find
the magnitude response of designed filter.

6. a) Explain the frequency-domain characterization of down-sampler with neat sketches. [7M]

b) What are the applications of multirate DSP? Explain briefly. [7M]

7. Write notes on the following:

a) VLIW architecture [7M]
b) Multiported memory [7M]

*****

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