Unit 6
Unit 6
DEMODULATION
Structure
6.1 Introduction
Objectives
6.2 Digital Signal and Sampling
6.3 Noise Reduction by Quantisation
Quantisation of Signal
Quantisation Noise and Error
6.4 Pulse Modulation Techniques
Pulse Amplitude Modulation (PAM)
Pulse Time Modulation (PTM)
6.5 Analog Modulation Techniques for Digital Signals
Amplitude Shift Keying (ASK)
Frequency Shift Keying (FSK)
6.6 Digital Phase Modulation
Binary Phase Shift Keying (BPSK)
Quadrature Phase Shift Keying (QPSK)
6.7 Coding
Codes in Modern Communication
Redundancy in Coding
Code Transmission
6.8 Summary
6.9 Terminal Questions
6.10 Solutions and Answers
Appendix A: IC 555 Timer
6.1 INTRODUCTION
So far we have discussed the analog signals quite extensively. However, when the
need for long distance communication was first felt, the signal communication was
carried out in a discrete or digital from. For example, way back in the second century
B.C., the Greeks used light (torches) for signalling. The Greek alphabets were
transmitted as different combinations and positions of torches. So, effectively, the
first data communication was in the form of coded signals. Later on sounds of drums
took place of torches and communication in analog form started. When telegraphic
communication using electrical signals over wire was introduced by Samuel Morse, in
1844, all the alphabets were coded in the form of discrete combinations of dash and
dot. This was a digital communication in electrical mode. Later on in 1876,
Alexander Graham Bell introduced telephone, which carried sound signals in the form
of analog voltage signal over the transmission lines. After this, a lot of research was
carried out on betterment of analog signal transmission of both sound and visuals.
After 100 years, in 1970s, again digital communication started dominating the
communication field- this time because of introduction of computer-based
communication which handles digital signals. Digital electronics is most widely used
because very large scale integration of digital gates is possible on IC chips. Another
advantage of digital signals is their noise immunity, since most of the digital signals
use only two voltage levels corresponding to binary code of 0 and 1.
The modern digital communication systems essentially depend on the transmission of
data in the form of pulse train. The analog signal is first discretised (sampled) and
each sample is digitised (quantised). Then it is converted into the form of a binary
code. This process of converting analog signal into its digital form is called Pulse
Code Modulation (PCM). The coding of signal done in an intelligent way allows us
31
Fundamentals of to find any error occurring during the transmission as well as to correct this error. The
Electronic coded digital data is then transmitted over transmission channels.
Communication
In Sec. 6.2, you will learn about discretisation of analog signal and digital signal. The
quantisation of sampled signal is necessary for converting the analog signal into a
pulse coded signal. The issues related to noise and error involved in quantisation
process are discussed in Sec. 6.3. In Sec. 6.4, you will learn about the pulse amplitude
modulation (PAM) and pulse time modulation (PTM) techniques with the schemes of
their implementation. The pulse time modulation can be in the form of pulse width
(duration) modulation (PWM) or pulse position (on time axis) modulation (PPM).
The analog modulations of a carrier sine wave with a digital signal are called shift
keying techniques. You will learn about amplitude shift keying (ASK) and frequency
shift keying (FSK) in sec. 6.5. The phase shift keying (PSK) is discussed in Sec. 6.6.
Various codes used in modern digital communication and advantages of coding are
discussed in Sec.6.7.
Objectives
The signals we wish to transmit either come from the source or result from the
application of signal processing techniques. Examples of signals coming directly
from the sources are pressure waves emitted by human vocal chord e.g. speech,
singing and the electrical signal resulting from computer keyboard. The manner in
which we communicate information is dependent on the form of signal: analog or
digital.
Spend SAQ 1
2 Min.
What is the minimum sampling frequency needed to sample our speech?
32
Digital Modulation
The minimum sampling rate, 2ωm, is known as the Nyquist sampling rate.
and Demodulation
Digital Signal Formats
Digital signals can have various formats. We will now discuss the basic time domain
signal formats used in digital communication. The digital signals are sent in the form
of a series of pulses of fixed duration decided by a clock interval.
Fig.6.2a shows the unipolar signal format, where the signal does not return to zero and
thus is called unipolar non-return-to-zero (unipolar-NRZ) format. In this case, the
code remains constant during one clock interval. Also it remains constant for
consecutive zeros or ones. Fig. 6.2b shows a unipolar digital signal, which returns to
zero for a half cycle when data value is ‘1’, and remains zero for data ‘0’. This is
called Unipolar Return-to-zero (RZ) format. Fig. 6.2c shows a bipolar signal, where
the signal takes both positive and negative values. This is called bipolar non-return-
to-zero (bipolar-NRZ) format. We could also have bipolar RZ format. Here, the ‘0’
and ‘1’ have opposite polarity levels and each returns to zero level for half pulse
duration. All the signals shown in Fig. 6.2 represent the digital sequence of 11000101.
Fig. 6.2: a) Unipolar NRZ signal; b) Unipolar return-to-zero; and c) Bipolar NRZ format
SAQ 2 Spend
3 Min.
Draw the waveform for 11000101 in bipolar return to zero formats.
After learning about sampling and representation of digital signals, let us discuss the
quantisation signal.
33
Fundamentals of
Electronic 6.3 NOISE REDUCTION BY QUANTISATION
Communication
Consider a long distance communication channel like a telephone connection from
Kashmir to Kanyakumari. When the signal reaches the destination, it will be greatly
attenuated and also will be combined with the noise due to a number of random
electrical disturbances, e.g. crosstalk, ON-OFF surges, distortion, electromagnetic
interference, etc. As a result, the received signal may not be distinguishable in the
presence of noise.
There are number of ways which can be used to identify the signal. One way is
simply to raise the signal level at the transmitting end. It is to be raised to such a level
that in spite of attenuation, the signal is larger than the noise. But the solution is not
feasible. Let us see why.
A second solution to the above problem may be the use of repeaters. Suppose a
repeater is situated at the midpoint of a long communication channel. The repeater
will raise the signal level, and also the noise level, introduced in the first half of the
communication path. This noise can be removed by using filters. The signal then
passes to the receiver after due amplification by the repeater. Now, the noise content
in the received signal is only the one which is introduced in the second half path of the
communication channel. Thus the signal to noise ratio (SNR) will improve as
compared to the situation when no repeater is used. If we increase the number of
repeater stations, and remove noise by filtering at every repeater, the signal to noise
ratio will improve considerably. However, a large number of repeaters will naturally
increase the costs.
The third method of reducing the noise content in the signal is the method of
Quantisation.
This quantised signal, when propagating over a channel, may get attenuated and
corrupted by noise. Fig. 6.4a shows the noise superimposed on the quantised levels of
sq(t). Let us suppose that the instantaneous noise voltage amplitude is always less
than half the step size. This noise corrupted signal is received by the receiver
34
Digital Modulation
consisting of a quantiser and an amplifier. The quantiser output assumes a level,
and Demodulation
which is nearest to the input signal level. Therefore, as long as the noise has
instantaneous amplitude less than ∆Vs /2, the noise will not appear at the output. The
Fig. 6.3: Operation of quantisation: a) the base-band signal s(t); and b) quantiser output
waveform
instant at which noise exceeds ∆Vs /2 (point A in Fig. 6.4a) an error level occurs.
Thus, through the method of signal quantisation, the effect of additive noise can be
significantly reduced.
Fig. 6.4: a) Quantised signal with added noise; and b) signal after quantisation
The difference or error due to quantisation process is called Quantisation Error. The
mean square quantisation error e2, where e is the difference between original and
quantised signal voltages is given by
e 2 = ∆V s2 / 12 (6.1)
You must have noticed that this is the same relation expressed by Eq. (2.34) for
quantisation noise.
35
Fundamentals of If ∆Vs is large, the error is large and vice versa. Further, as discussed before, noise
Electronic will be less if ∆Vs is large.
Communication
After learning about the quantisation of signal, let us now discuss the modulation
techniques, which modify the characteristic of a pulse by the modulating signal.
You will find that the The pulse modulation techniques can be classified into two main types: (i) pulse
terms square wave and amplitude modulation (PAM) and (ii) pulse time modulation (PTM). PTM can be
rectangular wave are further divided into pulse width modulation (PWM) and pulse position modulation
sometimes used to indicate (PPM). Out of these techniques, PAM is frequently used whereas PTM is very rarely
same type of waveform.
However, square wave is a used. Let us now discuss these pulse modulation techniques.
special case of rectangular
wave, where TON = TOFF. 6.4.1 Pulse Amplitude Modulation (PAM)
One of the simplest ways to sample or discretise an analog signal is to mix a sine
wave message signal non-linearly with a low duty cycle rectangular wave (a pulse)
shown in Fig. 6.5. Fig. 6.6 shows a typical PAM circuit using a class D amplifier.
The amplifier is held in cut off state by a dc base bias circuit working between + Vcc
and −Vcc. The analog signal is fed at the emitter. The dc bias is adjusted such that
even at the maximum negative amplitude of sine wave the amplifier remains cut off.
The amplifier is allowed to switch ON when the base is driven positive by the large
amplitude pulses at the base input. This will happen when base voltage is larger than
Fig. 6.5: Rectangular
wave the analog voltage at emitter by at least VBE. Now, for a silicon transistor, VBE ~ 0.7V,
hence the transistor will conduct only when the base voltages, which is the sum of
Duty cycle of a signal is biasing voltage and the pulse amplitude is greater than the emitter voltage (analog
defined as input) by at least 0.7V. The ON condition caused by the pulse given to base combined
On time of pulse
= with the instantaneous level of the signal at the emitter will produce a pulsed voltage
Total period of signal
at the collector. This pulse amplitude is proportional to the level of the input analog
TON
= signal at the emitter at that instant.
TON + TOFF
36
Spend Digital Modulation
SAQ 3 and Demodulation
4 Min.
What is the reason for the inverted pulses in the PAM output of Fig. 6.6 with
reference to the input analog signal?
In this circuit A is an amplifier where the analog signal is given. This amplifier has
very high input impedance and hence does not load the signal source. The electronic
switch (MOSFET in this case) is turned ON by the gating pulse. The switch is turned
OFF at the termination of gating pulse. The buffer amplifier passes on the
instantaneous amplitude of analog input during the ON state of the gating circuit at the
output resulting into pulses of varying amplitudes.
Fig. 6.9: Pulse time modulation principle: a) original signal; b) pulse width modulation; and
c) pulse position modulation
Pulse Position Modulation (PPM) technique is shown in Fig. 6.9c. The amplitude and
width of the pulse remains constant in case of PPM. Here, the pulse is delayed with
respect to the sampling instant. The change in delay is proportional to the amplitude
of the signal s(t).
Fig. 6.10a shows PAM signal sA(t) generated using any of the methods discussed
before. A linear ramp-type pulse waveform r(t) is generated simultaneously with the
samples (Fig. 6.10b). These two signals are added. The added signals are shown in
Fig. 6.10c.
Fig. 6.10: PWM Method of generating PTM using PAM: a) PAM signal; b) synchronised ramp
signal; c) summing of PAM and ramp signal; d) pulse width modulation; and e) pulse
position modulation
This signal is fed to one of the inputs of a comparator. The other input is at the
reference level. The output of the comparator will assume only two levels. One
voltage level (0) is held when the input signal is less than the reference level and the
other (1) is held when the input exceeds the reference level. The ramp amplitude is
38
Digital Modulation
adjusted such that it is somewhat larger than the variation in amplitude of PAM
and Demodulation
samples. The reference voltage level of the comparator is chosen in such a way that it
always intersects the sloping portion of the waveform sA(t) + r(t). The first crossing of
the reference level by the waveform sA(t) + r(t) generates the leading edge of the pulse
output of the comparator and the second crossing generates the trailing edge. This
gives us the pulse width modulated signal shown in Fig. 6.10d.
A circuit generating PWM using this principle is shown in Fig. 6.11. Here we use a
triangular wave instead of ramp. It can be easily generated by integrating a square
wave from a generator. The triangular wave is added to the signal s(t). This addition
signal is fed to the comparator’s non-inverting input and the dc reference level to the
inverting terminal. The output gives the PWM signal.
Fig. 6.11: PWM circuit consisting of triangular wave generator, adder and comparator
The pulse position modulated signal shown in Fig. 6.10e can be generated by using
the PWM signal in Fig. 6.10d to trigger the monostable multivibrator (MMV) with the
trailing edges. Monostable multivibrator provides pulses of equal amplitude and
width.
Fig. 6.12a shows a circuit for PPM generation from PWM. Our goal here is to
generate rectangular pulses of short but fixed duration and then change their position
on the time scale. As discussed in Appendix A, timer IC 555 can be used in the
monostable multivibrator (MMV) mode. PWM signal shown in Fig. 6.12b is first
differentiated by R1-C1. The differentiator gives both positive and negative going
pulses. The positive pulses at the differentiator output are eliminated by diode D1, and
then given to the trigger input of MMV (pin No. 2). The differentiated output is
shown in Fig. 6.12c. The pulse width of the MMV output is determined by the values
of R and C. Output at pin No. 3 is a PPM signal. The signal is shown in Fig. 6.12d.
Fig. 6.12: a) PPM generation from PWM using IC 555; b) PWM signal; c) differentiated output
signal at point A; and d) output of a monostable multivibrator
PWM Recovery
The recovery circuit used to decode the original signal from the pulse width
modulated signal (Fig. 6.10d) is a simple integrator. In every cycle, the charge on the
39
Fundamentals of filter capacitor will be corresponding to the average of the voltage in any cycle of the
Electronic PWM wave. Thus the recovered output voltage will change in amplitude
Communication
corresponding to the width of the pulses.
PPM Recovery
Fig. 6.13a shows a circuit used for recovering the PPM signal. It uses IC 555 in
astable (free running) mode. The PPM input is given to the control voltage terminal
(pin no. 5) of IC 555. A voltage given to this pin modulates the threshold and trigger
voltages. This changes the charging period of capacitor C and hence vary the pulse
width (duration) at the output of astable multivibrator. In this way, the PPM signal
gets converted into PWM signal. This PWM signal is then given to a low pass filter
to recover the original signal.
Fig. 6.13: a) PPM recovery circuit; b) Astable output under free running condition (clock);
c) PPM waveform; and d) PWM output
Fig. 6.14: Amplitude Shift Keying: a) schematic of circuit implementation; and b) waveforms
40
Digital Modulation
SAQ 4 Spend
and Demodulation
3 Min.
Suggest a circuit which can act as a key controlled by digital input signal.
In frequency modulation, the frequency of carrier varies in accordance with the base
band signal. In digital base band, the signal (amplitude) can take only one of the two
possible values. When frequency is modulated, the waveform contains two
frequencies depending on the level (amplitude) of the digital signal. The resulting FM
waveform is known as frequency shift keying. Let us denote the base band signal as
sb(t). The resulting FM waveform can be expressed as:
where kf is a proportionality constant, relating frequency changes to the amplitude; Fig. 6.15: a) Base band
and ωc is the carrier frequency. Since sb(t) takes only two values V1 and V0 (see digital signal; and b) FSK
Fig.6.15a), the frequency of Fω m (t ) takes only two values given by: waveform for binary
sequence 1010
Fig. 6.15b shows representative FSK waveform for binary sequence 1010.
The principle used in FSK generator is shown in Fig. 6.16.
In this scheme, two carrier frequency generators (ω0 and ω1) are connected to load
resistance RL via two keys K1 and K2. These keys are operated by the digital
modulating signals. K1 is ON when signal input is 0, while K2 is ON when input is 1.
Hence at RL we receive frequencies ω0 and ω1 when the input signal is 0 and 1
respectively.
FSK Implementation
To implement the FSK scheme, we can use different types of circuits. Let us now
discuss some simple circuits for FSK generation. The simplest circuit is a tank circuit
in an L-C oscillator as shown in Fig. 6.17. The frequency of tank circuit can be
changed by changing the capacitor. During the input 1, the frequency is determined
by L and C1 while at 0, the switch is closed and the frequency is determined by L and
(C1 + C2). If the oscillator uses crystal for its operation then its frequency could be Fig. 6.17: Tank circuit of
changed by shunting a capacitor directly across the crystal during input ‘1’. L-C oscillator
FSK Detection
For FSK detection a circuit called Phase Locked Loop (PLL) is used as shown in
Fig. 6.18. A PLL consists of a phase detector, amplifier, low pass filter and voltage
controlled oscillator. Initially the VCO is made to operate at a predetermined
frequency, f0 decided by R and C. The phase detector (PD) is a circuit that gives
output proportional to the phase difference between the two inputs as shown in
Fig. 6.19. The output of the PD is proportional to the difference between the phases of
two input digital signals which is caused due the difference between their frequencies.
(a)
(b)
For FSK detection, the FSK signal comprising of frequencies ω1 and ω2 is applied to
one input of the phase detector. The second input to the phase detector is the output
of VCO i.e., frequency ω0. Let us assume that at a certain time t1, FSK frequency
signal is ω1. Then the output of the phase detector will be ω1 − ω0. This difference
signal is passed through the low pass filter (LPF), which gives the corresponding dc
output voltage. At some other time t2, FSK signal is at frequency ω2 and LPF has the
output voltage corresponding to ω2 − ω0. This is fed to the VCO input and therefore
the output frequency of VCO changes depending on whether the FSK signal is at
frequency ω1 or ω2. The important characteristic of a PLL circuit is that, the VCO
42
Digital Modulation
frequency is locked with the input frequency, that is, the frequency of VCO changes,
and Demodulation
according to the output of low pass filter, such that it becomes equal to the input
frequency. Thus the PLL will lock either at frequency ω1 or ω2. The corresponding
changes at the input of VCO represent the demodulated signal.
You may now like to attempt one SAQ.
SAQ 5 Spend
2 Min.
What is the essential difference between analog FM signal and FSK signal?
In digital communication, phase modulation is used extensively. You will learn about
it in the next section.
Similar to the frequency shift keying, let us start with a sinusoidal carrier of the form
where ωc is the carrier frequency; and kp is the proportionality factor relating the phase
shift with the base band digital signal sb(t).
Now let us discuss the different phase modulation techniques used in digital
communication.
Let us now express these phase shifts in terms of average phase, θ, and a deviation, ∆
as:
θ 0 + θ1
θ= (6.6a)
2
θ1 − θ 0
∆= (6.6b)
2
Then s0(t) and s1(t) in Eq. (6.5a and b) can be written as:
s0(t) = A cos (ωct + θ −∆) (6.7a)
s1(t) = A cos (ωct + θ + ∆) (6.7b)
43
Fundamentals of Therefore, we can express these signals in general as follows:
Electronic
Communication
si (t) = A cos [ωct + θ + ∆ di (t)] (6.8)
where di(t) is the data sequence consisting of +1 or −1 and ∆ is the phase deviation,
also known as the modulation index. We use trigonometric expansions to express
si(t):
cos (A+B) = cos A cos B
− sin A sin B si (t) = A cos (ωct + θ) cos [∆ di (t)] − A sin (ωct + θ) sin [∆ di (t)] (6.9)
sin (−θ) = − sin θ Now we can use the even and odd properties of the cosine and sine functions to
cos (−θ) = cos θ reduce this further:
si (t) = A cos (∆) cos (ωct + θ) − A di (t) sin (∆) sin (ωct + θ) (6.10)
The first term in Eq. (6.10) is the residual carrier, that is, it does not depend on the
data being sent. The second term represents the modulated information signal, or
sidebands.
If the modulation index, ∆, is set equal to π/2 then Eq. (6.10) reduces to
In this case, the residual carrier term is equal to zero. Further we have arbitrarily set θ
to 0° to simplify the expression. Had we not done so, we would just have to carry the
phase throughout the analysis. The PSK waveform of (Eq. 6.11) represents the
suppressed carrier signal and the two signals are the negative of each other.
We call such signals antipodal. This is the best choice of phase angle since it
achieves a minimum bit error rate. In this case, the two signals are 180° out of phase
with each other.
In practice, the BPSK signal can be generated by applying the waveform A cos ω c t as
a carrier to a balance modulator. The base band signal sb(t) is applied as a modulating
waveform. This is shown in Fig. 6.20a. Fig. 6.20b shows the base band signal sb(t)
for 0 and 1 data; and Fig. 6.20c depicts the BPSK waveforms.
Fig. 6.20: a) BPSK implementation; b) waveforms for sb (t) = 0 and 1; and c) output
waveform for 1010
Spend SAQ 6
3 Min.
From the output shown in the Fig. 6.20, find out the values of di(t) for
(i) sb(t) = 1; and (ii) sb(t) = 0.
44
Digital Modulation
6.6.2 Quadrature Phase Shift Keying (QPSK) and Demodulation
Similar to binary phases shift keying, we can also perform the quadrature phase
shift keying (QPSK). In case of BPSK, when bit duration is Tb the channel
1
bandwidth must be nominally 2fb, where f b = . QPSK allows transmission using
Tb
half of this bandwidth. To achieve QPSK we use a D-flip-flop as a one bit storage
device. You have already learnt about the flip-flops in PHE-10 course. The
schematic and waveform for D-flip-flop are shown in Fig. 6.21. For brevity, let us
revise the characteristics of this flip-flop briefly.
i) It has a single input where data stream is applied;
ii) At the active edge (rising or falling) of the clock the logic level at input D is
transferred to output Q;
iii) When the active edge occurs precisely at the same point of time where data also
changes, the output of flip-flop will be ambiguous. In practice, change in d(t) will
occur slightly after the active edge because of the delay while passing through the
gates and flop-flop. We use same clock for all the components in the circuit; and
iv) Once the flip-flop has registered the data bit in response to an active clock edge, it
will hold that bit until updated by the occurrence of the next succeeding active
edge.
QPSK Generator
A QPSK signal generator is shown in Fig. 6.22a. In this circuit we consider that the T-flip-flop is used as ÷ 2
active edge is negative going. A T-flip-flop is driven by clock (waveform (i) in counter.
Fig. 6.22 b) whose period is equal to one bit time Tb. The T flip-flop generates even
(waveform (ii)) and odd (waveform (iii)) waveforms. These clocks have period 2Tb.
The active edges of the two clocks are separated by the bit time Tb. The bit stream sb(t)
is applied as an input data to both D flip-flops. One D is driven by an even clock and
the other by odd clock. They register alternate bits and hold such registered bit for
two bit intervals (2Tb). The bits are numbered as shown in waveform (iv) of Fig.
3.22b. The bit stream so(t) registers bit 1 and holds for 2Tb, then registers bit 3 for
time 2Tb, then bit 5 for 2Tb etc. (waveform (v)). The even bit stream se(t) holds for
time 2Tb each, the alternate bits numbered 2,4,6 etc. (waveform (vi)).
The bit stream se(t) in form of its di(t) values (±1) is superimposed on carrier
A cos ωc t and bit stream so(t) in its di(t) values (±1) is superimposed on A sin ωct. For
this a multiplier is used. This generates two signals s e′ (t ) and s o′ (t ) . These signals are
then added to generate the transmitted output signal Vm(t).
In BPSK the generated signal has bandwidth of 2 × (1 / Tb ), since bit time is Tb and is
multiplied by the carrier. In QPSK the bit times are 1 / 2Tb . So the bandwidth is
45
Fundamentals of 2 × (1 / 2Tb ) which is half of that required for BPSK. Both so(t) and se(t) possess the
Electronic
Communication same bandwidth.
Though so(t) and se(t) occupy the same spectral range, they are individually
identifiable because of the phase quadrate of their carriers.
when s o (t ) = 1, s o′ (t ) = A sin ω c t
s o (t ) = −1, s o′ (t ) = − A sin ω c t (6.14)
s e (t ) = 1, s e′ (t ) = A cos ω c t
and s e (t ) = −1, s e′ (t ) = − A cos ω c t
46
Digital Modulation
and Demodulation
After discussing the modulations in digital signals, let us address the important aspect
of coding. Coding allows us to carry out error free data communication.
6.7 CODING
There are many codes in practical use, like Morse code for telegraphic messaging,
ASCII Code for representing alphanumerical characters in computers etc. There are
some special codes used in modern digital communication systems. Let us discuss
these codes now.
1. Non-return-to-Zero (NRZ)
2. Return-to-Zero (RZ)
3. Phase Encoded
4. Multilevel Binary
You have already learnt about the first two types in Sec. 6.2. Let us now briefly
discuss the remaining two classes.
Spend SAQ 7
2 Min.
Identify the code format and signal value of the waveform shown in Fig. 6.25.
Now let us assume that not more than one error will be made in a triplet. Then if we
receive 001, 010 or 100 we would be rather certain that the transmitted message was
actually 000. Similarly if 011, 101 or 110 is received, the message is 111.
48
Digital Modulation
If the noise level is low enough, we can safely assume that more than one error is
and Demodulation
unlikely. But there is always a finite possibility that two errors will occur. If two
errors occur, we would be inclined to read 1 for 0 and 0 for 1. There is always a
possibility of 3 errors taking place. In this case, we would not even suspect that an
error has been made.
In this way, though coding may allow a great deal of detection and correction, it
ordinarily cannot detect or correct all errors.
An essential feature of redundancy is that, not all the sequences of symbols constitute
a valid message, e.g. with a triplet of bits, eight combinations are possible but we use
only two of them (000 and 111). The fact that certain words are not in our dictionary
allows us to detect errors. Corrections are made on the basis of similarity between
unacceptable and acceptable words.
If the redundant message is to be transmitted at the same rate as the original binary
signal, we shall have to transmit three bits in time Tb otherwise allocated to a single
bit. But if the time allocated to a bit decreases, probability of error increases.
However, even with this disadvantage, addition of redundant bits in coding does result
into worthwhile net advantage.
CW transmission is simple and requires a narrow bandwidth. However, there are also
some disadvantages of this method. First, the continuous wave transmission is a form
49
Fundamentals of of AM and therefore the noise content is large in comparison with that of the FM
Electronic systems. The second problem arises because of no transmission of wave in the space
Communication
region. In a communication system, the receiver normally has a facility of automatic
gain control. In the process of keeping the signal level constant throughout the
message, during space the gain of the receiving system increases automatically. This
increased gain is responsible for amplifying noise and thus making the received noise
troublesome. One of the methods to reduce this noise during the space is manually
controlling the gain of the receiver, that is, increase the gain when the long and the
short marks are received and decrease during space. But if the received signal (long
and short marks) itself is weak, quite high gain is necessary and it may not be
controlled during space.
In this case, the carrier is always transmitted. The carrier is amplitude modulated by
two different frequencies representing mark and space. These two frequencies are
typically separated by 170 Hz. The two tone modulation system is shown in Fig. 6.27.
When the key is pressed to transmit the signal, the carrier (typically 10 MHz) is
modulated by a 470 Hz signal for mark condition while it is modulated by 300 Hz
signal for the space condition. Since this is an amplitude modulation system, the
output frequencies will be 10 MHz ± 470 Hz for mark and 10 MHz ± 300 Hz for
space. Therefore, the band width required will be 470 Hz × 2 = 940 Hz ~ 1 kHz.
In the received signal after detection, either a 300 Hz or a 470 Hz signal is present. A
470 Hz band pass filter provides an output for mark condition. This makes the output
high whenever 470 Hz is present and low otherwise.
a) It requires small bandwidth (1 kHz). This means that there will be 100 channels
of 1 kHz each in frequency spectrum between 10 MHz and 10.1 MHz.
b) Since the carrier is always transmitted, it eliminates the problem of gain control
and therefore no fading effects occur.
Let us now summarize the points you learnt in this unit.
50
Digital Modulation
6.8 SUMMARY and Demodulation
1. Explain the role played by the choice of step size in the quality of quantisation of
sampled signal.
2. What is the disadvantage of PCM?
3. The voltage range of the input to a PCM system is 0 to 1V. A 3-bit ADC is used
to convert the analog signal to digital values. How many quantisation levels are
provided? What is the resolution of each level? What is the quantisation error for
the system? What is mean square quantisation error?
1. Our speech has a typical bandwidth of 4 kHz. Hence the minimum sampling
frequency should be 8 kHz.
2.
51
Fundamentals of The bipolar R-Z signal has three values, higher (positive) level, lower (negative)
Electronic and zero level as shown in Fig. 6.28.
Communication
3. The PAM output in Fig. 6.6 is taken at the collector, while the analog input is
given to the emitter. The base emitter voltage can be expressed as
When the pulse amplitude at the base is zero (OFF time of pulse), the transistor
does not conduct at all and the collector output is +Vcc (12V). When the pulse is
higher (ON times), the conduction of transistor is decided by analog amplitude at
the emitter. Large positive amplitude reduces conduction (since VBE reduces) and
collector voltage is higher as compared to the case when analog amplitude is
lower. This way, the pulses at output have the height proportional to the inverse
of the input analog signal.
Fig. 6.29
Terminal Questions
1. The quantisation noise is proportional to the square of step size. Hence for
reducing this noise, the step size should be reduced. But since noise immunity to
spikes in the input signal increases with step size (∆Vs /2), hence the choice of step
size should be made optimally to take care of both the types of noises.
∆V s2 (0.125) 2
= = 1.3 × 10 −3 V 2
12 12
Reference Material:
53
Fundamentals of
Electronic
APPENDIX A: IC 555 Timer
Communication
The 555 timer consists of two voltage comparators, a bistable flip-flop, a discharge
transistor, and a resistor divider network. To understand the basic concept of the
timer let us first examine the timer in block form as in Fig. A.6.1.
The resistive divider network is used to set the comparator levels. Since all three
resistors are of equal value, the threshold comparator (Comp-I) is referenced
internally at 2/3 of supply voltage level and the trigger comparator (comp-II) is
referenced at 1/3 of supply voltage. The outputs of Comp-I and Comp-II are tied to
the bistable flip-flop. When the trigger voltage is moved below 1/3 of the supply, the
comparator changes state and sets the flop-flop driving the output to a high state. The
threshold pin normally monitors the capacitor voltage of the R' C timing network
(please refer Fig. A.2a). When the capacitor voltage exceeds 2/3 of the supply, the
threshold comparator resets the flip-flop which in turn drives the output to a low state.
When the output is in a low state, the discharge transistor is ON, thereby discharging
the external timing capacitor. Once the capacitor is discharged, the timer will await
another trigger pulse, the timing cycle having been completed.
The 555 timer can be mainly used in two basic operation modes:
Monostable Multivibrator
This configuration requires only two external components for operation
(see Fig. A.2a). The sequence of events starts when a voltage below one third VCC is
sensed by the trigger comparator. The trigger is normally applied in the form of a
short negative-going pulse. On the negative-going edge of the pulse, the device
triggers, the output goes high and the discharge transistor turns off. Note that prior to
the input trigger pulse, the discharge transistor is ON shorting the timing capacitor to
the ground. After trigger action, the timing capacitor, C starts charging through the
timing resistor, R'. The voltage on the capacitor increases exponentially with a time
constant T = R'C. Ignoring capacitor leakage, the capacitor will reach the two thirds
VCC level in 1.1 time constants or
54
T = 1.1 R'C (A.1) Digital Modulation
and Demodulation
where T is in seconds, R is in ohms, and C is in Farads. This voltage level trips the
threshold comparator, which in turn drives the output of the flip-flop low and turns on
the discharge transistor. The transistor discharges the capacitor C rapidly. The timer
has completed its cycle and will now await another trigger pulse.
Astable Multivibrator
In the astable (free-run) mode, only one additional component, RB, is necessary. The
trigger is now tied to the threshold pin. At power-up, the capacitor is discharged,
holding the trigger low. This triggers the timer, which establishes the capacitor charge
path through RA and RB. When the capacitor reaches the threshold level of 2/3 VCC the
output drops low and the discharges transistor turns on.
The timing capacitor now discharges through RB. When the capacitor voltage drops to
1/3 VCC, the trigger comparator trips, automatically re-triggering the timer, creating an
oscillator whose frequency is given by:
1.49
f = (A.2)
(R A + 2 R B ) C
55