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Practice Spring 2021 Midterm

This document contains a practice midterm exam for a CMP 334 course covering topics in digital logic circuits and computer architecture. The exam contains 6 problems testing knowledge of number representations, Boolean logic, combinational and sequential circuits, arithmetic operations, condition codes and flags. It asks students to perform conversions between binary, hexadecimal and decimal numbers, draw circuits, construct truth tables, solve Boolean expressions, analyze addition and subtraction with carries and overflow, and define key concepts.
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0% found this document useful (0 votes)
13 views2 pages

Practice Spring 2021 Midterm

This document contains a practice midterm exam for a CMP 334 course covering topics in digital logic circuits and computer architecture. The exam contains 6 problems testing knowledge of number representations, Boolean logic, combinational and sequential circuits, arithmetic operations, condition codes and flags. It asks students to perform conversions between binary, hexadecimal and decimal numbers, draw circuits, construct truth tables, solve Boolean expressions, analyze addition and subtraction with carries and overflow, and define key concepts.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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CMP 334 practice midterm Spring 2021

1 Convert the following to the indicated basis:


a) 0x BE95F → binary
b) 0b 1001 1011 1010 0010 0110 → hexadecimal
c) 73110 → binary
d) 0b10 0110 0101 → decimal
e) 121310 → hexadecimal
f) 0x45C5 → decimal

2 For the Boolean expression f ≡ (abc + bc) ∙ (ab + ac).


a) draw (without simplifying) the circuit for f, and
b) construct the truth table for f (with its rows in standard order and with auxiliary columns for each
sub-expression of f).

3) Given: X = 0x7E and Y = 0xD5,


a) Convert X and Y to 8-bit binary numbers.
b) Compute, using carry-look ahead addition, the 8-bit sum, X+Y. (Show the column carries.)
c) Compute Y, the 8-bit two's complement of Y.
d) Compute, using two's complement addition, the 8-bit difference, X–Y. (Show column carries.)
e) Convert X+Y, Y, and, X–Y to hexadecimal.
f) What are the values of the condition flags upon computing X+Y?
g) What are the values of the condition flags upon computing X–Y?
h) T or F The unsigned 8-bit sum X+Y is accurate.
i) T or F The unsigned 8-bit sum X+Y is accurate.
j) T or F The unsigned 8-bit difference X–Y is accurate.
k) T or F The unsigned 8-bit difference X–Y is accurate.
l) T or F Under the unsigned interpretation, X < Y.
m) T or F Under the unsigned interpretation, X ≥ Y.

4) Use the recipe for designing combinational circuits to develop a circuit that determines whether a 3-
bit signed integer N satisfies the equation: (N3 + 5N2 – 1) mod 3 = 0.
a) Draw a “black box” diagram for the circuit that
b) Formalize the informal semantics of this circuit with a truth table.
c) Construct the boolean clause corresponding to the truth table.
d) Draw the circuit corresponding to the boolean formula.

5) For each row in the following table, determine whether the specified relation for the given
interpretation of A and B would hold after N-bit subtraction ( A – B ), assuming the subtraction
produced in the indicated condition flag values.
flags interpretation relation T/F
ZNCV unsigned A < B
ZNCV unsigned A > B
ZNCV unsigned A = B
ZNCV unsigned A < B
ZNCV unsigned A > B
ZNCV unsigned A ≥ B
ZNCV unsigned A ≥ B
ZNCV unsigned A ≤ B
ZNCV unsigned A > B

6) Short answer:
a. What is the smallest number that can be represented as a signed 10-bit integer?
b. What is the primary difference between combinational and sequential circuits?
c. Give a formula for the two’s complement of an signed 6-bit integer N.
d. Convert 0b10110010101100110110111010010110101111 to hexadecimal.
e. Give an example of De Morgan’s Law.
f. How many distinct values can be represented (under any interpretation) with 12 bits?
g. What does the acronym ISA stand for?
h. Under what conditions does the signed n-bit sum S of two n-bit numbers X and Y result in
overflow?
i. If the value of the unsigned interpretation of an 8-bit number is 167 (128 + 39), what is the value
of the same number under the signed interpretation?
j. What does a multiplexer circuit do?

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