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Codes: BCD, Excess-3, Gray and

The document contains a schedule of topics to be covered in a digital logic design course. It lists 33 topics ranging from multiplication and division to synchronous counters. For each topic it specifies the date, duration, teaching method (chalk and talk) and faculty/teaching assistants (T1, R2, A1) responsible with their corresponding page numbers in course material.

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0% found this document useful (0 votes)
49 views5 pages

Codes: BCD, Excess-3, Gray and

The document contains a schedule of topics to be covered in a digital logic design course. It lists 33 topics ranging from multiplication and division to synchronous counters. For each topic it specifies the date, duration, teaching method (chalk and talk) and faculty/teaching assistants (T1, R2, A1) responsible with their corresponding page numbers in course material.

Uploaded by

avk.3471
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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6 Multiplication and Division 1 14-09-23 14-09-23 Chalk & A1(32-35)

Talk
7 Codes: BCD, Excess-3, Gray and 1 15-09-23 15-09-23 Chalk & T1(16-22)
Alphanumeric Codes Talk R2(20-22)
A1(70-96)
8 BOOLEAN ALGEBRA: Boolean 1 19-09-23 19-09-23 Chalk & T1(35-43)
Expressions and Theorems Talk R2(36-43)
A1(140-
151)
9 Logic Gates and Universal Gates 1 20-09-23 20-09-23 Chalk & T1(56-60)
Talk A1(108-
120)

10 Canonical and Standard forms 1 26-09-23 26-09-23 Chalk & T1(47-53)


Talk A1(161-
165)

11 Boolean functions 1 27-09-23 27-09-23 Chalk & T1(43-47)


Talk A1(157-
161)

12 Simplification of Boolean functions 1 29-09-23 29-09-23 Chalk & T1(72-83)


using K maps Talk R2(162-
165)
13 Minimal Functions and their 1 30-09-23 30-09-23 Chalk & T1(108-
properties Talk 112)
R2(120-
128)
A1(196-
223)

1 03-10-23 03-10- Chalk & T1(102-


14 Tabulation Method 23 Talk 108)
R2(154-
160)
A1(250-
269)

15 NAND and NOR Implementations 1 04-10-23 04-10- Chalk & T1(86-100


Two Level and Multi Level 23 Talk & 132-
145)
R2(183-
189)
16 UNIT-II -COMBINATIONAL 1 07-10-23 07-10- Chalk & T1(145)
LOGIC CIRCUITS: EX-OR, 23 Talk R2(60-62)
EX-NOR Circuits
17 General procedure for combinational 1 10-10-23 10-10- Chalk & T1(117-
logic circuits 23 Talk 118)
R2(86-87)
A1(282)
18 Design and application of binary 1 11-10-23 11-10- Chalk & T1(119-
Adders and Subtractors 23 Talk 125)
R2(98-
101)
A1(282-
291)
19 Comparators 1 14-10-23 14-10- Chalk & T1(164-
23 Talk 167)
A1(326-
330)

20 Encoders & Decoders 1 17-10-23 17-10- Chalk & T1(167-


23 Talk 175)
R2(235-
238)
A1(330-
342)

21 Encoders & Decoders 1 18-10-23 18-10- Chalk & T1(167-


23 Talk 175)
R2(235-
238)
A1(330-
342)

22 Multiplexers and De-multiplexers 1 28-10-23 28-10- Chalk & T1(175-


23 Talk 182)
R2(230-
232)
A1(345-
357)

23 Multiplexers and De-multiplexers 1 31-10-23 31-10- Chalk & T1(175-


23 Talk 182)
R2(230-
232)
A1(345-
357)
24 Design of BCD to 7 Segment Decoder 1 01-11-23 01-11- Chalk & A1(343-
23 Talk 344)

25 Parity Generator and Checker 1 03-11-23 03-11- Chalk & A1(322-


23 Talk 326)

26 BCD Adder/Subtractor 1 04-11-23 04-11- Chalk & T1(162-


23 Talk 164)
A1(298-
302)

27 Carry Look Ahead Adders 1 07-11- 07-11- Chalk & T1(158-


23 23 Talk 162)
A1(293-
295)

28 UNIT-III- SEQUENTIAL LOGIC 10-11-23 10-11- R2(296-


CIRCUITS: 1 23 Chalk & 300)
Latches Talk A1(462-
467)
29 characteristic table, characteristic 1 11-11-23 11-11- Chalk & T1(204-
Equation, Excitation Table, State table 23 Talk 217)
and State Diagrams for SR, JK flip- R2(303-
flops 307)
A1(479-
488)
30 characteristic table, characteristic 1 14-11-23 14-11- Chalk & T1(230-
Equation, Excitation Table, State table 23 Talk 233)
and State Diagrams for Master Slave R2(303-
JK, D and T flip-flops 307)
A1(479-
488)
31 Conversion from one type of Flip-Flop 1 15-11- 15-11- Chalk & A1(492-
to another 23 23 Talk 498)
32 shift registers 1 18-11- 18-11- Chalk & T1(263-
23 23 Talk 272)
R2(329-
333)
A1(511-
522)

33 Synchronous Counter Up/Down 1 25-11-23 25-11- Chalk & T1(272-


Counters using Flip-Flops 23 Talk 276)
A1(532-
538)

39 Design of Ripple Counters 1 01-12-23 01-12- Chalk & T1(276-


23 Talk 284)
R2(333-
338)
A1(538-
558)
UNIT-IV- SYNCHRONOUS 02-12-23 02-12-
SEQUENTIAL CIRCUITS: 1 23 Chalk & R2(468)
40 Talk
Basic Design Steps1

41 Sate Assignme1nt Problem 1 07-12- 07-12- Chalk & R2(446-


23 23 Talk 455)
A1(589)

42 Mealy State Model and Moore model 1 09-12- 09-12- Chalk & A1(592-
23 23 Talk 594)

43 Melay and Moore conversion 1 13-12-23 13-12- Chalk & A1(595-


23 Talk 598)
44 State Minimization 1 14-12- 14-12- Chalk & A1(588-
23 23 Talk 589)

47 Analysis of Synchronous Sequential 1 15-12- 15-12- Chalk & R2(364-


Circuits 23 23 Talk 367)
A1(594-
595)
48 Sequence Generator 1 19-12- 19-12- Chalk & A1(565-
23 23 Talk 576)

49 Sequence detector 1 23-12- 23-12- Chalk & R2(393-


23 23 Talk 398)
A1(598-
600)

50 UNIT -V- IC LOGIC 1 29-12-23 29-12- Chalk & T1(562-


FAMILIES:RTL 23 Talk 563)

51 DTL 1 02-01-24 02-01- Chalk & T1(563-


24 Talk 564
&568-
578)
A1(733-
745)

52 TTL 1 03-01-24 03-01- Chalk & T1(565-


24 Talk 568 &
578-580)
A1(745-
747 &
747-752)

53 IIL 1 04-01-24 04-01- Chalk & T1(564-


24 Talk 565
&568-
578)
A1(733-
745)

ECL 05-01-24 05-01- R2(413-


24 423)
A1(798-
800)

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