E 08000CS207122301 Pages: 2

Reg No.:_______________ Name:__________________________

APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
B.Tech Degree S3 (S, FE) / S1 (PT) (S, FE) Examination December 2023 (2015 Scheme)

Course Code: CS207

Course Name: Electronic Devices & Circuits
Max. Marks: 100 Duration: 3 Hours
PART A
Answer all questions, each carries 3 marks. Marks

1 Draw a differentiator circuit and draw the input and output waveforms for (3)
Square wave input.
2 Verify whether the following circuit will work as a clamper (3)

3 Draw and explain the circuit of a 78XX IC based voltage regulator. (3)
4 Draw and explain output characteristics of FET (3)
PART B
Answer any two full questions, each carries 9 marks.
5 a) Compare series and shunt voltage regulators. (3)
b) Draw the characteristics and explain the working of an n-channel JFET. (6)
6 a) Draw and explain the circuit of a slicer for levels of -3V and -6V. (4)
b) Draw and explain the block diagram of SMPS. (5)
7 a) Draw the circuit of a transistor shunt regulator and explain its working. (5)
b) Assuming suitable values, design an integrator circuit for a 1 KHz square (4)
wave. Draw the relevant waveforms and circuit with designed components.
PART C
Answer all questions, each carries 3 marks.
8 Compare positive feedback with negative feedback. (3)
9 Explain the effect of cascading on amplifier's gain and bandwidth. (3)
10 What is mean by operating point of a transistor? (3)
11 Draw the circuit diagram for bistable multivibrator and give a simple (3)
explanation?

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PART D
Answer any two full questions, each carries 9 marks.
12 a) Draw the circuit diagram and explain the working of a common source MOSFET (4)
amplifier.
b) Draw the circuit diagram and explain the working of Wien bridge oscillator for (5)
an output frequency of 6 KHz.
13 a) With neat diagram explain the working of Hartley oscillator using BJT. (4)
b) Derive the expression for frequency of oscillation and loop gain of a Hartley (5)
oscillator using BJT
14 With circuit diagram and design equations explain the working of a monostable (9)
multivibrator
PART E
Answer any four full questions, each carries 10 marks.
15 a) Define: (1) Slew rate, (2) CMRR, (3) offset voltage (4) Offset current (8)
b) What are their practical values for parameters of op-amp IC 741 (2)
16 a) Draw the circuit diagram and frequency response of a second order high pass (5)
Butterworth filter using OP-AMP and explain its working.
b) Design a first order Butterworth LPF using OP-AMP for a high cut of frequency (5)
of 1KHz and pass band gain is 2.Give the design steps and draw the frequency
response. (Assume C=0.01μF)
17 Using 555 timer, Explain the operation of monostable multivibrator with (10)
necessary waveforms.
18 a) Draw the circuit diagram of a 3-input summing amplifier using Op-Amp and (5)
explain its working with supporting derivations.
b) Sketch the circuit of an integrator circuit using Op-Amp and prove that the (5)
integration happens on the input signal.
19 a) Explain the concept of Binary weighted resistor DAC. What are its drawbacks? (10)
In a 10 bit DAC, Reference voltage is given as 15v. Find analog output for digital
input of 1011011001.
20 a) With functional block diagram, explain the working of 555 Timer IC. (4)
b) Write design equations and pin out of 555 TIMER IC working as astable (6)
Multivibrator to generate a wave form of 1KHz.,with 50% duty cycle.
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