Sum-subtract fixed point LDPC decoder

L. Arnone(1), C. Gayoso, C. González and J. Castiñeira Moreira(2)

Electronic Department, School of Engineering, J. B. Justo 4302, Mar del Plata

University, Argentina.

(1) leoarn@fi.mdp.edu.ar, (2) casti@fi.mdp.edu.ar

Abstract: In this paper a logarithmic decoder for a LDPC code is presented. The

performance of this decoding algorithm is similar to the original decoding algorithm

performance, introduced by D. J. C. MacKay and R. M. Neal. It is a simplified algorithm

that can be easily implemented in programmable logic technology like FPGA because it

makes use of only additions and subtractions, avoiding the use of quotients and

products, and float point arithmetic. The effect of the look-up tables, which take into

account a correction factor needed for the implementation of the logarithmic form of the

algorithm, is also analysed. There is no degradation in BER performance for look-up

tables of a reasonable size.

Introduction: In this paper we propose a very low complexity sum-subtract fixed point

decoding algorithm for LDPC codes. This algorithm uses also two look-up tables.

A comparison is done between the BER performance of the proposed decoding

algorithm, and the BER performance of the sum-product decoding algorithm of Gallager

[1] for a given LDPC code. Results show that there is no significant difference in BER

performance between the optimal and the proposed algorithm. The proposed algorithm

is characterized by a very low complexity implementation, thus becoming a better

alternative for programmable logic implementation of a LDPC decoder than the

traditional sum-product algorithm.

LDPC Codes: LDPC codes [1]-[3] are a powerful class of linear block codes

characterized by a parity check matrix H , which fits the condition H o x = 0 for any

codeword x of the code. A LDPC decoder is essentially a decoding algorithm [2] [3]
)
designed for finding a codeword d , (an estimate of the codeword x ), able to fit the

condition:

)
H od = 0 (1)

A LDPC decoding algorithm is described over a bipartite graph depicted considering the

relationship between the symbol nodes d ( j ) , which represent the bits or symbols of the

code vector x , and the parity check nodes f (i ) , which represent the parity equations

described in matrix H . Details of the sum-product decoding algorithm for LDPC codes

can be found in [1]-[3].

Simplified decoding Algorithm: The proposed simplification makes this algorithm

operate using only additions and subtractions. This simplification makes use of a

logarithmic version of the calculations involved in the original algorithm. It is based on

the fact that a given real number z ≤ 1 can be expressed as:

→ wz = ln (z )
− wz
z=e (2)
The algorithm has two parts in which quantities wq ij and wr ij , associated with q ij

and rij [2][3], are iteratively updated. Table 1 summarises the add-subtract decoding

(
procedure. The correcting functions f + a , b ) and f ( a , b )
− [4][5] are implemented as

look-up tables. The set of indexes of all the symbol nodes d ( j ) related to the parity

check node f (i ) will be denoted as N (i ) , and N (i ) \ j will be the same set but excluding

the index j . M ( j ) is the set of sub indexes of all parity check nodes f (i ) related to the

symbol node d ( j ) , and M ( j ) \ i will be the same set but excluding the index i . The

LDPC decoding algorithm involves the evaluation of the following steps:

− wp xj
Initialization: The A Priori Probability (APP) p xj = e is the probability of that the j -th

symbol adopts the value x . The initialization process is done by setting the values of

x x
estimations wq ij to the APPs of the symbols wp j .

0 1
Horizontal step: Compute wr ij and wr ij for each i , j .

Vertical step: For each i , j the quantities wq ij0 and wq 1ij are evaluated. Then A

Posteriori Estimations (APEs) wq 0j and wq 1j are updated.

Estimation of decoded symbol: Finally, an estimation of the decode bit d̂ j can be done

)
using APEs wq 0j and wq 1j . If H o d = 0 then the decoding algorithm halts. Otherwise

the algorithm repeats starting from the horizontal step.

Look-up tables implementation: the performance of the proposed decoding algorithm

(
is set by the characteristics of the look-up tables f + a , b ) (
and f − a , b ) [4][5]. The

maximum number of bits used to construct these tables is c , so that the maximum

number of entries of these tables is of size N t = 2 c .

Complexity analysis: if N is the number of columns of the matrix H , and t is the

average number of ones per column of that matrix, the sum-product decoding algorithm

[2]-[6] involves the calculation of 6 ⋅ N ⋅ t products and 5 ⋅ N ⋅ t sums (average).

The proposed algorithm requires of 14 ⋅ N ⋅ t sums, 3 ⋅ N ⋅ t subtracts, and 4 ⋅ N ⋅ t

accesses to the look-up tables. In spite of requiring more sums than the traditional

decoding algorithm, complexity of the proposed algorithm implementation is highly

reduced due to the fact of operating by using neither quotients nor products.

Results: The proposed decoder for a LDPC code has been implemented for two LDPC

codes, one with a small parity check matrix H1 of 30 rows and 60 columns and another

one with a parity check matrix H 2 of 504 rows and 1008 columns. The later parity

check matrix has been taken from [7]. Look-up tables make use of c = 16 , so that the

number of entries can be as high as N t = 2 c = 65536 , and the maximum value in

these tables is 65535 . Matrix H1 has been randomly generated to look for that

presenting the best BER performance using the traditional algorithm [2].

The BER performance has been evaluated using the proposed algorithm, for different

sizes of the look-up tables, assuming that each entry is an unsigned integer number

represented in binary format using 2 bytes (16 bits).

As seen in Fig. 1, for the LDPC code using a small parity check matrix H1 there is no

significant loss in BER performance using the proposed algorithm, if the size of each of
the two tables is of 256 entries of 2 bytes, or larger. The use of tables of size 512 or

larger does not show differences with respect to the use of the ideal functions, which in

turn has the same BER performance as the sum-product algorithm. The BER

performance of a more practical LDPC code that uses a parity check matrix H 2 is

shown in Fig. 2. It can be seen that there is no significant loss in BER performance

using the proposed algorithm, if the size of each of the two tables is of 128 entries of 2

bytes, or larger. The use of tables of size 256 or larger does not show differences with

respect to the use of the ideal functions. Therefore it is possible to implement a low

complexity decoding algorithm without significant BER performance loss, by using the

proposed logarithmic decoder with two look-up tables of reasonable size.

Conclusion: In this letter a low complexity decoding algorithm for LDPC codes is

presented. A comparison is done with respect to the traditional decoding algorithm [2]

to show that the BER performance of the proposed algorithm is close to the traditional

decoding algorithm, if the involved look-up tables are constructed appropriately.

The proposed decoding algorithm shows a very low complexity, being suitable for

programmable logic implementations. It makes use only of sums and subtracts over

fixed point arithmetic, thus avoiding the use products or quotients, and of float point

arithmetic.

Acknowledgments

We want to express our acknowledgment to D. J. C. MacKay for sharing the web site

from which we take the parity check matrix of a LDPC (1008,504) code, whose

decoding has been implemented in this paper using the proposed LDPC decoding

algorithm.
References

1. R. G. Gallager, “Low Density Density Parity Check Codes”. IRE Trans. Information

Theory, Vol. IT-8, N°1, pp 21-28, January 1962.

2. D. J. C. MacKay and R. M. Neal, “Near Shannon limit performance of low density

parity check codes”. Electronics Letters. 13th March 1997, Vol.33, N°6.

3. D. J. C. MacKay, R. M. Neal, “Good Error-Correcting Codes based on Very Sparse

Matrices”, Available from

http://www.inference.phy.cam.ac.uk/mackay/CodesGallager.html

4. J.P. Woodard, L. Hanzo, “Comparative Study of Turbo Decoding Techniques”.

IEEE Transaction on Vehicular Technology. Nov 2000, Vol. 49, N°6.

5. T. Bhatt, K. Narayanan, N. Kehtarnavaz, “Fixed Point DSP Implementation of Low-

Density Parity Check Codes”. Proc IEEE DSP2000, Hunt, Tx, USA, Oct 15-18,

2000.

6. Li. Ping, W. K. Leung. Decoding Low Density Parity Check Codes with Finite

Quantization Bits. IEEE Communications Letters, Vol. 4, N°2. February 2000.

7. http://www.inference.phy.cam.ac.uk/mackay/codes/data.html
Figure Captions

Figure 1. BER performance of a LDPC code with parity check matrix H1 of size

30 x60 for different values of the size of the look-up tables

Figure 2. BER performance of a LDPC code with parity check matrix H 2 of size

504 x1008 for different values of the size of the look-up tables
Figure 1

-1
10

-2
10

Pbe
-3
10
Table of 4096 entries of 2 bytes,
Table of 512 entries of 2 bytes,
and ideal f+ and f- functions

-4 Table of 256 entries of 2 bytes

10 Table of 128 entries of 2 bytes
Table of 64 entries of 2 bytes
Uncoded transmission

-5
10
1 2 3 4 5 6 7 8
Eb/No
Figure 2

-1
10

-2
10

Pbe

-3 Tables of 4096 entries

10 of 2 bytes, and of 256
entries of 2 bytes
Table of 128 entries of 2 bytes
Table of 64 entries of 2 bytes
Uncoded transmission
-4
10
1 1.5 2 2.5 3 3.5
Eb/No
Table Captions

Table 1. Summary of the add-subtract decoding procedure

Table 1

Add-Sub algorithm Add-Sub expressions

Initialization wq ij0 = wp 0j , wq 1ij = wp1j

Horizontal step. Calculate:

− wrijx
rijx = e with x = 0,1

Horizontal step 1 ( ) (
wδq ij = min wq ij0 , wq 1ij + f − wq ij0 , wq 1ij and )
s ij = 0 si wq ij0 ≤ wq 1ij else s ij = 1

Horizontal step 2 wδ rij = ∑ wδ q ij ′ and sδ rij = ∑ s ij ′

j ′∈N (i )\ j j ′∈N (i )\ j

Horizontal step 3 sδ rij is even

(
wrij0 = ln (2 ) − f + wδ rij ,0 )
(
wr ij1 = ln(2 ) + f − wδ rij ,0 )
sδ rij is odd:

(
wrij0 = ln (2 ) + f − wδ rij ,0 )
(
wr ij1 = ln(2 ) − f + wδ rij ,0 )

Vertical step 1. Calculate: wc ijx = w p xj + ∑ wr i ′xj

i ′∈M ( j )\ i
− wqijx
q ijx = e with x = 0 ,1
( ) (
wq ij0 = wc ij0 − min wc ij0 , wc 1ij + f + wc ij0 , wc 1ij )

( ) (
wq 1ij = wc 1ij − min wc ij0 , wc 1ij + f + wc ij0 , wc 1ij )
Vertical step 2. A posteriori wc xj = wc ijx + wr ijx
estimation: ( ) (
wq 0j = wc 0j − min wc 0j , wc 1j + f + wc 0j , wc 1j )
( ) ( )
− wq xj
q xj = e wq 1j = wc 1j − min wc 0j , wc 1j + f + wc 0j , wc 1j

)
Estimation of decoded Symbol d j d̂ j = 0 if wq 0j < wq 1j , else d̂ j = 1

d j = max (q xj ) = max  e j 
 − wq x 
 