Paris, FranceICSTEM (2019)
Paris, FranceICSTEM (2019)
1
MARY ANN GEORGE, Research Scholar and 2‡DATTAGURU V. KAMATH, Professor
1,2Department of Electronics and Communication Engineering, Manipal Institute of Technology, Manipal Academy of
Higher Education (MAHE), Manipal, India
E-mail: 1maryann.george@learner.manipal.edu, 2dv.kamath@manipal.edu
‡Corresponding Author
Abstract- The paper discusses voltage mode analog circuit implementation of PID controller for speed control of DC motor
using Operational Transconductance Amplifiers (OTAs). OTA-C approach is used to realize the controller due to its
features like electronic tunability of its transconductance and greater bandwidth. The controller parameters are computed
in MATLAB using auto-tuning method. The controller with the system is simulated in Cadence environment with 180 nm
GPDK technology. Time domain analysis and the performance of compensated system are presented.
Keywords- PID controller, Speed control of DC Motor, Operational Transconductance Amplifier, Tuning Methods
1
By using Newton’s second law and Kirchhoff’s voltage law
in Fig. 1, the following equations are obtained
3
is shown in Fig. 8.
(a)
(a)
(b)
Fig. 9 (a) Schematic circuit and (b) symbol of DC motor
implemented in Cadence using VCVS model
Fig. 12 Schematic of PID controller with DC motor plant in Cadence Kp PA OS % Ts (s) Tr (s)
environment 15 1.09 9.3 1.83 0.538
17.5 1.07 6.76 1.76 0.516
Fig.13 shows the step response of the compensated system 20 1.05 4.64 1.63 0.489
(plant with PID controller). From the response of the 22.5 1.03 2.87 1.41 0.465
compensated system it is observed that the settling time is 25 1.01 1.43 0.66 0.445
1.61sec, overshoot is 4.44% and steady state error is
negligibly small (zero). Table V. Closed loop performance by varying Ki
5
realization; hence it requires less chip area. The controller is
integrated with DC motor plant in Virtuoso Analog Design
Environment (ADE) of Cadence and its response is observed
by varying Kp, Ki and Kd independently. The response of the
compensated system is found to have an overshoot of 4.44%
(less than 5%), settling time of 1.61 sec (less than 2 sec) and
zero steady state error and thus is in good agreement with
specification.
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