Introduction To IC Fabrication Techniques-1
Introduction To IC Fabrication Techniques-1
Electrical and Computer Engineering Department CET, Adigrat University, By: Brhane F.
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Chapter-7 Class Notes of Applied Electronics II
Giant scale integration(GSI) The technology was developed by integrating the number of
transistors of above 10 Millions on a single chip. Examples, Embedded system and system on chip.
7.2. The Production Cycle
Placing over 1 million transistors on a piece of silicon the size of a fingertip is intricate work. The
current precision is less than one micron, with one-tenth of a micron now being used. A micron is
only about one-hundredth the diameter of a human hair. The fabrication process is applied to thin
wafers of silicon. There are eight basic steps. Some of these steps are repeated many times making
the total number of steps one hundred or more. The entire process usually takes from 10 to 30 days.
The eight basic steps are:
• Deposition (forming an insulating layer of SiO2 on the silicon wafer)
• Photolithography (light-sensitive layer exposed through a patterned photo-mask)
• Etching (removal of patterned areas using plasma gas or chemicals)
• Doping (placing donor and acceptor impurities into the wafer by diffusion or by using ion
implantation)
• Metallization (formation of interconnects and connection pads by depositing metal)
• Passivation (application of a protective layer)
• Testing (probes check each circuit for proper electrical function)
• Packaging (wafers are separated into chips, the chips are mounted, bonded/ wired, and the
packages are sealed)
Diffusion Method: The Diffusion process begins with the highly polished silicon wafer being placed
in an oven. The oven contains a concentration impurity made up of impurity atoms which yield the
Electrical and Computer Engineering Department CET, Adigrat University, By: Brhane F.
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Chapter-7 Class Notes of Applied Electronics II
desired electrical characteristics. The concentration of impurity atoms is diffused into the wafer and is
controlled by controlling the temperature of the oven and the time that the silicon wafer is allowed to
remain in the oven. This is called Doping. When the wafer has been uniformly doped, the fabrication
of semiconductor devices may begin. Several hundred circuits are produced simultaneously on the
wafer.
Epitaxial Method: The Epitaxial process involves depositing a very thin layer of silicon to form a
uniformly doped crystalline region (epitaxial layer) on the substrate. Components are produced by
diffusing appropriate materials into the epitaxial layer in the same way as the planar-diffusion
method. When planar-diffusion and epitaxial techniques are combined, the component characteristics
are improved because of the uniformity of doping in the epitaxial layer.
Isolation: Because of the closeness of components in ICs, Isolation from each other becomes a very
important factor. Isolation is the prevention of unwanted interaction or leakage between components.
This leakage could cause improper operation of a circuit. Techniques are being developed to improve
isolation.
The most prominent is the use of silicon oxide, which is an excellent insulator. Some manufacturers
are experimenting with single-crystal silicon grown on an insulating substrate. Other processes are
also used which are far too complex to go into here. With progress in isolation techniques, the
reliability and efficiency of ICs will increase rapidly.
Electrical and Computer Engineering Department CET, Adigrat University, By: Brhane F.
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Chapter-7 Class Notes of Applied Electronics II
it has been deposited. In addition, because evaporation beams travel in straight lines, very precise
patterns may be produced.
Cathode-Sputtering: This process is also performed in a vacuum. A potential of 2 to 5 kilovolts is
applied between the anode and cathode (source material). This produces a Glow Discharge in the
space between the electrodes. The rate at which atoms are sputtered off the source material depends
on the number of ions that strike it and the number of atoms ejected for each ion bombardment. The
ejected atoms are deposited uniformly over all objects within the chamber. When the sputtering cycle
is completed, the vacuum in the chamber is released and the wafers are removed.
Finely polished glass, glazed ceramic, and oxidized silicon have been used as substrate materials for
thin films. A number of materials, including nichrome, a compound of silicon oxide and chromium
cermets, tantalum, and titanium, have been used for thin-film resistors. Nichrome is the most widely
used.
The process for producing thin-film capacitors involves deposition of a bottom electrode, a dielectric,
and finally a top electrode. The most commonly used dielectric materials are silicon monoxide and
silicon dioxide.
Thick films: are produced by screening patterns of conducting and insulating materials on ceramic
substrates. A thick film is a film of material with a thickness that is at least 10 times greater than the
mean free path of an electron in that material, or approximately 0.001 centimeter. The technique is
used to produce only passive elements, such as resistors and capacitors.
Procedure: One procedure used in fabricating a thick film is to produce a series of stencils called
SCREENS. The screens are placed on the substrate and appropriate conducting or insulating
materials are wiped across the screen. Once the conducting or insulating material has been applied,
the screens are removed and the formulations are fired at temperatures above 600 degrees Celsius.
This process forms alloys that are permanently bonded to the insulating substrate. To a limited extent,
the characteristics of the film can be controlled by the firing temperature and length of firing time.
Resistors: Thick-film resistance values can be held to a tolerance of ±10 percent. Closer tolerances
are obtained by trimming each resistor after fabrication. Hundreds of different cermet formulations
are used to produce a wide range of component parameters. For example, the material used for a 10-
ohm-per-square resistor is quite different from that used for a 100-kilohm-per-square resistor.
Capacitors & Resistor-Capacitor Networks.—Capacitors are formed by a sequence of screenings
and firings. Capacitors in this case consist of a bottom plate, intra-connections, a dielectric, and a top
Electrical and Computer Engineering Department CET, Adigrat University, By: Brhane F.
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Chapter-7 Class Notes of Applied Electronics II
plate. For resistor-capacitor networks, the next step would be to deposit the resistor material through
the screen. The final step is screening and firing of a glass enclosure to seal the unit
Electrical and Computer Engineering Department CET, Adigrat University, By: Brhane F.
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