SN54AHC08, SN74AHC08

QUADRUPLE 2-INPUT POSITIVE-AND GATES

SCLS236H – OCTOBER 1995 – REVISED JULY 2003

D Operating Range 2-V to 5.5-V VCC D ESD Protection Exceeds JESD 22

D Latch-Up Performance Exceeds 250 mA Per – 2000-V Human-Body Model (A114-A)
JESD 17 – 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)

SN54AHC08 . . . J OR W PACKAGE SN74AHC08 . . . RGY PACKAGE SN54AHC08 . . . FK PACKAGE

SN74AHC08 . . . D, DB, DGV, N, NS, (TOP VIEW) (TOP VIEW)
OR PW PACKAGE

VCC
NC
VCC

1B
1A

4B
(TOP VIEW)

1A
1A 1 14 VCC 1 14 3 2 1 20 19
1Y 4 18 4A
1B 2 13 4B 1B 2 13 4B
NC 5 17 NC
1Y 3 12 4A 1Y 3 12 4A
2A 6 16 4Y
2A 4 11 4Y 2A 4 11 4Y
NC 7 15 NC
2B 5 10 3B 2B 5 10 3B
2B 8 14 3B
2Y 6 9 3A 2Y 6 9 3A 9 10 11 12 13
GND 7 8 3Y 7 8

2Y

3Y
3A
NC
GND
3Y
GND
NC – No internal connection

description/ordering information
The ’AHC08 devices are quadruple 2-input positive-AND gates. These devices perform the Boolean function
Y + A • B or Y + A ) B in positive logic.
ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE†
PART NUMBER MARKING
QFN – RGY Tape and reel SN74AHC08RGYR HA08
PDIP – N Tube SN74AHC08N SN74AHC08N
Tube SN74AHC08D
SOIC – D AHC08
Tape and reel SN74AHC08DR
–40°C to 85°C SOP – NS Tape and reel SN74AHC08NSR AHC08
SSOP – DB Tape and reel SN74AHC08DBR HA08
Tube SN74AHC08PW
TSSOP – PW HA08
Tape and reel SN74AHC08PWR
TVSOP – DGV Tape and reel SN74AHC08DGVR HA08
CDIP – J Tube SNJ54AHC08J SNJ54AHC08J
–55°C to 125°C CFP – W Tube SNJ54AHC08W SNJ54AHC08W
LCCC – FK Tube SNJ54AHC08FK SNJ54AHC08FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright  2003, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are tested
standard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, production
testing of all parameters. processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

SN54AHC08, SN74AHC08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
SCLS236H – OCTOBER 1995 – REVISED JULY 2003

FUNCTION TABLE
(each gate)
INPUTS OUTPUT
A B Y
H H H
L X L
X L L

logic diagram, each gate (positive logic)

A
Y
B

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
(see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
(see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
(see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 SN54AHC08, SN74AHC08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
SCLS236H – OCTOBER 1995 – REVISED JULY 2003

recommended operating conditions (see Note 4)

SN54AHC08 SN74AHC08
UNIT
MIN MAX MIN MAX
VCC Supply voltage 2 5.5 2 5.5 V
VCC = 2 V 1.5 1.5
VIH High-level input voltage VCC = 3 V 2.1 2.1 V
VCC = 5.5 V 3.85 3.85
VCC = 2 V 0.5 0.5
VIL Low-level input voltage VCC = 3 V 0.9 0.9 V
VCC = 5.5 V 1.65 1.65
VI Input voltage 0 5.5 0 5.5 V
VO Output voltage 0 VCC 0 VCC V
VCC = 2 V –50 –50 mA
IOH High-level output current VCC = 3.3 V ± 0.3 V –4 –4
mA
VCC = 5 V ± 0.5 V –8 –8
VCC = 2 V 50 50 mA
IOL Low-level output current VCC = 3.3 V ± 0.3 V 4 4
mA
VCC = 5 V ± 0.5 V 8 8
VCC = 3.3 V ± 0.3 V 100 100
∆t/∆v Input transition rise or fall rate ns/V
VCC = 5 V ± 0.5 V 20 20
TA Operating free-air temperature –55 125 –40 85 °C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)
TA = 25°C SN54AHC08 SN74AHC08
PARAMETER TEST CONDITIONS VCC UNIT
MIN TYP MAX MIN MAX MIN MAX
2V 1.9 2 1.9 1.9
IOH = –50 mA 3V 2.9 3 2.9 2.9
VOH 4.5 V 4.4 4.5 4.4 4.4 V
IOH = –4 mA 3V 2.58 2.48 2.48
IOH = –8 mA 4.5 V 3.94 3.8 3.8
2V 0.1 0.1 0.1
IOL = 50 mA 3V 0.1 0.1 0.1
VOL 4.5 V 0.1 0.1 0.1 V
IOL = 4 mA 3V 0.36 0.5 0.44
IOL = 8 mA 4.5 V 0.36 0.5 0.44
II VI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1 mA
ICC VI = VCC or GND, IO = 0 5.5 V 2 20 20 mA
Ci VI = VCC or GND 5V 4 10 10 pF
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

SN54AHC08, SN74AHC08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
SCLS236H – OCTOBER 1995 – REVISED JULY 2003

switching characteristics over recommended operating free-air temperature range,

VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
FROM TO LOAD TA = 25°C SN54AHC08 SN74AHC08
PARAMETER UNIT
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
tPLH 6.2* 8.8* 1* 10.5* 1 10.5
A or B Y CL = 15 pF ns
tPHL 6.2* 8.8* 1* 10.5* 1 10.5
tPLH 8.7 12.3 1 14 1 14
A or B Y CL = 50 pF ns
tPHL 8.7 12.3 1 14 1 14
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.

switching characteristics over recommended operating free-air temperature range,

VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
FROM TO LOAD TA = 25°C SN54AHC08 SN74AHC08
PARAMETER UNIT
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
tPLH 4.3* 5.9* 1* 7* 1 7
A or B Y CL = 15 pF ns
tPHL 4.3* 5.9* 1* 7* 1 7
tPLH 5.8 7.9 1 9 1 9
A or B Y CL = 50 pF ns
tPHL 5.8 7.9 1 9 1 9
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.

noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 5)

SN74AHC08
PARAMETER UNIT
MIN MAX
VOL(P) Quiet output, maximum dynamic VOL 0.8 V
VOL(V) Quiet output, minimum dynamic VOL –0.8 V
VOH(V) Quiet output, minimum dynamic VOH 4.4 V
VIH(D) High-level dynamic input voltage 3.5 V
VIL(D) Low-level dynamic input voltage 1.5 V
NOTE 5: Characteristics are for surface-mount packages only.

operating characteristics, VCC = 5 V, TA = 25°C

PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load, f = 1 MHz 18 pF

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 SN54AHC08, SN74AHC08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
SCLS236H – OCTOBER 1995 – REVISED JULY 2003

PARAMETER MEASUREMENT INFORMATION

VCC
RL = 1 kΩ S1 Open
From Output Test From Output TEST S1
Under Test Point Under Test GND tPLH/tPHL Open
CL CL tPLZ/tPZL VCC
(see Note A) (see Note A) tPHZ/tPZH GND
Open Drain VCC

LOAD CIRCUIT FOR LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS 3-STATE AND OPEN-DRAIN OUTPUTS

VCC
Timing Input 50% VCC
tw 0V
th
VCC tsu
VCC
Input 50% VCC 50% VCC
Data Input 50% VCC 50% VCC
0V 0V
VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS
PULSE DURATION SETUP AND HOLD TIMES

VCC VCC
Output
Input 50% VCC 50% VCC 50% VCC 50% VCC
Control
0V 0V

tPLH tPHL tPZL tPLZ

Output
VOH Waveform 1 ≈VCC
In-Phase 50% VCC 50% VCC 50% VCC
Output S1 at VCC VOL + 0.3 V
VOL (see Note B) VOL
tPHL tPLH tPZH tPHZ
Output
VOH VOH
Out-of-Phase Waveform 2
50% VCC 50% VCC 50% VCC VOH – 0.3 V
Output S1 at GND
VOL (see Note B) ≈0 V
VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES
INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

 PACKAGE OPTION ADDENDUM
www.ti.com 2-Nov-2006

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
5962-9682001Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SN74AHC08D ACTIVE SOIC D 14 50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI
SN74AHC08DBR ACTIVE SSOP DB 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DE4 ACTIVE SOIC D 14 50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DG4 ACTIVE SOIC D 14 50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DR ACTIVE SOIC D 14 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08N ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
SN74AHC08NE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
SN74AHC08NSR ACTIVE SO NS 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08NSRE4 ACTIVE SO NS 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08PW ACTIVE TSSOP PW 14 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08PWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
SN74AHC08PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC08RGYR ACTIVE QFN RGY 14 1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
SN74AHC08RGYRG4 ACTIVE QFN RGY 14 1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)

Addendum-Page 1
 PACKAGE OPTION ADDENDUM
www.ti.com 2-Nov-2006

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
SNJ54AHC08FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 2
 MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

NO. OF A B
18 17 16 15 14 13 12
TERMINALS
** MIN MAX MIN MAX

0.342 0.358 0.307 0.358

19 11 20
(8,69) (9,09) (7,80) (9,09)
20 10 0.442 0.458 0.406 0.458
28
(11,23) (11,63) (10,31) (11,63)
21 9
B SQ 0.640 0.660 0.495 0.560
22 8 44
(16,26) (16,76) (12,58) (14,22)
A SQ
23 7 0.739 0.761 0.495 0.560
52
(18,78) (19,32) (12,58) (14,22)
24 6
0.938 0.962 0.850 0.858
68
(23,83) (24,43) (21,6) (21,8)
25 5
1.141 1.165 1.047 1.063
84
(28,99) (29,59) (26,6) (27,0)
26 27 28 1 2 3 4

0.020 (0,51) 0.080 (2,03)

0.010 (0,25) 0.064 (1,63)

0.020 (0,51)
0.010 (0,25)

0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)

0.028 (0,71) 0.045 (1,14)

0.022 (0,54) 0.035 (0,89)
0.050 (1,27)

4040140 / D 10/96

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 MECHANICAL DATA

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000

DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE

24 PINS SHOWN

0,23
0,40 0,07 M
0,13
24 13

0,16 NOM
4,50 6,60
4,30 6,20

Gage Plane

0,25

0°–
8°
0,75
1 12
0,50
A

Seating Plane

0,15
1,20 MAX 0,08
0,05

PINS **
14 16 20 24 38 48 56
DIM

A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40

A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20

4073251/E 08/00

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,38
0,65 0,15 M
0,22
28 15

0,25
0,09
5,60 8,20
5,00 7,40

Gage Plane

1 14 0,25

A 0°–ā8° 0,95
0,55

Seating Plane

2,00 MAX 0,05 MIN 0,10

PINS **
14 16 20 24 28 30 38
DIM

A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90

A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30

4040065 /E 12/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30
0,65 0,10 M
0,19
14 8

0,15 NOM
4,50 6,60
4,30 6,20

Gage Plane

0,25
1 7
0°– 8°
A 0,75
0,50

Seating Plane

1,20 MAX 0,15 0,10

0,05

PINS **
8 14 16 20 24 28
DIM

A MAX 3,10 5,10 5,10 6,60 7,90 9,80

A MIN 2,90 4,90 4,90 6,40 7,70 9,60

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
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Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
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