EET 303 MICROPROCESSORS AND EMBEDDED SYSTEMS

MODULE-2

Syllabus
 2.1 8085 PROGRAMMING

(Refer class notes for programming)

2.2 THE STACK

The stack is an area of memory identified by the programmer for temporary storage of
information.
• The stack is a LIFO structure.
– Last In First Out.
• The stack normally grows backwards into memory.
– In other words, the programmer defines the bottom of the stack and the stack grows up into
reducing address range.

In the 8085, the stack is defined by setting the SP (Stack Pointer) register.
• LXI SP, FFFFH
• This sets the Stack Pointer to location FFFFH (end of memory for the 8085).
• The Size of the stack is limited only by the available memory

Saving data on the Stack

– Information is saved on the stack by PUSHing it on.
– It is retrieved from the stack by POPing it off.
• The 8085 provides two instructions: PUSH and POP for storing information on the stack and
retrieving it back.
– Both PUSH and POP work with register pairs ONLY.

The PUSH Instruction

PUSH B (1 Byte Instruction)

– Decrement SP
– Copy the contents of register B to the memory location pointed to by SP
– Decrement SP
– Copy the contents of register C to the memory location pointed to by SP
The POP Instruction

POP D (1 Byte Instruction)

– Copy the contents of the memory location pointed to by the SP to register E
– Increment SP
– Copy the contents of the memory location pointed to by the SP to register D
– Increment SP

PUSH PSW Register Pair

What is PSW (Program Status Word) ?
– This register pair is made up of the Accumulator and the Flags registers.

PUSH PSW (1 Byte Instruction)

– Decrement SP
– Copy the contents of register A to the memory location pointed to by SP
– Decrement SP
– Copy the contents of Flag register to the memory location pointed to by SP

POP PSW (1 Byte Instruction)

– Copy the contents of the memory location pointed to by the SP to Flag register
– Increment SP
– Copy the contents of the memory location pointed to by the SP to register A
– Increment SP
 2.3 SUBROUTINE

A subroutine is a group of instructions (subprogram) that will be used repeatedly in different

locations of the program.
– Rather than repeat the same instructions several times, they can be grouped into a subroutine
that is called from the different locations.
– In Assembly language, a subroutine can exist anywhere in the code.
– However, it is customary to place subroutines separately from the main program.

The 8085 has two instructions for dealing with subroutines.

– The CALL instruction is used to redirect program execution to the subroutine.
– The RET instruction is used to return the execution to the calling routine.

The CALL Instruction

CALL 4000H (3 byte instruction)

– When CALL instruction is fetched, the Microprocessor knows that the next two Memory
locations contain 16bit subroutine address in the memory.

Microprocessor reads the subroutine address from the next two memory location and stores the
higher order 8bit of the address in the W register and stores the lower order 8bit of the address in
the Z register
– Pushes the current value of Program Counter onto the stack [Return address]
– Loads the program counter with the 16-bit address supplied with the CALL instruction from WZ
register.

RET (1 byte instruction)

– Retrieve the return address from the top of the stack
– Load the program counter with the return address.

Conditional CALL and RTE Instructions:

In 8085 Instruction set, depending upon one of the flag bit values (excluding AC flag bit), the
conditional call instructions will branch to a subroutine. The branch takes place based on the
value of Cy flag, Z flag, P flag, or S flag. There is no call instruction based on the value of
AC(Auxiliary Carry) flag bit
Examples:
– CC, call subroutine if Carry flag is set.
– CNC, call subroutine if Carry flag is not set
In 8085 Instruction set, depending upon one of the flag bit values (excluding AC flag bit), the
conditional return instructions will branch the control to the next instruction of the call statement
by popping out two return address Bytes (High-Byte and Low-Byte) from the top of the stack. The
branch takes place based on the value of Cy flag, Z flag, P flag, or S flag. There is no conditional
return instruction based on the value of AC (Auxiliary Carry) flag bit.
Examples:
– RC, return from subroutine if Carry flag is set
– RNC, return from subroutine if Carry flag is not set. Etc

2.4 DELAY ROUTINE

➢ Delay routines are subroutines used for maintaining the timings of various operations in
microprocessor.
➢ In control applications, certain equipment needs to be ON/OFF after a specified time delay.
In some applications, a certain operation has to be repeated after a specified time interval.
In such cases, simple time delay routines can be used to maintain the timings of the
operations.

DELAY ROUTINE PROCESS

A delay routine is generally written as a subroutine (It need not be a subroutine always. It can be
even a part of main program). In delay routine a count (number) is loaded in a register of
microprocessor. Then it is decremented by one and the zero flag is checked to verify whether the
content of register is zero or not. This process is continued until the content of register is zero.
When it is zero, the time delay is over and the control is transferred to main program to carry out
the desired operation.

The Delay:

➢ The delay time is given by the total time taken to execute the delay routine.
➢ It can be computed by multiplying the total number of T-states required to execute
subroutine and the time for one T-state of the processor.
➢ The total number of T-states can be computed from the knowledge of T-states required for
each instruction.
➢ The time for one T-state of the processor is given by the inverse of the system clock
frequency of the processor.

For example, if the 8085 microprocessor has system clock frequency = 2.5 MHz

Then, time for one T-state= 1 / 2.5 x 106 = 0.4µsec

Delay Routine Using 8-bit register as counter

Write a delay routine to produce a time delay of 0.5 mS in 8085 processor-based system whose
clock frequency is 3 MHz.

Solution

The delay required is 0.5 mS, hence an 8-bit register of 8085 can be used to store a Count value
and then decrement to zero. The delay routine is written as a subroutine as shown below.

Delay routine
MVI D, N ; Load the count value, N in D-register.
Loop: DCR D ; Decrement the count.
JNZ Loop ; if count not equal to 0 , go to loop
RET ; Return to main program.
The following table shows the T-state required for execution of the instructions in the subroutine.
T-State required for
Number of times the
Instruction execution of an Total T-States
instruction is executed
instruction

MVI D, N 7 1 7x1=7

LOOP: DCR D 4 N times 4 x N = 4N

JNZ LOOP 10 (or) (N-1) times 10 x (N-1) = 10N - 10

7 1 7x1=7

RET 10 1 10 x 1 = 10

TOTAL T-STATES FOR DELAY SUBROUTINE 14N + 14

Calculation to find the count value, N:

Time period for 1 T-State = 1 / system clock frequency
= 1 / 3x106
= 0.333µS
No. of T-states required
for delay of 0.5mS = Required time delay / Time for one T-state
= 0.5mS / 0.333µS
= 1500.10
≈ 1500 = 150010

From above table, we know that;

14N + 14 = 1500
N = (1500 – 14) / 14 = 106.14210 ≈ 10610 = 6AH

Therefore by replacing the count value, N by 6AH in the above program , a delay of 0.5mSec can
be produced.
Delay Routine Using 16-bit register as counter
Example

Write a delay routine to produce a time delay of 0.5 mS in 8085 processor-based system whose
clock frequency is 3 MHz using 16-bit register as counter.

Solution

. The delay routine is written as a subroutine as shown below.

Delay routine
LXIB, N ; Load the count value, N in BC pair register.
Loop: DCX B ; Decrement the count.
MOV A,B ; Place contents of B in A
ORA C ; OR B with C to set Zero flag
JNZ Loop ; if result not equal to 0 , go to loop
RET ; Return to main program.
The following table shows the T-state required for execution of the instructions in the subroutine.
T-State required for
Number of times the
Instruction execution of an Total T-States
instruction is executed
instruction

LXI B, N 10 1 10 x 1 = 10

LOOP: DCX B 6 N times 6 x N = 6N

MOV A, B 4 N times 4 x N = 4N

ORA C 4 N times 4 x N = 4N

JNZ LOOP 10 (or) (N-1) times 10 x (N-1) = 10N - 10

7 1 7x1=7

RET 10 1 10 x 1 = 10

TOTAL T-STATES FOR DELAY SUBROUTINE 24N + 17

Calculation to find the count value, N:

Time period for 1 T-State = 1 / system clock frequency

= 1 / 3x106
= 0.333µS
No. of T-states required
for delay of 0.5mS = Required time delay / Time for one T-state
= 0.5mS / 0.333µS
= 1500.10
≈ 1500 = 150010
 From above table, we know that;

24N + 17 = 1500
N = (1500 – 17) / 24 = 61.7910 ≈ 6210 = 3EH

Therefore by replacing the count value, N by 3EH in the above program , a delay of 0.5mSec can
be produced.

Delay Routine Using Nested Loop

Write a delay routine to produce a time delay of 1 mS in 8085 processor-based system whose clock
frequency is 3 MHz using nested loop.

Solution

The delay routine is written as a subroutine as shown below.

Delay routine
MVI B, P ; Load the count value, P in B-register.
LOOP2: MVI C, Q ; Load the count value, Q in B-register.
LOOP1: DCR C ; Decrement the count P.
JNZ LOOP1 ; if count in C not equal to 0 , go to loop LOOP1
DCR B ; Decrement the count Q.
JNZ LOOP2 ; if count in B not equal to 0 , go to loop LOOP2
RET ; Return to main program.
The following table shows the T-state required for execution of the instructions in the subroutine.
T-State required for Number of times the
Instruction execution of an instruction is Total T-States
instruction executed

MVI B, P 7 1 7x1=7

LOOP2: MVI C, Q 7 P times 7 x P = 7P

LOOP1: DCR C 4 (Q x P) times 4 x Q x P = 4QP

JNZ LOOP1 10 (or) (Q-1) x P times 10 x (Q-1) x P = 10QP – 10P

7 P times 7 x P = 7P

DCR C 4 P times 4 x P = 4P

JNZ LOOP2 10 (P-1) times 10 x (P-1) = 10P - 10

7 1 7

RET 10 1 10

TOTAL T-STATES FOR DELAY SUBROUTINE 14QP + 18P + 14

Calculation to find the count value, N:

Time period for 1 T-State = 1 / system clock frequency

= 1 / 3x106

= 0.333µS

No. of T-states required

for delay of 1 mS = Required time delay / Time for one T-state

= 1 mS / 0.333µS

= 3003

= 300310

From above table, we know that;

14QP + 18P + 14 = 3003

Now let P = 02, then

28Q + 50 = 3003

Hence Q = (3003 – 50) / 28 = 105.4610 ≈ 10510 = 69H

Therefore by replacing the count value, P by 02H and Q by 69H in the above program , a delay of
1mSec can be produced.