e-ISSN: 2582-5208

International Research Journal of Modernization in Engineering Technology and Science

Volume:03/Issue:05/May-2021 Impact Factor- 5.354 www.irjmets.com

FPGA SEVEN-SEGMENT-DISPLAY BY USING ALTERA DE2-115 BOARD WITH

PRACTICE AND IMPLEMENTATION
Waqas Saeed*1, Prof Luca Valcarenghi*2
*1Student, Department Of Informatics And Networking, University Of Scuola Superiore Sant’Anna,
Pisa, Tuscany, Italy.
*2Prof., Department Of Informatics And Networking, University Of Scuola Superiore Sant’Anna, Pisa,
Tuscany, Italy.
ABSTRACT
This paper presents a simple implementation of Seven-Segment Displays in very simple way by using “Altera
DE2-115 Board” to understand for those students who are not in the field of Electrical and computer science
field. Seven-Segment Displays are used to display input data on “Altera DE2-115 Board” FPGA Device. The
FPGA Device “Altera DE2-115 Board” is very useful in the field of studies. Student have done their projects by
using “Altera Board” and connect it to their computer and get solution by using switches as input binary
numbers and get output in hexadecimal by using Seven-Segment Displays etc. “Altera Board” is now
successful electronic devices in market. “Altera DE2-115 Board” is significant device for different kinds of
applications. The main focused of this paper is to implement and practice Seven-Segment Displays by using
Verilog file in which we must write code in C++ inside the Verilog file and execution simulations on
innumerable counter designs and implement designs on FPGA device utilizing Seven-Segment Displays and
Switches. The control consumption and the delay of unit is predictable using the synthesizer “Quartus Prime”
and get simulation result by using “ModelSim”.
Keywords: Quartus Prime Software, Modelsim, Seven Segment Display, Altera DE2-115 Board.
I. INTRODUCTION
Altera DE2 series boards have constantly been used for educational development. Features of Altera DE2-70
device responding to increased adaptable low-cost spectrum needs driven by the demand for mobile video,
voice, data access, and the hunger for high-quality images but the new technology “Altera DE2-115”Cyclone®
IV series boards offer an optimal balance of low cost, low power consumption and a rich source of logical
function, memory storage and DSP capabilities as compare to Altera DE2-70 series board.
Field Programmable Gate Array (FPGA) device that’s mostly used for educational development in the field of
electrical and computer science. In this paper Seven-Segment Displays is used to display Decimal Number by
using HEX [1] and HEX [0] the values is set by using switches SW [7-4] and SW [3-0]. The values are
symbolized by SW [7-4] and SW [3-0] to be displayed on HEX [1] and HEX [0], respectively. Circuit will be able
to display the Decimal digits from (0 to 9). Each Verilog file description covers two blocks. These are
input/output and architectural components. The input/output description specifies the input and output
connections will be display on hardware “Altera DE2-115 Series Board”.
1. SEVEN SEGMENT DISPLAYS:
To display implementation Seven-Segment Displays is the superlative approach. To perform any kind of
implementation on Seven-Segment Displays unit requires very less wire, low-cost and simply available in the
market [2].In this paper component the Seven-Segment Displays unit is performed using the FPGA device
which efficiently utilizes low-power for the implementation with lowest latency [1].The Seven-Segment
Displays unit name define as A, B, C, D, E, F and G as exposed in Figure.1. In this paper we will study how
parallel combinations of “1” and “0” can display hexadecimal numbers. In this implementation Hexadecimal
numbers from (0 to 9) are display by using Seven-Segment Displays. Each segment is controlled by a single bit
and combinations of segments turned ON or OFF can display all the numbers from (0 to 9) and a few characters,
such A, B, C, D, E, F and G as shown in Figure.1.

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Figure: 1 Seven-Segment Displays Unit.

2. BLOCK DIAGRAM OF ALTERADE2-115 CYCLONE IV:
In this diagram we specify the functionality of Alter DE2-115 board to provide maximum flexibility for the user
and details about all connections are made through the Cyclone IV “Alter DE2-115 series board” FPGA device as
shown in Figure.2. [3].

.
Figure: 2 Block Diagram
2.1 Board Diagram:

Figure: 3 FPGA Device Diagram.

The focus of this paper is to study how to connect input/output to FPGA devices. We will use switches SW [7-4]
and SW [3-0] to as input and HEX [1], HEX [0](LCD) to as output by using Verilog file on Alter DE2-115 board
as shown in figure 3.

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Equipment Required:
1. Altera Quartus Prime software.
2. ModelSim
3. Altera DE2-115 board Development kit with 7.5-V DC power supply and USB cable.
4. USB Blaster Driver.
II. IMPLEMENTATION PROCESS METHODOLOGY
In this exercise we will use two Seven-Segment Display HEX [1] and HEX [0] as output and Eight switches
SW [7-4] and SW [3-0] as input. We will display decimal numbers from (0 to 9) on Altera DE2-115 Board by
using Seven-Segment Display as output as shown in Figure.3.
Open Quartus Prime Software Create a new project wizard as show infigure.4. The intent of this exercise is to
write code in Verilog file to originate the logical functions are required for Seven-Segment Display. These
Verilog files we will used to implementation on Alter DE2-115 board.

Figure: 4
Then click on “Next” buttonas shown in Figure.5.

Figure: 5
After this we will be on this page. click on option ”1” for select the directory of your project where you want to
save your project then click on “Next” button “2” as shown in Figure.6.

Figure: 6
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Select the cyclone family “Cyclone IV” and Device chip Number “EP4CE115F29C7”of your Alter DE2-115
Board as shown in Figure.7.

Figure: 7
Open “File” option and create a new “Verilog File” as shown in Figure.8.

Figure: 8
Create Verilog file with the name of “hexdigit” as shown in Figure.8 or any other name whatever you want to
write code manually in C++ for derive the logic functions required for the Seven-Segment Display from (0 - 9)
and specify each logic function as a Boolean expression as shown in Figure.9.

Figure: 9
Now Create another Verilog file with the name of “myproject” or any other name as you want and write main
calling function for the Verilog file “hexdigit” as show in Figure.9 for the display of Seven-Segment Display by

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International Research Journal of Modernization in Engineering Technology and Science
Volume:03/Issue:05/May-2021 Impact Factor- 5.354 www.irjmets.com
using HEX [1] and HEX [0] for display (0 - 9) decimal value by using Switches SW [7-4] and SW [3-0] as input
as shown in Figure.10.

Figure: 10
At the end clicks on “Start Compile” button from the upper menu bar as shown in Figure.11.

Figure: 11
When Compilation process done then open “Modelsim” Software and create new a project imports both files
that we already have done with the name of “hexdigit” and “myproject” in my case to display decimal numbers
from (0 to 9) to check the output of Seven-Segment Display as shown in Figure.12.

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Figure: 12
Now press the “Start Simulation” button from the upper menu bar options. Now enter input by using SW [3-0]
“0010” and by using SW [7-4] “0110” as shown in Figure.13.

Figure: 13
Now press the “Run” button from the upper menu bar options and you will see the output of SW [3-0], SW [7-4]
on HEX [0] and HEX [1]as shown in Figure.14.
III. RESULTS AND DISCUSSION
The purpose of this paper to learn how to use switches as input and get output by using HEX [0] and HEX [1]
LCDs on Altera DE2-115 Board FPGA Devices. TheFigure.14 had shown the output of Hex [0] and Hex [1].The
simulation result shows the output for the Seven-Segments Display unit which have been generated by using
“Modelsim” tool.

Figure: 14 Simulation result by using Modelsim of seven segments display.

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In Figure.13and Figure.14 shows that its take 4-bit input by using switches SW [7-4] and SW [3-0] for Seven-
Segments Display unit and the outputs are given as A, B, C, D, E, F and G which have been selected the
segments matching to the input data in the form of the Boolean expression. The Seven-Segment Displays unit
and their output corresponding segment are represented in their Boolean expression as shown in the Truth
Tabel.1. [4]. The information in the truth table have been provided “ON means 0” and “OFF means 1”. Truth
Tabel 1 below shows the numbers used in hexadecimal and their equivalent in binary to decimal conversion.
Truth Table of Binary to Hexadecimal Conversion:
Truth Table: 1 Truth Table of BCD input to Seven Segment Display

Output on Altera DE2-115:

We have used switches SW [7-4] and SW [3-0] as inputs for implement of circuit on “Altera DE2-115 board”
and use Seven-Segments Display HEX [0] and HEX [1] as output as show in Figure.15.

Figure.15. Output of binary sequence

IV. CONCLUSION
Result of this implementation to learn how to connect simple input and output by using for “Altera DE2-115
Board” FPGA device and get solution to the problems of digits binary used their equivalents in hexadecimal as
show in Figure.15. “Altera DE2-115 Board” is significant for many applications in market today, so to get
knowledge about implementation by using Verilog file practice on it as you want and performed simulations on
various counter designs and implement designs on “Altera DE2-115 Board” FPGA device utilizing switches,
LEDs, and seven-segment displays.
V. REFERENCES
[1] Wayne Wolf, FPGA-Based System Design, Prentice Hall, June 15, 2004
[2] Harold Thimble by, Reasons to Question Seven Segment Displays, CHI 2013, April 27–May 2, 2013,
Paris, France, Copyright2013 ACM 978-1-4503-1899-0/13/04.
[3] Abdurrahman A.A. Emhemed / International Journal of Engineering Research and Applications (IJERA)
ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 3, May-Jun 2012, pp.748-751
[4] IJISET - International Journal of Innovative Science, Engineering & Technology, Vol. 1 Issue 5, July
2014.

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