Scheme Samsung NP r519 Bonn L
Scheme Samsung NP r519 Bonn L
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
BONN-L
CPU :Intel Penryn
Chip Set :Intel Cantiga & ICH9M
C
Remarks : Montevina Platform C
Revision : 1.2
T.R. Date : 2009.06.03
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
10/10/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR MAIN
APPROVAL REV PART NO.
COVER
Owner : SEC Mobile R & D Signature : X H.J.KIM 1.2 BA41-
MODULE CODE LAST EDIT
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
GMCH-M SODIMM 0
Dual channel DDR II Power
LCD LCD
Cantiga-GM Channel B (Reverse)
DDR II PG 19 PG 47
DDR II 667/800 SODIMM 1
PG 26 GL40
CRT
1329 FCBGA
PG 27 CRT
PG 13-17
OPTION
ICH9-M USB 1 PG 37 Mini Card 1
USB 8 (WLAN)
PG 43 Camera
676 BGA
USB 4
SPI 2 IN 1 SD PG 36
HP PG 25 SPI ROM GENESIS
MMC PG 36
MIC-IN
LPC
PG 36
SATA 0
2P 2P PG 38 SATA HDD
PG 31 12P
SATA 1
PG 53 SATA ODD PG 40
Touch
Sub board MICOM PAD
Touchpad
LED
3.3V LPC, 33MHz
SPKR R
PG 38 MEC1308
TMKBC (TBD) KBD PG 40
PG 39 PG 40
SPKR L
A 80 Port
LED
A
DRAW DATE TITLE
PG 25 PG 41
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR MAIN
APPROVAL REV PART NO.
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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. BOARD INFORMATION
D SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D
PCI Devices
Crystal / Oscillator
Devices IDSEL# REQ/GNT# Interrupts
TYPE FREQUENCY DEVICE USAGE
Cardbus AD25 3 A,B,C
Crystal 32.768KHz ICH9-M Real Time Clock
Crystal 10MHz MICOM HD64F2169/2160
Crystal 14.318MHz CLOCK-Generator CK-505
g
USB AD29(internal) - USB2.0 #0 (USB0) : A Crystal 25MHz LAN RealTek 88E8057
USB2.0 #1 (USB1) : D
USB2.0 #2 (USB4) : C
USB2.0 #3 (USB5) : E
USB2.0 #4 (EHCI) : H
n
Hub to PCI AD30(internal) - -
LPC bridge/IDE/AC97/SMBUS AD31(internal) - B
l
Internal MAC AD24(internal) - E
u
AC Link - - B
GLAN - - F
LCD Pannel Detect (TBD)
s i a
C Devices Resolution PANNEL_DETECT_0 C
Voltage Rails
VDC
VCC_CORE
Primary DC system power supply (9 to 20V)
Core Voltage for CPU
m n t 2
I C / SMB Address
a e
P1.05V (VCCP) VTT for CPU, Crestline & ICH9-M Devices Address Hex Bus
P3.3V_MICOM 3.3V always power rail (for Micom)
P1.5V 1.5V switched power rail (off in S3-S5) ICH9-M Master - SMBUS Master
P1.8V 1.8V switched power rail (off in S3-S5) CPU Thermal Sensor 0111 101x 7Ah Thermal Sensor
P1.8V_AUX 1.8V power rail for DDR (off in S4-S5)
S fid
SODIMM0 1010 000x A0h -
P0.9V 0.9V power rail for DDR (off in S3-S5) SODIMM1 1010 010x A4h -
P3.3V 3.3V switched power rail (off in S3-S5) Thermal Sensor on SODIMM0 0011 000x 30h -
P3.3V_AUX 3.3V switched on power rail (off in S4-S5) Thermal Sensor on SODIMM1 0011 010x 34h -
P5.0V 5.0V switched power rail (off in S3-S5) CK-505M (Clock Generator) 1101 001x D2h Clock, Unused Clock Output Disable
P5.0V_AUX 5.0V switched on power rail (off in S4-S5)
P5.0V_ALW 5.0V always power rail
o n B
PORT #
0
1
2
3
4
5
6
7
8
9
ASSIGNED TO
SYSTEM PORT 0
SYSTEM PORT 1
SYSTEM PORT 2
NC
NC
Bluetooth
Mini PCI Express 2
Camera
NC
NC
PCI Express Assign
PORT #
0
1
2
3
4
5
ASSIGNED TO
NC
LOM
C
Mini Card 1 (WLAN)
NC
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR MAIN
APPROVAL REV PART NO.
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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. POWER DIAGRAM Rev 0.1
D KBC3_SUSPWR KBC3_PWRON D
(CHP3_S4_STATE*) (CHP3_SLPS3*) KBC3_VRON
P1.5V_AUX
VDC
g
Battery DC
ICH9-M
PEG
P1.5V_AUX P1.8V
n
SODIMM (DDR III) GDDR-3 for PEG
Cantiga
u l
DDR III-Termination DDR II-Termination
P0.9V P0.9V
a
OPTION FOR ME
s i
C C
It should be updated ICH8-M PCMCIA HDD
t
FDD USB M_PCI
P3.3V_MICOM P5.0V CRT HEATSINK FAN CIRCUIT
P5V_AUX MICOM MDC AUX DISPLAY
PEG
m
MICOM
n IGFX_CORE CRESTLINE
a
S fid
P3.3V_ALW
e P3.3V_AUX
ICH8-M LAN
MDC
P1.5V
EGFX_CORE
CRESTLINE
ICH8-M
nVidia (TBD)
n
BT CRESTLINE Thermal Sensor MICOM
ICH8-M SODIMM
B P5.0V_ALW P3.3V SPI PCMCIA M_PCI B
PEG LEDs
o
MDC LCD
CRESTLINE
ICH8-M
P1.25V
C
P12.0V_ALW P1.2V_LAN
LAN
PEG
P1.8V_LAN
P1.2V
P2.5V_LAN
Power On/Off Table by S-state
LAN
Rail
S0 S3 S4 S5
State
+V*A(LWS) S5-S4 S3 S0
ON ON ON ON
+V*LAN
A +1.8V_AUX A
ON ON
+0.9V
DRAW DATE TITLE
+V*AUX ON ON
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR MAIN
+V ON
APPROVAL REV PART NO.
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Adapter Battery
3.3V_AUX ( TBD A )
MICOM 3V ( TBD A )
1.8V ( TBD A )
g
1.05V
0.1 A (TBD) ITP
n
1.05V ( TBD A ) 4.5 A (TBD) 0.75 A (TBD) Sensor 0.08 A (TBD)
1.5V ( 35 W )
1.5V ( TBD A ) 0.13 A (TBD)
l
1.25V ( TBD A )
3.3V ( TBD A ) MICOM 3V
PWR LED
u
0.1 A (TBD)
5.0V ( TBD A ) 1.05V (MCH CORE)
1.8V_AUX ( TBD A ) 7.7 A (TBD)
a
1.05V (VCCP)
0.9V( TBD A ) 4.48 A (TBD) Cantiga
1.5V 1.8V
s i
C 0.125 A (TBD) 3.3V C
1.25V GMCH 0.25 A (TBD) CLOCK 3.3V
VGA CORE (TBD A)
2.43A (TBD)
VDC INV ( TBD A )
3.3V
0.33 A (TBD)
t
PEX IO (TBD A)
3.3V KeyBoard
0.2 A (TBD) 3.3V_AUX
LAN
m
0.6 A (TBD)
n
1.05V
1.13 A (TBD)
1.5V
3.3V 2.4A (TBD) ICH9-M 3.3V
0.01 A (TBD) KBD LED
a
0.374 A (TBD) 3.3V_AUX
e
3.3V_AUX 0.1 A (TBD) SD Card
0.209 A (TBD)
5V
5V_AUX 0.001 A (TBD)
RTC_Battery
0.001 A (TBD) ( ~ 2.0 W ) 3.3V 0.015 A (TBD) SPI 3.3V
0.006 A (TBD)
S fid
5V
n
3.3V
0.67 A (TBD)
3.3V_AUX
B
1.8V_AUX
0.5 A (TBD) MDC B
3.1 A (TBD) DDR-2 5V
o
0.9V 1 A (TBD) (Dual slots) 0.22 A (TBD) SATA HDD
( ~ 5.0 W )
1.8V GDDR 5V FAN
3.1 A (TBD) 0.16 A (TBD)
P3.3V_AUX
P1.2V_LAN
P1.8V/2.5V_LAN
0.08 A (TBD)
0.29 A (TBD)
0.15 A (TBD)
LAN (RTL103EL)
3.3V (LCD 3V)
19V (VDC INV)
C 0.67 A (TBD)
0.5 A (TBD)
LCD 5V
5V
5V
1.5 A (TBD)
2 A (TBD)
0.2 A (TBD)
Audio AMP
USB (x 3)
Touch Pad
A A
DRAW DATE TITLE
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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL Host Boot / ME Off
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY. (SLPS4* = S4_STATE*) > (SLPM* = SLPS3*)
RTC PRTC_BAT
1 POWER SEQUENCE
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS Rev. 0.7
EXCEPT AS AUTHORIZED BY SAMSUNG.
M-1) KBC3_DDR_PWRON (TBD) = 8) KBC3_SUSPWR Battery CHP3_RTCRST#
6) P3.3V_AUX
M-2) KBC3_ME_PWRON = 15) KBC3_PWRON
Host / ME Boot
(SLPS4* = S4_STATE*) > SLPM* > SLPS3*
15) VRM3_CPU_PWRGD
D
PRTC PRTC
16 15 D
Host S5 / ME Boot
POWER 8
(SLPS4* = SLPM*) > S4_STATE* > SLPS3*
10-1) ICH_CORE (P1.05V) 16) CLK3_PWRGD CK-505 16-1) Clock Running
LAN100_SLP
INTVRMEN
Sheet 8
S/W 8) CHP3_SLPS5#/4#/3#
7 7) KBC3_RSMRST# 7) P1.05V_AUX
7) P1.5V_AUX 12)GCORE3_PWRGD (PM-model) CPU
4 VRM
4) POWER_SW*
g
VRMPWRGD
DC/DC B’d
17) KBC3_PWRGD
17 17) KBC3_PWRGD 18 (Test Option)
PWROK
n
110ms Delay 18) CPU1_PWRGDCPU 14) VCC_CORE
15)VRM3_CPU_PWRGD
CPU
l
19) PLT3_RST*
5) KBC3_SUSPWR ICH8-M 19) PCI3_RST* 19 14
u
5 9) KBC3_PWRON 17) KBC3_PWRGD 10-1) P1.5V
a
9 CL_PWROK Sheet 22-25
13) KBC3_VRON 20
s i
C 10-1) P1.05V C
Sheet 10-12
t
3 13 10) P5.0V DDR2 POWER 6) P1.8V_AUX 20) CPU1_CPURST*
8) KBC3_SUSPWR
P3.3V_MICOM 6
9) KBC3_PWRON
2) VDC SC486
m
PWROK
n
AC_DC / Battery
5) KBC3_SUSPWR 17) KBC3_PWRGD
10) P1.5V 10-2) 0.9V CL_PWROK 19) PLT3_RST*
ICSL6256 SC486
a
Sheet 50
e
Battery
10 GMCH
2) VDC
S fid
AP4435 10) P5.0V 2) VDC
10) P1.1 6) P1.8V_AUX
n
10-1) P3.3V
B
3 P3.3V_AUX & P5V_AUX
11) VCCP3_PWRGD
PCIe B
TPS51120 SC471 12)GCORE_PWRGD
10-1) P1.8V
o
P5.0V_ALW 6) P5.0V_AUX Devices
9 6) P3.3V_AUX
10-1) P3.3V
11 12
10) P1.5V
AP6680A
9) KBC3_PWRON 19
6) P3.3V_AUX
C
Sheet 40
P3.3V_MICOM
10-1) P1.2V
6 6) P1.8V_AUX
AP6680A 11-1) P1.8V
11) VCCP3_PWRGD 2) VDC
Sheet 40 6) P1.8V_AUX PEG
10-2) P0.9V
DDR3 10-1) P3.3V
Memory
Sheet 20-21
10-1) P3.3V
Sheet 46-47
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR MAIN
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. CLOCK DISTRIBUTION Rev. 0.1
P3.3V FS(2:0)
MUX
ITP_EN 667/800 MHz
333/400 MHz CLK1_MCLK0/0#
CPU_STP* 266 MHz CLK0_HOST_GMCH/GMCH* HPLL
Main PLL
SSC MPLL 333/400 MHz CLK1_MCLK1/1# SODIMM #0
100 MHz (SRC0) CLK1_PEG/PEG*
PCI Express Gfx
g
Cantiga 333/400 MHz
PEG CLK1_MCLK3/3#
MCH3_CLKREQ* MCH
MUX
n
100 MHz (SRC4) CLK1_MCH3GPLL/3GPLL* 333/400 MHz CLK1_MCLK4/4# SODIMM #1
PCIE PLL
l
CLK1_DREFCLK/CLK*
u
96 MHz
DPLLA
a
SS(96/100) SEL 100 MHz CLK1_DREFSSC/SSC*
PLL3
s i
C DPLLB MIN3_CLKREQ*
C
SSC MINI PCIE
t
CK-505M (w/ CLKREQ* & SSDC)
m
ITM3_CLKREQ*
n
100 MHz (SRC 8) CLK1_MINI2PCIE/PCIE*
MINI PCIE
CARD 2
a e
xSLG8SP513r05)
S fid
48MHz PLL 48 MHz CLK3_USB48
USBPLL (Marvell)
CHP3_SATACLKREQ* 25 MHz
MUX
EXP3_CLKREQ*
100 MHz (SRC 2) CLK1_SATA/SATA*
SATAPLL CLK1_EXPCARD# EXPRESS CARD
14.318 MHz CLK3_ICH14
n
B 33 MHz CLK3_PCLKICH 32.768 KHz B
OSC AUD3_BCLK
o
HD 24 MHz HD Audio
C
MDC3_BCLK
33 MHz 33 MHz CLK3_PCLKMICOM RTC Clock MDC
PCI_STP*
Buffer
KBC 10 MHz
32.768 KHz
17.86 MHz
SPI3_CLK
SPI
33 MHz CLK3_PCLKPORT80
PORT 80
14 MHz
A OSC A
SY.KIM 9/23/2008
BONN-L SAMSUNG
Page 8 CHECK DEV. STEP
ELECTRONICS
HK.PARK PR MAIN
APPROVAL REV PART NO.
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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
THERMAL SENSOR & FAN CONTROL D
g R545
10K 1%
10K 1%
10K 1%
10K 1%
49.9
1%
n
Check if PU is doubled to Micom Side.
C537
l
C538 THM3_VDD_5V_MN C551 THM3_VDD_3V_MN
10000nF-X5R
100nF 100nF
6.3V
R530
R529
R531
R534
10V 10V
U505
EMC2112-BP-TR
a
1 14 34-B3,49-B3
VDD_3V SMDATA KBC3_THERM_SMDATA
16 15 34-B3,49-C3
s i
C 19
VDD_5V_1 SMCLK KBC3_THERM_SMCLK C
VDD_5V_2
12 48-B2 22-C3,34-C3
ALERT# THM3_ALERT#
t
8 34-D1,48-B4
9
SYS_SHDN# THM3_STP#
RESET#
2 10-C4,48-D2
DN1 CPU2_THERMDC 10mil width and 10mil spacing.
DP1
3 C552
P3.3V_AUX
m
8-B2,48-D4 17 2.2nF 10-C4,48-D2 For Intel 45nm(From penryn)
FAN5_VDD CPU2_THERMDA
n
FAN_1 50V
18 4 THM3_THERMDN_MN
FAN_2 DP3_DN2
8-B2,48-C2 20 5 THM3_THERMDP_MN
FAN3_FDBACK# TACH DN3_DP2
R546 10
a
0 ADDR_SEL 2
e
THM3_SHDN_SEL_MN 6
SHDN_SEL
C642 MMBT3904
THM3_TRIP_SET_MN 7 11 2.2nF 1 Q509
TRIP_SET CLK 50V
3
13
S fid
GND
R532 21
R533 THERMAL_PAD
0 1.5K
1% Opposite side of CPU.
1209-001887
nostuff TRIP_SET 1500 : 95 degree
SMBUS Address 7Ah
R544
10K
M503
HEAD
DIA
LENGTH
M501
HEAD
DIA
LENGTH
M504
HEAD
DIA
LENGTH
M502
HEAD
DIA
LENGTH
B
C
1% BA61-01090A BA61-01090A BA61-01090A BA61-01090A
SHDN_SEL MODE
J1
INTEL TR MODE HDR-4P-1R-SMD
0
FAN5_VDD 1
HIGH Z AMD CPU/DIODE MODE 8-C3,48-D4
2
8-C3,48-C2
1 EXT.DIODE 2 MODE FAN3_FDBACK# 3
4
5
MNT1
6
C6 MNT2
10000nF-X5R
6.3V
3711-000456
ADDRESSS_SEL MODE
To support heatsink
0 0101 111xb
HIGH Z 0111 101xb (7A)
1 0101 110xb
A A
DESIGN DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR THERMAL SENSOR
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
P1.05V
R656 CPU1-2
CPU1-1 56 PENRYN
PENRYN 2/4
g
CPU1_D#(15:0) CPU1_D#(47:32)
1/4 0 E22 Y22 32
CPU1_A#(16:3) D0# D32#
3 J4 H1 1 F24 AB24 33
A3# ADS# CPU1_ADS# D1# D33#
4 L5 E2 2 E26 V24 34
A4# BNR# CPU1_BNR# D2# D34#
5 L4 G5 3 G22 V26 35
A5# BPRI# CPU1_BPRI# D3# D35#
6 K5 4 F23 V23 36
n
A6# D4# D36#
7 M3 F1 5 G25 T22 37
0
A7# BR0# CPU1_BREQ# D5# D37#
ADDR GROUP
8 N2 6 E25 U25 38
A8# D6# D38#
l
9 J1 H5 7 E23 U23 39
A9# DEFER# CPU1_DEFER# D7# D39#
DATA GRP 0
DATA GRP 2
10 N3 F21 8 K24 Y25 40
A10# DRDY# CPU1_DRDY# D8# D40#
u
11 P5 E1 9 G24 W22 41
A11# DBSY# CPU1_DBSY# D9# D41#
12 P2 10 J24 Y23 42
A12# D10# D42#
CONTROL
a
13 L2 D20 CPU1_IERR#_MN 11 J23 W24 43
A13# IERR# D11# D43#
14 P4 B3 12 H22 W25 44
A14# INIT# CPU1_INIT# D12# D44#
15 P1 13 F26 AA23 45
s i
C 16 R1
A15#
H4 14 K22
D13# D45#
AA24 46
C
A16# LOCK# CPU1_LOCK# D14# D46#
M1 15 H23 AB25 47
CPU1_ADSTB0# ADSTB0# D15# D47#
t
C1 J26 Y26
RESET# CPU1_CPURST# CPU1_DSTBN0# DSTBN0# DSTBN2# CPU1_DSTBN2#
F3 H26 AA26
RS0# CPU1_RS0# CPU1_DSTBP0# DSTBP0# DSTBP2# CPU1_DSTBP2#
F4 H25 U22
CPU1_A#(35:17) RS1# CPU1_RS1# CPU1_DBI0# DINV0# DINV2# CPU1_DBI2#
17 Y2 G3
A17# RS2# CPU1_RS2# CPU1_D#(31:16) CPU1_D#(63:48)
m
18 U5 G2 16 N22 AE24 48
n
A18# TRDY# CPU1_TRDY# D16# D48#
19 R3 17 K25 AD24 49
A19# D17# D49#
20 W6 G6 18 P26 AA21 50
A20# HIT# CPU1_HIT# D18# D50#
21 U4 E4 19 R23 AB22 51
A21# HITM# CPU1_HITM# D19# D51#
22 Y5 20 L23 AB21 52
a
A22# D20# D52#
e
23 U1 A6 21 M24 AC26 53
A23# A20M# CPU1_A20M# D21# D53#
24 R4 A5 22 L22 AD20 54
1
ADDR GROUP
DATA GRP 1
DATA GRP 3
26 T3 24 P25 AF23 56
A26# D24# D56#
ICH
27 W2 D5 25 P23 AC25 57
S fid
A27# STPCLK# CPU1_STPCLK# D25# D57#
28 W5 C6 26 P22 AE21 58
A28# LINT0 CPU1_INTR D26# D58#
29 Y4 B4 27 T24 AD21 59
A29# LINT1 CPU1_NMI D27# D59#
30 U2 A3 28 R24 AC22 60
A30# SMI# CPU1_SMI# D28# D60#
31 V4 29 L25 AD23 61
A31# CPU1_REQ#(4:0) D29# D61#
32 W3 K3 0 30 T25 AF22 62
A32# REQ0# D30# D62#
33 AA4 H2 1 31 N25 AC23 63
A33# REQ1# D31# D63#
34 AB2 K2 2 L26 AE25
A34# REQ2# CPU1_DSTBN1# DSTBN1# DSTBN3# CPU1_DSTBN3#
35 AA3 J3 3 M26 AF24
A35# REQ3# CPU1_DSTBP1# DSTBP1# DSTBP3# CPU1_DSTBP3#
V1 L1 4 N24 AC20
CPU1_ADSTB1# ADSTB1# REQ4# CPU1_DBI1# DINV1# DINV3# CPU1_DBI3#
n
0143854500|bga_479p_sock 0143854500|bga_479p_sock
B B
o
CPU Socket : 3704-001153
M505
SUPLECODE
C
1
MNT1 2
MNT2 3
MNT3 4
MNT4
BA75-02034A
CPU Mount
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR CPU
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. CPU1-3
PENRYN P1.5V
3/4
A22 B26
H CLK
CLK0_HCLK0 A21
BCLK0 VCCA_1
C26
CLK0_HCLK0# BCLK1 VCCA_2 C49
D C50 10000nF D
CPU1_SLP#
D7
B5
SLP# VCCP_1
K6
J6
10nF
25V
6.3V CPU Core Voltage Table IMVP-6
CPU1_DPSLP# E5
DPSLP# VCCP_2
M6
CPU1_DPRSTP# D24
DPRSTP# VCCP_3
N6
CPU1_DPWR# D6
DPWR# VCCP_4
T6
CPU1_PWRGDCPU AE6
35-C1
PWRGOOD VCCP_5
R6 Active/Deeper Sleep
CPU1_PSI# PSI# VCCP_6 Active Mode Deeper Sleep/Extended Deeper Sleep
CPU1_VID(6:0) VCCP_7
K21 Dual Mode Region Dual Mode Region
6 AE2 J21
VID_6 VCCP_8 P1.05V
5 AF3 M21
P1.05V P1.05V VID_5 VCCP_9
4 AE3 N21 nostuff nostuff VID(6:0) Voltage VID(6:0) Voltage VID(6:0) Voltage
VID_4 VCCP_10
3 AF4 T21
VID_3 VCCP_11 0 0 0 0 0 0 0 1.5000 V 0 1 0 1 0 0 0 1.0000 V 1 0 1 0 0 0 1 0.4875 V
2 AE5 R21 EC512
1 AF5
VID_2 VCCP_12
V21 C682 C681 C680 C668 C667 C666 0 0 0 0 0 0 1 1.4875 V 0 1 0 1 0 0 1 0.9875 V 1 0 1 0 0 1 0 0.4750 V
R655 R662 VID_1 VCCP_13 220uF 100nF 100nF 100nF 100nF 100nF 100nF 0 0 1
0 AD6 W21 2.5V 0 0 0 0 1 0 1.4750 V 1 0 1 0 1 0 0.9750 V 0 1 0 0 1 1 0.4625 V
56
g
56 VID_0 VCCP_14 AD
10V 10V 10V 10V 10V 10V 0 0 0 0 0 1 1 1.4625 V 0 1 0 1 0 1 1 0.9625 V 1 0 1 0 1 0 0 0.4500 V
V6
CPU1_PROCHOT#_MN
VCCP_15 nostuff 0 0 0 0 1 0 0 1.4500 V 0 1 0 1 1 0 0 0.9500 V 1 0 1 0 1 0 1 0.4375 V
D21 G21
THERMAL
PROCHOT# VCCP_16 0 0 0 0 1 0 1 1.4375 V 0 1 0 1 1 0 1 0.9375 V 1 0 1 0 1 1 0 0.4250 V
A24
CPU2_THERMDA B25
THRMDA
AC1 -> delete and change layout (ECAE) 0 0 0 0 1 1 0 1.4250 V 0 1 0 1 1 1 0 0.9250 V 1 0 1 0 1 1 1 0.4125 V
P1.05V CPU2_THERMDC R661 0 C7
THRMDC PREQ#
AC2 0 0 0 0 1 1 1 1.4125 V 0 1 0 1 1 1 1 0.9125 V 1 0 1 1 0 0 0 0.4000 V
n
CPU1_THRMTRIP# THERMTRIP# PRDY#
AC4 0 0 0 1 0 0 0 1.4000 V 0 1 1 0 0 0 0 0.9000 V 1 0 1 1 0 0 1 0.3875 V
BPM3# 0 0 0 1 0 0 1 1.3875 V 0 1 1 0 0 0 1 0.8875 V 1 0 1 1 0 1 0 0.3750 V
XDP/ITP SIGNALS
C21 AD1
CPU1_BSEL2 BSEL2 BPM2# 0 0 1
l
B23 AD3 0 0 1 0 1 0 1.3750 V 1 1 0 0 1 0 0.8750 V 0 1 1 0 1 1 0.3625 V
R644 CPU1_BSEL1 BSEL1 BPM1# 0 0 0 1 0 1 1 1.3625 V 0 1 1 0 0 1 1 0.8625 V 1 0 1 1 1 0 0 0.3500 V
1K B22 AD4
CPU1_BSEL0 BSEL0 BPM0# 0 0 0 1 1 0 0 1.3500 V 0 1 1 0 1 0 0 0.8500 V 1 0 1 1 1 0 1 0.3375 V
u
1%
CPU1_GTLREF_MN AD26 AC5 0 0 0 1 1 0 1 1.3375 V 0 1 1 0 1 0 1 0.8375 V 1 0 1 1 1 1 0 0.3250 V
GTLREF TCK CPU1_TCK 0 0 0 1 1 1 0 1.3250 V 0 1 1 0 1 1 0 0.8250 V 1 0 1 1 1 1 1 0.3125 V
a
AA6
R673 54.9 1% CPU1_COMP3_MN Y1
TDI
AB3 CPU1_TDI 0 0 0 1 1 1 1 1.3125 V 0 1 1 0 1 1 1 0.8125 V 1 1 0 0 0 0 0 0.3000 V
R643 C657 COMP3 TDO 0 0 1 0 0 0 0 1.3000 V 0 1 1 1 0 0 0 0.8000 V 1 1 0 0 0 0 1 0.2875 V
R672 27.4 1% CPU1_COMP2_MN AA1 AB5
s i
C 2K 100nF COMP2 TMS CPU1_TMS 0 0 1 0 0 0 1 1.2875 V 0 1 1 1 0 0 1 0.7875 V 1 1 0 0 0 1 0 0.2750 V C
1% R645 54.9 1% CPU1_COMP1_MN U26 AB6
10V
R646 27.4 1% CPU1_COMP0_MN R26
COMP1 TRST#
C20 CPU1_TRST# 0 0 1 0 0 1 0 1.2750 V 0 1 1 1 0 1 0 0.7750 V 1 1 0 0 0 1 1 0.2625 V
COMP0 DBR# ITP3_DBRESET# 0 1 0 1 1 0
t
0 0 0 1 1 1.2625 V 1 1 0 1 1 0.7625 V 1 0 1 0 0 0.2500 V
11-C4,43-A4
49-B4 AF7 M4 0 0 1 0 1 0 0 1.2500 V 0 1 1 1 1 0 0 0.7500 V 1 1 0 0 1 0 1 0.2375 V
CPU1_VCCSENSE 11-B4,43-A4
49-B4 AE7
VCCSENSE RSVD_1
N5 0 0 1 0 1 0 1 1.2375 V 0 1 1 1 1 0 1 0.7375 V 1 1 0 0 1 1 0 0.2250 V
CPU1_VSSSENSE VSSSENSE RSVD_2
T2 0 0 1 0 1 1 0 1.2250 V 0 1 1 1 1 1 0 0.7250 V 1 1 0 0 1 1 1 0.2125 V
RSVD_3 0 0 1 0 1 1 1 1.2125 V 0 1 1 1 1 1 1 0.7125 V 1 1 0 1 0 0 1
0 0.2000 V
m
C23 V3
n
SI team request TEST1 RSVD_4 0 0 1 1 0 0 0 1.2000 V 1 0 0 0 0 0 0 0.7000 V 1 1 0 1 0 0 1 0.1875 V
D25 B2
RSVD
TEST2 RSVD_5 0 0 1 1 0 0 1 1.1875 V 1 0 0 0 0 0 1 0.6875 V 1 1 0 1 0 1 0 0.1750 V
C24 D2
TEST3 RSVD_6 0 0 1 1 0 1 0 1.1750 V 1 0 0 0 0 1 0 0.6750 V 1 1 0 1 0 1 1 0.1625 V
AF26 D22
TEST4 RSVD_7 0 0 1 1 0 1 1 1.1625 V 1 0 0 0 0 1 1 0.6625 V 1 1 0 1 1 0 0 0.1500 V
AF1 D3
a
TEST5 RSVD_8 0 1 1 0 1 0
e
A26 F6 0 1 1 0 0 1.1500 V 0 0 1 0 0 0.6500 V 1 1 1 0 1 0.1375 V
TEST6 RSVD_9 0 0 1 1 1 0 1 1.1375 V 1 0 0 0 1 0 1 0.6375 V 1 1 0 1 1 1 0 0.1250 V
C3
TEST7 0 0 1 1 1 1 0 1.1250 V 1 0 0 0 1 1 0 0.6250 V 1 1 0 1 1 1 1 0.1125 V
0 0 1 1 1 1 1 1.1125 V 1 0 0 0 1 1 1 0.6125 V 1 1 1 0 0 0 0 0.1000 V
0 1 0 0 0 0 0 1.1000 V 1 0 0 1 0 0 0 0.6000 V 1 1 1 0 0 0 1 0.0875 V
S fid
0143854500|bga_479p_sock 0 1 0 0 0 0 1 1 0 0 1 0 0 1 0.5875 V 1 1 1 0 0 1 0 0.0750 V
1.0875 V
0 1 0 0 0 1 0 1.0750 V 1 0 0 1 0 1 0 0.5750 V 1 1 1 0 0 1 1 0.0625 V
0 1 0 0 0 1 1 1.0625 V 1 0 0 1 0 1 1 0.5625 V 1 1 1 0 1 0 0 0.0500 V
0 1 0 0 1 0 0 1.0500 V 1 0 0 1 1 0 0 0.5500 V 1 1 1 0 1 0 1 0.0375 V
0 1 0 0 1 0 1 1.0375 V 1 0 0 1 1 0 1 0.5375 V 1 1 1 0 1 1 0 0.0250 V
0 1 0 0 1 1 0 1.0250 V 1 0 0 1 1 1 0 0.5250 V 1 1 1 0 1 1 1 0.0125 V
0 1 0 0 1 1 1 1 0 0 1 1 1 1 0.5125 V 1 1 1 1 0 1
0 0 0.0000 V
CPU Socket : 3704-001153 1.0125 V
1 1
0 1 0 0 0 0 0.5000 V 1 1 1 1 0 0 1 0.0000 V
1 1 1 1 0 1 0 0.0000 V
Deeper Slp 1 1 1 1 0 1 1 0.0000 V
n
Active 1 1 1 1 1 0 0 0.0000 V
DPRSLPVR 0 DPRSLPVR 1 1 1 1 1 1 0 1 0.0000 V
B DPRSTP* 0 1 1 1 1 1 1 0 0.0000 V
FSC FSB FSA FRQ DPRSTP* 1
P1.05V 1 1 1 1 1 1 1 0.0000 V
0 0 0 266M PSI2* 0 or 1 PSI2* 0 or 1
o
*"1111111" : 0V power good asserted.
0 1 0 200M
0 1 1 166M
54.9 1%
C
near the CPU GTLREF : Keep the Voltage divider within 0.5"
of the first GTLREF0 pin with Zo=55ohm trace.
R75
CPU1_TDI
BSEL COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm)
trace shorter than 1/2" to their respective Banias socket pins.
Pull-down
CPU1_TMS GND test points within 100mil of the VCC/VSSsense at the end of the line.
FSB 1067 MHz BSEL0, BSEL1, BSEL2
CPU1_TCK FSB 800 MHz BSEL0, BSEL2 Route the VCC/VSSsense as a Zo=55ohm traces with equal length.
54.9 1%
CPU1_TRST# Observe 3:1 spacing b/w VCC/VSSsense lines and 25mil away
54.9 1%
(preferred 50mil) from any other signal. And GND via 100mil away
from each of the VCC/VSS test point vias.
A A
R73
R74
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR CPU
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
M22
M25
N23
N26
R22
K23
K26
P21
P24
L21
L24
M2
M5
N1
N4
R2
K4
P3
P6
L3
L6
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_140
VSS_141
VSS_139
A11 K1
VSS_1 CPU_CORE CPU_CORE VSS_120
A14 J5
VSS_2 VSS_119
A16 J25
VSS_3 VSS_118
A19 J22
VSS_4 VSS_117
A2 A10 AE9 J2
VSS_5 VCC_1 VCC_51 VSS_116
A23 A12 AF10 H6
VSS_6 VCC_2 VCC_52 VSS_115
A25 A13 AF12 H3
VSS_7 VCC_3 VCC_53 VSS_114
A4 A15 AF14 H24
g
VSS_8 VCC_4 VCC_54 VSS_113
A8 A17 AF15 H21
VSS_9 VCC_5 VCC_55 VSS_112
AA11 A18 AF17 G4
VSS_10 VCC_6 VCC_56 VSS_111
AA14 A20 AF18 G26
VSS_11 VCC_7 VCC_57 VSS_110
AA16 A7 AF20 G23
VSS_12 VCC_8 VCC_58 VSS_109
AA19 A9 AF9 G1
n
CPU_CORE AA2
VSS_13
AA10
VCC_9 CPU1-4 VCC_59
B10
VSS_108
F8
VSS_14 VCC_10 VCC_60 VSS_107
AA22 AA12 B12 F5
VSS_15 VCC_11PENRYN VCC_61 VSS_106
l
AA25 AA13 B14 F25
VSS_16 VCC_12 VCC_62 VSS_105
AA5 AA15 B15 F22
VSS_17 VCC_13 VCC_63 VSS_104
u
AA8 AA17 B17 F2
AB1
VSS_18
VSS_19
AA18
VCC_14
VCC_15
4/4 VCC_64
VCC_65
B18
VSS_103
VSS_102
F19
a
AB11 AA20 B20 F16
VSS_20 VCC_16 VCC_66 VSS_101
AB13 AA7 B7 F13
VSS_21 VCC_17 VCC_67 VSS_100
AB16 AA9 B9 F11
s i
C AB19
VSS_22
AB10
VCC_18 VCC_68
0143854500|bga_479p_sock C10
VSS_99
E8
C
VSS_23 VCC_19 VCC_69 VSS_98
AB26 AB12 C12 E6
VSS_24 VCC_20 VCC_70 VSS_97
t
AB4 AB14 C13 E3
VSS_25 VCC_21 VCC_71 VSS_96
R671 100 1% AB8 AB15 C15 E24
CPU1_VCCSENSE 10-C4,43-A4 AC11
VSS_26
AB17
VCC_22 VCC_72
C17
VSS_95
E21
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
10000nF-X5R6.3V
49-B4 VSS_27 VCC_23 VCC_73 VSS_94
AC14 AB18 C18 E19
VSS_28 VCC_24 VCC_74 VSS_93
m
AC16 AB20 C9 E16
n
VSS_29 VCC_25 VCC_75 VSS_92
10%
10%
a
VSS_33 VCC_29 VCC_79 VSS_88
e
AC6 AC13 D17 D26
VSS_34 VCC_30 VCC_80 VSS_87
C69
C70
C73
C72
C61
C59
C62
C74
C60
C65
C76
C75
C66
C68
C67
C71
AC8 AC15 D18 D23
VSS_35 VCC_31 VCC_81 VSS_86
AD11 AC17 D9 D19
VSS_36 VCC_32 VCC_82 VSS_85
R670 100 1% AD13 AC18 E10 D16
CPU1_VSSSENSE 10-C4,43-A4 AD16
VSS_37
AC7
VCC_33 VCC_83
E12
VSS_84
D13
S fid
49-B4 VSS_38 VCC_34 VCC_84 VSS_83
AD19 AC9 E13 D11
VSS_39 VCC_35 VCC_85 VSS_82
AD2 AD10 E15 D1
VSS_40 VCC_36 VCC_86 VSS_81
AD22 AD12 E17 C8
VSS_41 VCC_37 VCC_87 VSS_80
AB23 AD14 E18 C5
VSS_42 VCC_38 VCC_88 VSS_79
AD25 AD15 E20 C25
VSS_43 VCC_39 VCC_89 VSS_78
Prodlizer & Cbulk common used(Socket inside) AD5
VSS_44
AD17
VCC_40 VCC_90
E7
VSS_77
C22
AD8 AD18 E9 C2
VSS_45 VCC_41 VCC_91 VSS_76
AE1 AD7 F10 C19
VSS_46 VCC_42 VCC_92 VSS_75
AE11 AD9 F12 C16
VSS_47 VCC_43 VCC_93 VSS_74
n
AE14 AE10 F14 C14
VSS_48 VCC_44 VCC_94 VSS_73
AE16 AE12 F15 C11
VSS_49 VCC_45 VCC_95 VSS_72
AE19 AE13 F17 B8
VSS_50 VCC_46 VCC_96 VSS_71
B AE23
VSS_51
AE15
VCC_47 VCC_97
F18
VSS_70
B6 B
AE26 AE17 F20 B24
VSS_52 VCC_48 VCC_98 VSS_69
o
AE4 AE18 F7 B21
VSS_53 VCC_49 VCC_99 VSS_68
AE8 AE20 F9 B19
VSS_54 VCC_50 VCC_100 VSS_67
AF11 B16
VSS_55 VSS_66
AF13 B13
VSS_56 VSS_65
AF16 B11
VSS_57 VSS_64
AF19 AF8
C
VSS_58 VSS_63
AF2 AF6
VSS_59 VSS_62
AF21 AF25
VSS_148
VSS_147
VSS_146
VSS_145
VSS_144
VSS_143
VSS_142
VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_60 VSS_61
U21
T4
T26
T23
T1
R5
R25
Y6
Y3
Y24
Y21
W4
W26
W23
W1
V5
V25
V22
V2
U6
U3
U24
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR CPU
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
CK505M
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
FSA FSB FSC P1.5V P3.3V
HOST CLK
BSEL0 BSEL1 BSEL2
10000nF-X5R
10000nF-X5R
10000nF-X5R
10000nF-X5R
10V
10V
10V
1 0 0 133 MHz
10000nF-X5R
10000nF-X5R
10V
10V
10V
10V
6.3V
6.3V
1 0 1 100 MHz
6.3V
6.3V
6.3V
6.3V
100nF
100nF
100nF
g
1 1 0 166 MHz
100nF
100nF
100nF
100nF
1 1 1 RSVD
C698
C693
C717
C692
C695
C694
C691
C721
C718
C720
C697
C719
C696
nostuff CLK3_VDD_SRC_IO_MN CLK3_VDD_REF_MN
n
nostuff nostuff
C
CLK3_FM48
CLK3_USB48
31-B4
22-A3
R88
R86
33
33
s u i al U5
SLG8SP513
C
t
19 4
VDD_IO VDD_REF
10-C4,13-A3 R87 2.2K 33 16
CPU1_BSEL0 43
VDD_SRC_IO1 VDD_48
9
VDD_SRC_IO2 VDD_PCI
nostuff 52 23
VDD_SRC_IO3 VDD_PLL3
m
56
n
VDD_CPU_IO
C142 27
VDD_PLL3_IO VDD_SRC
46
0.022nF 62
VDD_CPU
10-C4,13-A3 50V 55
CPU1_BSEL1 10-C4,13-A3 R96 10K 1%
NC
61 10-D4
a
CPU1_BSEL2 CPU0 CLK0_HCLK0
e
CLK3_USB48_R_MN 17 60 10-D4
USB_FS_A CPU0# CLK0_HCLK0#
22-A3 R97 33 64
CLK3_ICH14 CLK3_ICH14_R_MN 5
FSB_TESTMODE
58 13-B1
REF_FS_C_TEST_SEL CPU1_MCH
57 13-B1
CLK0_HCLK1
22-C3,48-B2 44
CPU1_MCH# CLK0_HCLK1#
CHP3_CPUSTP#
S fid
CPUSTOP#
22-C3,48-B2 45 40
CHP3_PCISTP# PCISTOP# SRC11_CLKREQH#
39 30-B3,48-B2
22-B3 63
SRC11#_CLKREQG# LOM3_CLKREQ#
CLK3_PWRGD CLKPWRGD_PWRDN#
41
SRC10
CLK3_PCLKICH
21-C2 R90 22 5% CLK3_PCLKICH_R_MN 14
PCIF_5_ITP_EN SRC10#
42
n
54
SRC8_ITP
34-B4 R93 22 5% CLK3_PCLKMICOM_R_MN 11 53
CLK3_PCLKMICOM PCI_2 SRC8#_ITP#
B MCH3_CLKREQ#
14-A1,48-B2 R94 475 1% MCH3_CLKREQ#_R_MN 10
PCI_1_CLKREQ_B# SRC7_CLKREQF#
51 B
50 32-C4,49-C4
SRC7#_CLKREQE# MIN3_CLKREQ#
o
22-B3,49-C3 R95 475 1% CHP3_SATACLKREQ#_R_MN8
CHP3_SATACLKREQ# PCI_0_CLKREQ_A#
48 32-C4
18-B4,19-B4 22-B4,48-D4 7
SRC6
47 32-C4
CLK1_MINIPCIE
SMB3_CLK 18-B4,19-B4 22-B4,48-B4 6
SCL SRC6# CLK1_MINIPCIE#
SMB3_DATA SDA
34 14-B1
3
SRC4
35 14-B1
CLK1_MCH3GPLL
C
2
XTAL_IN SRC4# CLK1_MCH3GPLL#
XTAL_OUT
31 22-C1
SRC3_CLKREQC# CLK1_PCIEICH
0.033nF50V
0.033nF50V
0.033nF50V
10K 1%
10K 1%
18 32 22-C1
59
VSS_48 SRC3#_CLKREQD# CLK1_PCIEICH#
Y2 VSS_CPU
22 28 20-B1
5%
5%
5%
15
VSS_IO SRC2
29 20-B1
CLK1_SATA
1
26
VSS_PCI SRC2# CLK1_SATA#
VSS_PLL3
14.31818MHz 1 THERM_GND 24 14-C1
VSS_REF LCDCLK_27M CLK1_DREFSSCLK
C143
C145
C144
30 25
R92
R89
14-C1
2801-004667
36
VSS_SRC1 LCDCLK#_27M_SS CLK1_DREFSSCLK#
C147 VSS_SRC2
C146 49
VSS_SRC3 SRC0_DOT96
20 14-C1
CLK1_DREFCLK
0.018nF 0.018nF 21 14-C1
50V 50V
SRC0#_DOT96# CLK1_DREFCLK#
1205-003156
65
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL nostuff P1.05V P1.05V
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY. EC508 nostuff
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS C599 C647 C645 C597 nostuff
220uF 10000nF-X5R 100nF 100nF 100nF
EXCEPT AS AUTHORIZED BY SAMSUNG. 2.5V EC501
AD 6.3V 10V 10V 10V C556 C554 C555
1000nF-X5R 10000nF-X5R 10000nF-X5R 220uF
2.5V
6.3V 6.3V 6.3V
AD
AM33
AG24
AG25
AG26
AG33
AG34
AC26
AC28
AC33
AC34
AH23
AH25
AH28
AA28
AE33
AA33
AA34
AB34
AE26
AK33
AF23
AF25
AF28
AF33
AJ23
AJ26
AJ33
W33
U10
U11
U12
U13
U33
U34
V33
V34
Y33
Y34
T10
T11
T12
T13
T32
CPU1_A#(35:3)
U1
U2
U3
U5
U6
U7
U8
U9
V1
V2
V3
T2
T5
T6
T7
T8
T9
22-D2
D CPU1_D#(63:0) A14 3
D
H_A#_3
VCC_1
VCC_10
VCC_11
VCC_12
VCC_13
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
0 F2 C15 4
H_D#_0 H_A#_4
1 G8 F16 5
H_D#_1 H_A#_5
2 F8 H13 6
H_D#_2 H_A#_6
3 E6 C18 7
H_D#_3 H_A#_7
4 G2 M16 8
H_D#_4 H_A#_8
5 H6 J13 9
H_D#_5 H_A#_9
6 H2 P16 10
H_D#_6 VCC CORE VTT H_A#_10
7 F6 R16 11
H_D#_7 H_A#_11
8 D4 N17 12
H_D#_8 H_A#_12
9 H3 M13 13
H_D#_9 H_A#_13
10 M9 E17 14
H_D#_10 H_A#_14
11 M11 P17 15
H_D#_11 H_A#_15
g
H_D#_12 H_A#_16
13 J2 G20 17
P1.05V H_D#_13 H_A#_17
14 N12 B19 18
H_D#_14 H_A#_18
15 J6 J16 19
H_D#_15 H_A#_19
16 P2 E20 20
H_D#_16 H_A#_20
17 L2 H16 21
n
R535 H_D#_17 H_A#_21
221 18 R2 J20 22
H_D#_18 H_A#_22
1% 19 N9 L17 23
H_D#_19 H_A#_23
l
20 L6 A17 24
MCH1_HXSWING H_D#_20 H_A#_24
21 M5
H_D#_21 U3-1 H_A#_25
B17 25
u
R43 22 J3 L16 26
C32 23 N2
H_D#_22 H_A#_26
C21 27
100 100nF H_D#_23 H_A#_27
GL40
a
1% 24 R1 J17 28
10V H_D#_24 H_A#_28
25 N5 H20 29
H_D#_25 H_A#_29
26 N6 B18 30
s i
C H_D#_26 H_A#_30 C
27
28
P13
N8
H_D#_27 1 OF 5 H_A#_31
K17
B20
31
32
H_D#_28 H_A#_32
t
29 L7 F21 33
m
33 AD14 H12
CPU1_ADS#
n
H_D#_33 H_ADS#
34 Y6 B16
35 Y10
H_D#_34 H_ADSTB#_0
G17 CPU1_ADSTB0#
36 Y12
H_D#_35 H_ADSTB#_1
A9
CPU1_ADSTB1#
37 Y14
H_D#_36 H_BNR#
F11 CPU1_BNR#
a
H_D#_37 H_BPRI# CPU1_BPRI#
e
38 Y7 G12
39 W2
H_D#_38 H_BREQ# CPU1_BREQ#
P1.05V H_D#_39
40 AA8 E9
41 Y9
H_D#_40 H_DEFER#
B10
CPU1_DEFER#
42 AA13
H_D#_41 H_DBSY#
J11 CPU1_DBSY#
CPU1_DPWR#
S fid
H_D#_42 H_DPWR#
R549 43 AA9 F9
44 AA11
H_D#_43 H_DRDY# CPU1_DRDY#
1K H_D#_44
1% 45 AD11 H9
46 AD10
H_D#_45 H_HIT#
E12
CPU1_HIT#
MCH1_HVREF 47 AD13
H_D#_46 H_HITM#
H11
CPU1_HITM#
48 AE12
H_D#_47 H_LOCK#
C9
CPU1_LOCK#
R547 H_D#_48 H_TRDY# CPU1_TRDY#
2K 49 AE9
H_D#_49
1% 50 AA2 AH7
51 AD8
H_D#_50 HPLL_CLK
AH6 CLK0_HCLK1
HOST CONTROL
H_D#_51 HPLL_CLK# CLK0_HCLK1#
n
52 AA3
H_D#_52
53 AD3 J8
54 AD7
H_D#_53 H_DINV#_0
L3
CPU1_DBI0#
B 55 AE14
H_D#_54 H_DINV#_1
Y13
CPU1_DBI1# B
56 AF3
H_D#_55 H_DINV#_2
Y1 CPU1_DBI2#
H_D#_56 H_DINV#_3 CPU1_DBI3#
o
57 AC1
H_D#_57
58 AE3 L10
59 AC3
H_D#_58 H_DSTBN#_0
M7
CPU1_DSTBN0#
60 AE11
H_D#_59 H_DSTBN#_1
AA5
CPU1_DSTBN1#
61 AE8
H_D#_60 H_DSTBN#_2
AE6
CPU1_DSTBN2#
62 AG2
H_D#_61 H_DSTBN#_3 CPU1_DSTBN3#
C
H_D#_62
63 AD6 L9
H_D#_63 H_DSTBP#_0
M8
CPU1_DSTBP0#
C12
H_DSTBP#_1
AA6 CPU1_DSTBP1#
CPU1_CPURST# E11
H_CPURST# H_DSTBP#_2
AE5
CPU1_DSTBP2#
CPU1_SLP# H_CPUSLP# CFG H_DSTBP#_3 CPU1_DSTBP3#
NC CPU1_REQ#(4:0)
C5 B15 0
MCH1_HXSWING MCH1_H_RCOMP_MN E3
H_SWING H_REQ#_0
K13 1
H_RCOMP H_REQ#_1
R536 24.9 1% F13 2
H_REQ#_2
B11 B13 3
MCH1_HVREF H_DVREF H_REQ#_3
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
A11 B14
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
1608 4
H_AVREF H_REQ#_4
MCH1_VTTLF1_MN A8 B6
VTTLF
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
W30
W32
Y29
Y30
Y32
T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28
AA29
AA30
AA32
AB30
AE32
AF30
AG29
AG30
AG32
AH29
AH30
AH32
AJ29
AJ32
AK23
AK24
AK25
AK26
AK28
AK29
AK30
AK32
AL26
AL28
AL29
AL30
AL32
AM30
AM32
U30
U32
V29
V30
W29
Current Setting (def. : default Option)
CFG# Low High P1.05V
CPU1_BSEL0
C35
C540
C539
CPU1_BSEL1 MCH1_CFG6_MN
A CFG(5) DMIx2 DMIx4 (def.) A
CFG(6) iTPM Host Interface Enable iTPM Host Interface Disable (def.) CPU1_BSEL2
R586
CFG(7) ME Crypto no confidentiality ME Crypto confidentiality (def.) 2.2K
DRAW DATE TITLE
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL P3.3V
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS R771
EXCEPT AS AUTHORIZED BY SAMSUNG. 20K
1%
R770
7.5K
1%
D D
AD37
AC47
AD39
AD36
AC48
AD40
AD43
AC46
AD42
AD46
AA43
AA42
AA46
AA37
AA40
AA36
AA39
W47
M46
M47
M40
M42
M48
M39
M43
H44
N41
N44
U43
H43
N40
N43
U42
R48
N38
U37
U40
R47
N37
U36
U39
Y48
Y36
P48
Y43
P47
Y42
Y37
Y40
Y39
Y46
T43
T42
T40
T39
L44
L40
L43
L41
L46
J46
J44
J41
J42
1608 P1.05V_PEG
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
27-B4,48-C2 H32 T37 R639 49.9 1%
CRT3_DDCCLK 27-B4,48-D2 J32
CRT_DDC_CLK PEG_COMPI
T36
CRT3_DDCDATA CRT_DDC_DATA PEG_COMPO MCH1_COMPIO_R_MN
CRT3_HSYNC
27-C4,48-C3 R579 40.2 1% J29
CRT_HSYNC GFX_VID_0
B33
27-C4,48-C3 R582 40.2 1% L29 B32
CRT3_VSYNC CRT_VSYNC GFX_VID_1
VGA
G33
GFX_VID_2
27-C3,48-C4 E28 F33
CRT3_BLUE 27-C3,48-C3 G28
CRT_BLUE GFX_VID_3
E33
CRT3_GREEN 27-C3,48-D4 J28
CRT_GREEN GFX_VID_4
g
CRT3_RED CRT_RED PCIE GFX
1.02kohm PCIE GFX C34
150 1%
150 1%
150 1%
GFX_VR_EN
0.033nF
0.033nF
0.033nF
50V
50V
50V
R576 1K 1% E29
CRT_TVO_IREF
G29 AE41
CRT_IRTN DMI_RXN_0
AE37 DMI1_TXN_0
DMI_RXN_1 DMI1_TXN_1
C31
U3-2 AE47
n
E32
TV_DCONSEL_0 DMI_RXN_2
AH39 DMI1_TXN_2
TV_DCONSEL_1 DMI_RXN_3 DMI1_TXN_3
C588
C589
C590
R577
R578
R581
l
R580 75 1% F25 AE40
TVA_DAC GL40 DMI_RXP_0 DMI1_TXP_0
TV
R583 75 1% H25
TVB_DAC DMI_RXP_1
AE38
DMI1_TXP_1
u
R584 75 1% K25 AE48
TVC_DAC DMI_RXP_2
AH40 DMI1_TXP_2
DMI
DMI1_TXP_3
AM14
AM15
DMI_RXP_3
AG15
AG21
AC20
AC21
AC23
AC24
AH15
AH20
AN14
AC16
AC17
AA15
AA20
AA21
AA23
AA24
AA25
AB15
AB20
AB23
AB25
AE15
AE20
AE21
AE23
AE24
AE25
AA16
AA19
AB16
AB17
AB19
AF15
AF20
AL15
AJ15
AJ21
a
H24
U14
U15
V15
Y15
Y21
Y24
Y26
T14
T16
T17
TV_RTN
AE35
Default : TV Disable DMI_TXN_0
AE43
DMI1_RXN_0
s i
C DMI_TXN_1 DMI1_RXN_1 C
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
26-A1,49-D4 K33 AE46
LCD3_EDID_CLK 26-A1,49-C3 J33
L_DDC_CLK DMI_TXN_2
AH42 DMI1_RXN_2
LCD3_EDID_DATA L_DDC_DATA DMI_TXN_3 DMI1_RXN_3
t
M32 AD35
M33
L_CTRL_CLK DMI_TXP_0
AE44
DMI1_RXP_0
L_CTRL_DATA DMI_TXP_1
AF46
DMI1_RXP_1
DMI_TXP_2 DMI1_RXP_2
m
26-C2,49-D4 M29 AH43
MCH3_LCDVDDON DMI1_RXP_3
n
L_VDD_EN DMI_TXP_3
26-C4,48-B2 G32
MCH3_BKLTEN 26-B2,48-C4 L32
L_BKLT_EN
B38 12-A1
LCD3_BRIT L_BKLT_CTRL DPLL_REF_CLK
A38 12-A1
CLK1_DREFCLK
26-A1 H47
DPLL_REF_CLK# CLK1_DREFCLK#
a
LCD1_ADATA0# LVDSA_DATA#_0
e
26-A2 E46 GFX VCC E41 12-A1
CLK
LCD1_ADATA1# LVDSA_DATA#_1 GFX VCC NCTF DPLL_REF_SSCLK CLK1_DREFSSCLK
26-B1 G40 F41 12-A1
LCD1_ADATA2# LVDSA_DATA#_2 DPLL_REF_SSCLK# CLK1_DREFSSCLK#
A40
LVDSA_DATA#_3 2 OF 5 0904-002489
F43
26-B1 H48
PEG_CLK
E43 CLK1_MCH3GPLL
LCD1_ADATA0 CLK1_MCH3GPLL#
S fid
LVDSA_DATA_0 GFX VCC NCTF PEG_CLK# P1.05V
26-B2 D45
LCD1_ADATA1 26-B1 F40
LVDSA_DATA_1
AH37
LCD1_ADATA2 B40
LVDSA_DATA_2 CL_CLK
AH36
CHP3_CL_CLK_0
LVDSA_DATA_3 CL_DATA CHP3_CL_DATA_0
LVDS
AN36
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
ME
CL_PWROK KBC3_PWRGD R590
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
n
26-B1 G37 B7 35-C1 23-D4 11-D3 499
LCD1_BDATA2# J37
LVDSB_DATA#_2 PM_DPRSTP#
R32 37-C3 11-D3
CPU1_DPRSTP# 1%
LVDSB_DATA#_3 DPRSLPVR CHP3_DPRSLPVR
B 26-B1 B42 AT40 22-B3,34-C4
48-B3 B
PM
LCD1_BDATA0 LVDSB_DATA_0 PWROK KBC3_PWRGD
AE16
AE17
AE19
AF16
AF17
AF19
AG16
AG17
AG19
AH16
AH17
AH19
AJ16
AJ19
AK16
AK17
AK19
AK20
AK21
AL16
AL19
AL21
AM16
AM17
AM19
AM20
AM21
U16
U19
U20
U21
V16
V17
V19
V21
V23
V24
V25
V26
V28
W16
W17
W19
W20
W21
W23
W24
W25
W26
W28
Y16
Y17
Y19
26-B2 G38 AT11
LCD1_BDATA1 LVDSB_DATA_1 RSTIN#
o
26-B1 F37 PLT3_RST#_R_MN R589
LCD1_BDATA2 K37
LVDSB_DATA_2
T20 CPU1_THRMTRIP#_R_MN 0
LVDSB_DATA_3 THERMTRIP#
N33
CPU1_THRMTRIP#
PM_EXT_TS#_0 49-C3
26-B2 A37 P32 10-C4,20-B1
LCD1_BCLK 26-B2 B37
LVDSB_CLK PM_EXT_TS#_1
LCD1_BCLK# LVDSB_CLK#
N28
C
DDPC_CTRLCLK
R48 2.4K 1% C44
LVDS_IBG DDPC_CTRLDATA
M28 34-B3 21-C1,25-A4 30-B3,32-C3
B43
E37
LVDS_VBG
G36 PLT3_RST#
LVDS_VREFH SDVO_CTRLCLK R539 100 1%
E38 E36 P3.3V
MISC
RSVD11
RSVD10
RSVD13
RSVD12
LVDS_VREFL SDVO_CTRLDATA
B28 NC RSVD K36 R637 10K 1%
HDA_BCLK CLKREQ#
A28
HDA_SYNC
R588 10K 1%
HDA
B30 H36
HDA_RST# ICH_SYNC# P3.3V
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
RSVD_16
RSVD_17
RSVD_18
RSVD_19
RSVD_20
RSVD_21
RSVD_22
B29 B12
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_1
RSVD_2
HDA_SDI TSATN# R585 4.7K
C29 NC_42
NC_43
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
HDA_SDO
NC_5
NC_6
NC_7
NC_8
NC_9
NC_1
NC_2
NC_3
NC_4
MCH3_CLKREQ#
A5
A6
B4
B45
B47
F1
F48
A43
AH13
A44
A46
A47
B48
BC1
BC48
BD1
BD48
BE2
BE47
BF1
BF3
BF46
BF48
BG1
BG2
BG4
BG45
BG47
BG48
BH2
BH3
BH43
BH44
BH46
BH47
BH5
BH6
C3
C46
C48
D2
D47
E1
E48
AH10
AH12
AH9
AK34
AL34
AM35
AN35
AY21
B2
B31
BF18
BF23
BG23
BH18
K12
M1
M36
N36
R33
T24
T33
P1.05V MCH3_ICHSYNC#
P3.3V P1.05V
IGFX_CORE
ME Debug Port R548 56
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS PLACE EACH CAP NEAR AV42 PIN
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. MEM1_ADQ(63:0) MEM1_VREF
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 C651 C650
100nF 100nF
AW36
AM38
AM44
AM42
AM11
AM13
AN38
AN43
AN44
AU40
AN41
AN39
AU44
AU42
BD43
BC40
BD38
BD13
AU11
BC11
AU13
BD12
BC12
AU10
AN10
AN12
AV39
AY44
BA40
AV41
AY43
BB41
AY37
AV37
AY38
BB38
AV36
BA12
AV13
BA11
AT38
AT36
AJ38
AJ41
AJ36
AJ40
AJ11
AJ12
AM5
R46 499 1%
BD9
AN8
AU5
AU6
BB9
BA9
AV9
AY8
BA6
AV5
AV7
AT9
AT5
AJ9
AJ8
nostuff
nostuff
D MEM1_ABS(2:0) D
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
0 BD21 BF17
SA_BS_0 SM_REXT
1 BG18 AV42
2 AT25
SA_BS_1 SM_VREF MEM1_VREF SM_PWROK
SA_BS_2
BC36 DDR2 : GND
MEM1_ADM(7:0) 0 AM37
SM_DRAMRST#
AR36
SA_DM_0 SM_PWROK DDR3 : Connect to VRM.
1 AT41
SA_DM_1
2 AY41 BG16
3 AU39
SA_DM_2 SB_CAS#
AU17
MEM1_BCAS#
4 BB12
SA_DM_3 SB_RAS#
BF14
MEM1_BRAS#
SA_DM_4 SYSTEM MEMORY A SB_WE# MEM1_BWE#
5 AY6
SA_DM_5
6 AT7 AV16
7 AJ5
SA_DM_6 SB_CS#_0
AR13
MEM1_CS2#
SA_DM_7 SB_CS#_1 MEM1_CS3#
MEM1_ADQS#(7:0) 0 AJ43 BF15
g
1 AT43
SA_DQS#_0 SB_ODT_0
AY13
MEM1_ODT2
2 BA44
SA_DQS#_1 SB_ODT_1 MEM1_ODT3
SA_DQS#_2
3 BD37 AY36
4 AY12
SA_DQS#_3 SB_CKE_0
BB36 MEM1_CKE2
5 BD8
SA_DQS#_4 SB_CKE_1 MEM1_CKE3
n
SA_DQS#_5
6 AU9 AV24
7 AM8
SA_DQS#_6 SB_CK_0
AU24
CLK1_MCLK2
SA_DQS#_7 SB_CK#_0 CLK1_MCLK2#
l
AU20
MEM1_ADQS(7:0) 0 AJ44
SB_CK_1
AV20
CLK1_MCLK3
SA_DQS_0 SB_CK#_1 CLK1_MCLK3#
u
1
2
AT44
BA43
SA_DQS_1
SA_DQS_2
U3-3 SB_DM_0
AM47 0 MEM1_BDM(7:0)
a
3 BC37 AY47 1
SA_DQS_3 SB_DM_1
GL40
SYSTEM MEMORY A
4 AW12 BD40 2
SA_DQS_4 SB_DM_2
5 BC8 BF35 3
s i
C 6 AU8
SA_DQS_5 SB_DM_3
BG11 4
C
SA_DQS_6 SB_DM_4
7 AM7
SA_DQS_7 3 OF 5 SB_DM_5
BA3 5
t
AP1 6
MEM1_AMA(14:0) 0 BA21
SB_DM_6
AK2 7
SA_MA_0 SB_DM_7
1 BC24
2 BG24
SA_MA_1
AL46 0
MEM1_BDQS#(7:0)
SA_MA_2 0904-002489 SB_DQS#_0
m
3 BH24 AV47 1
n
SA_MA_3 SB_DQS#_1
4 BG25 BH41 2
SA_MA_4 SB_DQS#_2
5 BA24 BH37 3
SA_MA_5 SB_DQS#_3
6 BD24 BG9 4
SA_MA_6 SB_DQS#_4
7 BG27 BC2 5
SYSTEM MEMORY B
a
SA_MA_7 SB_DQS#_5
e
8 BF25 AT2 6
SA_MA_8 SB_DQS#_6
9 AW24 AN5 7
SA_MA_9 SB_DQS#_7
10 BC21
11 BG26
SA_MA_10
AL47 0
MEM1_BDQS(7:0)
SA_MA_11 SB_DQS_0
12 BH26 AV48 1
S fid
SA_MA_12 SB_DQS_1
13 BH17 BG41 2
SA_MA_13 SB_DQS_2
14 AY25 BG37 3
SA_MA_14 SB_DQS_3
BH9 4
SB_DQS_4
BD20 BB2 5
MEM1_ACAS# BB20
SA_CAS# SB_DQS_5
AU1 6
MEM1_ARAS# AY20
SA_RAS# SB_DQS_6
AN6 7
MEM1_AWE# SA_WE# SB_DQS_7
BA17 AV17 0
MEM1_BMA(14:0)
MEM1_CS0# AY16
SA_CS#_0 SB_MA_0
BA25 1
MEM1_CS1# SA_CS#_1 SB_MA_1
n
BC25 2
SB_MA_2
BD17 AU25 3
MEM1_ODT0 AY17
SA_ODT_0 SB_MA_3
AW25 4
B MEM1_ODT1 SA_ODT_1 SB_MA_4
BB28 5 B
SB_MA_5
BC28 AU28 6
MEM1_CKE0 SA_CKE_0 SB_MA_6
o
AY28 AW28 7
P1.8V_AUX MEM1_CKE1 SA_CKE_1 SB_MA_7
AT33 8
SB_MA_8
AP24 BD33 9
CLK1_MCLK0 AR24
SA_CK_0 SB_MA_9
BB16 10
CLK1_MCLK0# AT21
SA_CK#_0 SB_MA_10
AW33 11
R592 CLK1_MCLK1 SA_CK_1 SYSTEM MEMORY B SB_MA_11
AR21 AY33 12
C
80.6 CLK1_MCLK1# SA_CK#_1 SB_MA_12
BH15 13
1% SB_MA_13
MCH1_SM_RCOMP_MN BG22 AU33 14
SM_RCOMP SB_MA_14
MCH1_SM_RCOMP#_MN BH21
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
SM_RCOMP# MEM1_BBS(2:0)
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
BC16 0
SB_BS_0
R593 MCH1_SM_RCOMP_V_OH_MN BF28 BB17 1
MCH1_SM_RCOMP_V_OL_MN
SM_RCOMP_V_OH SB_BS_1
80.6 BH28 BB33 2
SM_RCOMP_V_OL SB_BS_2
1%
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
P1.8V_AUX
Route as short as possible
R595 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
1K 10nF->100nF MEM1_BDQ(63:0)
1%
C608
100nF
C611
R594 2200nF
10V
10V
nostuff
A 3.01K A
1%
Cantiga SM_RCOMP : 80 ohm to P1.8V_AUX
DRAW DATE TITLE
DDR2 SM_RCOMP# : 80 ohm to VSS
SY.KIM 9/23/2008
BONN-L SAMSUNG
C609 CHECK DEV. STEP
R591 C610 ELECTRONICS
100nF
2200nF
HK.PARK PR MCH_CANTIGA_GM_DDR2
1K 10V
1% 10V nostuff APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS P1.8V_AUX
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
AW16
AW13
BD16
BB24
BB21
BA36
AT13
P1.05V P3.3V P1.05V
BH32
BH31
BH29
BG32
BG31
BG30
BG29
BF32
BF31
BF29
BD32
BD29
BC32
BC29
BB32
BB29
BA32
BA29
AY32
AY29
AW32
AW29
AV32
AV29
AU32
AU29
AT32
AT29
AR32
AR29
AP33
AP32
AP29
AN33
AN32
VCC_SM_35
VCC_SM_34
VCC_SM_33
VCC_SM_32
VCC_SM_31
VCC_SM_30
VCC_SM_29
VCC_SM_28
VCC_SM_27
VCC_SM_26
VCC_SM_25
VCC_SM_24
VCC_SM_23
VCC_SM_22
VCC_SM_21
VCC_SM_20
VCC_SM_19
VCC_SM_18
VCC_SM_17
VCC_SM_16
VCC_SM_15
VCC_SM_14
VCC_SM_13
VCC_SM_12
VCC_SM_11
VCC_SM_10
VCC_SM_9
VCC_SM_8
VCC_SM_7
VCC_SM_6
VCC_SM_5
VCC_SM_4
VCC_SM_3
VCC_SM_2
VCC_SM_NC_7
VCC_SM_NC_6
VCC_SM_NC_5
VCC_SM_NC_4
VCC_SM_NC_3
VCC_SM_NC_2
VCC_SM_NC_1
VCC_SM_1
C586 C587
10000nF 1000nF MCH1_P3.3V_HV_R_MN
3
6.3V 6.3V R47 12.1 2 1
nostuff
1% 30V
C46 BAT54A
100nF
g
10V D1
VCC AXG
VCC HAD
A21 HDMI OPTION
P1.05V_PEG VCC_AXF_1
B21 VCC_SM A32
VCC_AXF_2 VCC_HDA
B22
VCC_AXF_3 P1.05V_PEG P1.05V
n
INSTPAR
C57 2A routing SHORT1
A35
VCC_HV
100nF VCC_HV_1
l
AF48 B35
VCC AXG
10V
AG47
VCC_DMI_1 VCC_HV_2
C35
C54 C53
VCC_DMI_2 VCC_HV_3 10000nF-X5R 10000nF-X5R INSTPAR
u
AH47
VCC_DMI_3 6.3V 6.3V
SHORT2
AH48
P3.3V VCC_DMI_4 P1.05V
a
U46
VCC_PEG_1
B4 U3-4 U47
PEG POWER
VCC_PEG_2 P1.5V
BLM18PG181SN1 U48
s i
C B27
VCC_PEG_3
V47
C
C41
A26
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2 GL40 VCC_PEG_4
VCC_PEG_5
V48 Cantiga : 1.5V
t
C39 R52 B7
C37 100nF
22000nF-X5R
20%
10V
10nF
25V
4 OF 5 VCCA_PEG_BG
AD48
C55
1 BLM18PG181SN1
6.3V
0904-002489 C646 100nF 10V
100nF
m
A25
C56
n
VCCA_DAC_BG 10V
CRT / TV POWER
AA48
C38 C42 C40 VCCA_PEG_PLL 10000nF
22000nF-X5R 100nF 6.3V
20% 10nF
6.3V 10V P1.05V
25V AA47 MCH1_P1.05V_PEG_PLL_MN
a
VCCD_PEG_PLL
e
A24
VCCA_TV_DAC_1
B24
VCCA_TV_DAC_2
F47
VCCA_DPLLA
PLL POWER
B5
P1.5V BLM18PG181SN1
S fid
L48 nostuff
VCCA_DPLLB
M25 EC4 R51
VCCD_TVDAC C51
C593 100nF 220uF 0
C594 AD1 2.5V
C643 100nF
L28
VCCA_HPLL 10V AD
10000nF-X5R 10V
10nF
VCCD_QDAC C542 C541
6.3V
25V 6.3V 10000nF-X5R 100nF
AE1 MCH1_P1.05V_MPLL_MN
VCCA_MPLL 10V
B509 J48
VCCA_LVDS P1.05V
BLM18PG181SN1
BLM18PG181SN1
LVDS POWER
n
AF1 B6
C591 VCCD_HPLL C52 EC5
100nF
C592 L37
VCCD_LVDS_1 100nF 220uF
B 10V
10nF M38
VCCD_LVDS_2 VCC_SM_LF VCC_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK VCCA_SM R551 100 1% C543 10V
2.5V B
AD
AXG SENSE
25V AJ14
VCC_AXG_SENSE 100nF
o
AH14 R550
100 1% 10V
K47 BLM18PG181SN1
VCC_TX_LVDS VSS_AXG_SENSE
VCCA_SM_CK_NCTF_8
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_1
nostuff nostuff
nostuff nostuff
B507 nostuff
R538 R537
VCCA_SM_CK_5
VCCA_SM_CK_4
VCCA_SM_CK_3
VCCA_SM_CK_2
VCCA_SM_CK_1
VCC_SM_CK_4
VCC_SM_CK_3
VCC_SM_CK_2
VCC_SM_CK_1
C
VCC_SM_LF_4
VCC_SM_LF_3
VCC_SM_LF_2
VCC_SM_LF_1
VCC_SM_LF_7
VCC_SM_LF_6
VCC_SM_LF_5
1 1 P1.05V
VCCA_SM_9
VCCA_SM_8
VCCA_SM_7
VCCA_SM_6
VCCA_SM_5
VCCA_SM_4
VCCA_SM_3
VCCA_SM_2
VCCA_SM_1
P1.8V_AUX C544
100nF C545
MCH1_VCC_AXG_SENSE_MN 10V 10000nF-X5R
MCH1_VSS_AXG_SENSE_MN 6.3V
C644
1000nF
AV44
AV21
BB13
BA37
AY5
AM40
AM10
BH20
BG20
BF21
BF20
AM28
AM26
AM25
AM24
AM23
AL25
AL24
AL23
AP28
AP25
AN28
AN25
AN24
AT16
AR20
AR17
AR16
AP20
AP17
AP16
AN20
AN17
6.3V
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
AM46
AM12
AM34
AM36
AM39
AM41
AM43
AN42
AN47
AR25
AR28
AR33
AR46
AR48
AU16
AU21
AU36
AU38
AU41
AU43
AU48
AN11
AN13
AN16
AN21
AN29
AN37
AN40
AK15
AP21
AV10
AV12
AV25
AV28
AT10
AT12
AT17
AT20
AT24
AT28
AT37
AT39
AT42
AL33
AL48
AJ25
AJ28
AJ34
AJ37
AJ39
AJ42
AJ47
AM1
AM6
AM9
AN7
AN9
AR2
AU2
AU7
AP2
AT6
AT8
AL3
AJ7
D D
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_90
VSS_91
VSS_92
VSS_93
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
A12
VSS_1
A15 AV3
VSS_2 VSS_136
A18 AV33
VSS_3 VSS_137
A20 AV40
VSS_4 VSS_138
A23 AV43
VSS_5 VSS_139
A29 VSS AV46
VSS_6 VSS_140
A31 AV6
VSS_7 VSS_141
A34 F38 M44 AV8
VSS_8 VSS_241 VSS_295 VSS_142
AA1 F44 M6 AW17
VSS_9 VSS_242 VSS_296 VSS_143
AA10 F46 N11 AW2
VSS_10 VSS_243 VSS_297 VSS_144
AA12 F5 N13 AW20
VSS_11 VSS_244 VSS_298 VSS_145
AA14 G11 N16 AW21
g
VSS_12 VSS_245 VSS_299 VSS_146
AA26 G13 N20 AW37
VSS_13 VSS_246 VSS_300 VSS_147
AA35 G16 N25 AW47
VSS_14 VSS_247 VSS_301 VSS_148
AA38 G21 N29 AY11
VSS_15 VSS_248 VSS_302 VSS_149
AA41 G24 N32 AY24
VSS_16 VSS_249 VSS_303 VSS_150
AA44 G25 N39 AY42
n
VSS_17 VSS_250 VSS_304 VSS_151
AA7 G41 N42 AY46
VSS_18 VSS_251 VSS_305 VSS_152
AB21 G47 N47 AY7
VSS_19 VSS_252 U3-5 VSS_306 VSS_153
l
AB24 G9 N7 B23
VSS_20 VSS_253 VSS_307 VSS_154
AB26 H1 P1 B26
VSS_21 VSS_254 GL40 VSS_308 VSS_155
u
AB28 H17 P28 B34
VSS_22 VSS_255 VSS_309 VSS_156
AB33 H28 P3 B36
VSS_23 VSS_256
5 OF 5 VSS_310 VSS_157
a
AB47 H29 P33 B39
VSS_24 VSS_257 VSS_311 VSS_158
AC15 H33 P36 B41
VSS_25 VSS_258 VSS_312 VSS_159
AC2 H37 P46 B8
s i
C AC25
VSS_26
H40
VSS_259 0904-002489 VSS_313
R17
VSS_160
B9
C
VSS_27 VSS_260 VSS_314 VSS_161
AD12 H46 R21 BA13
VSS_28 VSS_261 VSS_315 VSS_162
t
AD2 H5 R24 BA16
VSS_29 VSS_262 VSS_316 VSS_163
AD38 J12 R3 BA2
VSS_30 VSS_263 VSS_317 VSS_164
AD41 J21 R46 BA20
VSS_31 VSS_264 VSS_318 VSS_165
AD44 J24 T29 BA28
VSS_32 VSS_265 VSS_319 VSS_166
m
AD47 J25 T35 BA33
n
VSS_33 VSS_266 VSS_320 VSS_167
AD5 J36 T38 BA38
VSS
VSS
VSS_34 VSS_267 VSS_321 VSS_168
AD9 J38 T41 BA46
VSS
VSS_35 VSS_268 VSS_322 VSS_169
AE10 J43 T44 BA5
VSS
VSS_36 VSS_269 VSS_323 VSS_170
AE13 J5 T47 BB11
a
VSS_37 VSS_270 VSS_324 VSS_171
e
AE2 J7 U24 BB25
VSS_38 VSS_271 VSS_325 VSS_172
AE28 K16 U25 BB37
VSS_39 VSS_272 VSS_326 VSS_173
AE34 K2 U28 BB40
VSS_40 VSS_273 VSS_327 VSS_174
AE36 K20 U29 BB47
VSS_41 VSS_274 VSS_328 VSS_175
AE39 K24 U35 BB8
S fid
VSS_42 VSS_275 VSS_329 VSS_176
AE42 K28 U38 BC13
VSS_43 VSS_276 VSS_330 VSS_177
AE7 K29 U41 BC17
VSS_44 VSS_277 VSS_331 VSS_178
AF2 K32 U44 BC20
VSS_45 VSS_278 VSS_332 VSS_179
AF21 L12 V46 BC3
VSS_46 VSS_279 VSS_333 VSS_180
AF24 L13 W15 BC33
VSS_47 VSS_280 VSS_334 VSS_181
AF26 L24 W34 BC38
VSS_48 VSS_281 VSS_335 VSS_182
AF34 L25 Y11 BC43
VSS_49 VSS_282 VSS_336 VSS_183
AF47 L33 Y2 BC9
VSS_50 VSS_283 VSS_337 VSS_184
AG20 L36 Y20 BD11
VSS_51 VSS_284 VSS_338 VSS_185
n
AG23 L39 Y23 BD25
VSS_52 VSS_285 VSS_339 VSS_186
AG28 L42 Y25 BD28
VSS_53 VSS_286 VSS_340 VSS_187
AH11 L47 Y28 BD36
VSS_54 VSS_287 VSS_341 VSS_188
B AH2
VSS_55
L5
VSS_288 VSS_342
Y35
VSS_189
BD41 B
AH21 L8 Y38 BD46
VSS_56 VSS_289 VSS_343 VSS_190
o
AH24 M10 Y41 BD6
VSS_57 VSS_290 VSS_344 VSS_191
AH26 M17 Y44 BE4
VSS_58 VSS_291 VSS_345 VSS_192
AH33 M2 Y47 BF12
VSS_59 VSS_292 VSS_346 VSS_193
AH35 M21 Y5 BF24
VSS_60 VSS_293 VSS_347 VSS_194
AH38 M41 Y8 BF26
VSS_61 VSS_294 VSS_348 VSS_195
AH41 BF34
C
VSS_62 TV & LVDS VSS_196
AH44 BF37
VSS_63 VSS VSS SCB VSS NCTF VSS VSS_197
AH5 BF44
VSS_64 VSS_198
AH8 BF9
VSS_65 VSS_199
AJ10 BG10
VSSA_DAC_BG
VSS_66 VSS_200
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
AJ13 BG13
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_67 VSS_201
VSSA_LVDS
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
AJ2 BG14
VSS_68 VSS_202
AJ20 BG15
VSS_349
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_69 VSS_203
AJ24 BG17
VSS_70 VSS_204
BG19
VSS_205
B25
J47
A3
A48
BH1
BH48
C1
AA17
AB29
AB32
AC19
AF29
AF32
AJ17
AJ30
AL17
AL20
AM29
U17
U23
U26
V20
V32
AJ6
BG21
BG28
BG33
BG36
BG40
BG42
BG6
BH23
BH25
BH38
BH8
C11
C14
C17
C20
C26
C28
C32
C37
C38
C43
C6
E13
E16
E24
E25
E40
E8
F20
F24
F28
F29
F3
F32
F36
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR MCH_CANTIGA_GM_DDR2
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS DDR SO-DIMM #0
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS Height : 5.2mm (Reverse)
EXCEPT AS AUTHORIZED BY SAMSUNG.
D MEM1_ADQ(63:0) D
P0.9V
MEM1_AMA(14:0) R607
DDR1-1 0 56
DDR2-SODIMM-200P-RVS ME POWER RAIL UNDER ME ENABLE 1 R599 56
2 R611 56
MEM1_AMA(14:0)
1/2 3 R596 56
0 102
A0 DQ0
5 0 4 R606 56
1 101
A1 DQ1
7 1 5 R598 56
2 100 17 2 P1.8V_AUX 6 R609 56
A2 DQ2
3 99
A3 DQ3
19 3 7 R612 56
4 98 4 4 8 R604 56
g
A4 DQ4
5 97
A5 DQ5
6 5 DDR1-2 9 R601 56
6 94
A6 DQ6
14 6
DDR2-SODIMM-200P-RVS 10 R553 56
7 92 16 7 11 R608 56
8 93
A7
A8
DQ7
DQ8
23 8 2/2 12 R602 56
9 91 25 9 112 18 13 R560 56
n
A9 DQ9 VDD1 VSS16
10 105
A10_AP DQ10
35 10 111
VDD2 VSS17
24 14 R610 56
11 90 37 11 117 41
A11 DQ11 VDD3 VSS18
l
12 89 20 12 96 53 R558 56
A12 DQ12 P3.3V VDD4 VSS19 MEM1_CS0#
13 116
A13 DQ13
22 13 95
VDD5 VSS20
42
MEM1_CS1# R557 56
u
14 86 36 14 118 54
A14 DQ14 VDD6 VSS21
84 38 15 81 59 R603 56
A15 DQ15 VDD7 VSS22 MEM1_CKE0
R613
a
85 43 16 82 65 56
MEM1_ABS(2) A16_BA2 DQ16
45 17 C527 C528 87
VDD8 VSS23
60 MEM1_CKE1
DQ17 100nF VDD9 VSS24
107 55 18 2200nF 103 66 R561 56
s i
C MEM1_ABS(0) 106
BA0 DQ18
57 19
10V 10V 88
VDD10 VSS25
127
MEM1_ODT0
R556 56
C
MEM1_ABS(1) BA1 DQ19
44 20 104
VDD11 VSS26
139 MEM1_ODT1
DQ20 nostuff VDD12 VSS27
t
110 46 21 128 R597 56
MEM1_CS0# 115
S0* DQ21
56 22 199
VSS28
145 MEM1_ABS(0) R605 56
MEM1_CS1# S1* DQ22 VDDSPD VSS29 MEM1_ABS(1)
DQ23
58 23
VSS30
165
MEM1_ABS(2) R600 56
30 61 24 83 171
CLK1_MCLK0 CK0 DQ24 NC1 VSS31
R554
m
32 63 25 120 172 56
CLK1_MCLK0# MEM1_ACAS#
n
CK0* DQ25 NC2 VSS32
164 73 26 50 177 R559 56
CLK1_MCLK1 166
CK1 DQ26
75 27 69
NC3 VSS33
187 MEM1_ARAS# R555 56
CLK1_MCLK1# 79
CK1* DQ27
62 28 163
NC4 VSS34
178
MEM1_AWE#
MEM1_CKE0 80
CKE0 DQ28
64 29
NCTEST VSS35
190
a
MEM1_CKE1 CKE1 DQ29 VSS36
e
74 30 1 9
113
DQ30
76 31
MEM1_VREF VREF VSS37
21
MEM1_ACAS# 108
CAS* DQ31
123 32
C671 C670 201
VSS38
33
MEM1_ARAS# 109
RAS* DQ32
125 33
100nF 2200nF
202
GND0 VSS39
155
MEM1_AWE# WE* DQ33
135 34
10V 10V GND1 VSS40
34
S fid
DQ34 nostuff VSS41
R522 10K 1% MEM3_CHA_SA0_MN 198
SA0 DQ35
137 35 47
VSS1 VSS42
132
R523 10K 1% MEM3_CHA_SA1_MN 200
SA1 DQ36
124 36 133
VSS2 VSS43
144
SMB3_CLK 197
SCL DQ37
126 37 183
VSS3 VSS44
156 Place one cap close to every 2 pull-up resistors terminated to P0.9V
195 134 38 77 168
SMB3_DATA SDA DQ38
136 39 12
VSS4 VSS45
2
DQ39 VSS5 VSS46
114 141 40 48 3
MEM1_ODT0 119
ODT0 DQ40
143 41 184
VSS6 VSS47
15
MEM1_ODT1 ODT1 DQ41
151 42 78
VSS7 VSS48
27
MEM1_ADM(7:0) 0 10
DQ42
153 43 71
VSS8 VSS49
39
DM0 DQ43 VSS9 VSS50 Place one cap close to every 2 pull-up resistors terminated to P0.9V
n
1 26 140 44 72 149
DM1 DQ44 VSS10 VSS51 P0.9V
2 52 142 45 121 161
DM2 DQ45 VSS11 VSS52
3 67 152 46 122 28
DM3 DQ46 VSS12 VSS53
B 4 130
DM4 DQ47
154 47 196
VSS13 VSS54
40 B
5 147 157 48 193 138
DM5 DQ48 VSS14 VSS55
o
6 170 159 49 8 150
DM6 DQ49 VSS15 VSS56 C620 C621 C618 C617 C567 C568 C619
7 185 173 50 162
DM7 DQ50 VSS57 100nF 100nF 100nF 100nF 100nF 100nF 100nF
10V
175 51
MEM1_ADQS(7:0) 0 13
DQ51
158 52 10V 10V 10V 10V 10V 10V
DQS0 DQ52 3709-001341
1 31 160 53
DQS1 DQ53
2 51 174 54
C
DQS2 DQ54
3 70 176 55
DQS3 DQ55
4 131 179 56
DQS4 DQ56
5 148 181 57
DQS5 DQ57
6 169 189 58
DQS6 DQ58 ME POWER RAIL UNDER ME ENABLE
7 188 191 59
DQS7 DQ59
180 60
MEM1_ADQS#(7:0) 0 11
DQ60
182 61
DQS*0 DQ61
1 29
DQS*1 DQ62
192 62 Place near SO-DIMM0
2 49 194 63 P1.8V_AUX
DQS*2 DQ63
3 68
DQS*3
4 129
DQS*4
5 146
6 167
DQS*5 EC502 C623 C616 C566 C615 C624 C614 C622 C565 C626
7 186
DQS*6 220uF 2200nF 2200nF 2200nF 2200nF 2200nF 100nF 100nF 100nF 100nF
DQS*7 2.5V AD 10V 10V 10V 10V 10V 10V 10V 10V 10V
3709-001341
nostuff
Tyco/Foxcn : 3709-001341
Suyin : 3709-001502
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR SODIMM_DDR2
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY. DDR SO-DIMM #1
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. Height : 9.2mm (Reverse)
D D
MEM1_BDQ(63:0)
ME POWER RAIL UNDER ME ENABLE P0.9V
MEM1_BMA(14:0) 0 R626 56
1 R623 56
DDR2-1 2 R627 56
P1.8V_AUX 3 R622 56
DDR2-SODIMM-200P-RVS 4 R628 56
MEM1_BMA(14:0)
1/2 DDR2-2 5 R615 56
0 102
A0 DQ0
5 0
DDR2-SODIMM-200P-RVS 6 R629 56
1 101 7 1 7 R625 56
g
A1 DQ1 2/2
2 100
A2 DQ2
17 2 8 R619 56
3 99
A3 DQ3
19 3 112
VDD1 VSS16
18 9 R617 56
4 98
A4 DQ4
4 4 111
VDD2 VSS17
24 10 R616 56
5 97
A5 DQ5
6 5 117
VDD3 VSS18
41 11 R630 56
6 94 14 6 96 53 12 R614 56
n
A6 DQ6 P3.3V VDD4 VSS19
7 92
A7 DQ7
16 7 95
VDD5 VSS20
42 13 R566 56
8 93
A8 DQ8
23 8 118
VDD6 VSS21
54 14 R631 56
l
9 91 25 9 81 59
A9 DQ9 VDD7 VSS22
10 105
A10_AP DQ10
35 10 82
VDD8 VSS23
65
MEM1_CS2# R567 56
u
11 90 37 11 87 60 R563 56
12 89
A11 DQ11
20 12 C529 C530 103
VDD9 VSS24
66 MEM1_CS3#
A12 DQ12 100nF VDD10 VSS25
R618
a
13 116 22 13 2200nF 88 127 56
14 86
A13 DQ13
36 14 nostuff 10V 10V 104
VDD11 VSS26
139 MEM1_CKE2 R632 56
A14 DQ14 nostuff VDD12 VSS27 MEM1_CKE3
84 38 15 128
s i
C 85
A15 DQ15
43 16 199
VSS28
145 R568 56
C
MEM1_BBS(2) A16_BA2 DQ16
45 17
VDDSPD VSS29
165 MEM1_ODT2 R564 56
DQ17 VSS30 MEM1_ODT3
t
107 55 18 83 171
MEM1_BBS(0) 106
BA0 DQ18
57 19 120
NC1 VSS31
172 R621 56
MEM1_BBS(1) BA1 DQ19 NC2 VSS32 MEM1_BBS(0)
DQ20
44 20 50
NC3 VSS33
177
MEM1_BBS(1) R624 56
110 46 21 69 187 R620 56
MEM1_CS2# S0* DQ21 NC4 VSS34 MEM1_BBS(2)
m
115 56 22 163 178
MEM1_CS3#
n
S1* DQ22 NCTEST VSS35
58 23 190 R562 56
30
DQ23
61 24 1
VSS36
9 MEM1_BCAS# R569 56
CLK1_MCLK2 CK0 DQ24 MEM1_VREF VREF VSS37 MEM1_BRAS#
32 63 25 21 R565 56
CLK1_MCLK2# 164
CK0* DQ25
73 26 201
VSS38
33 MEM1_BWE#
a
CLK1_MCLK3 CK1 DQ26 C674 GND0 VSS39
e
CLK1_MCLK3# 166
CK1* DQ27
75 27
100nF C675 202
GND1 VSS40
155
79 62 28 2200nF 34
MEM1_CKE2 80
CKE0 DQ28
64 29
10V 10V 47
VSS41
132
MEM1_CKE3 CKE1 DQ29
74 30 133
VSS1 VSS42
144
DQ30 nostuff VSS2 VSS43
113 76 31 183 156
MEM1_BCAS#
S fid
P3.3V CAS* DQ31 VSS3 VSS44
108 123 32 77 168
MEM1_BRAS# 109
RAS* DQ32
125 33 12
VSS4 VSS45
2
MEM1_BWE# WE* DQ33
135 34 48
VSS5 VSS46
3
DQ34 VSS6 VSS47
R42 10K 1% MEM3_CHB_SA0_MN 198
SA0 DQ35
137 35 184
VSS7 VSS48
15
R41 10K 1% MEM3_CHB_SA1_MN 200
SA1 DQ36
124 36 78
VSS8 VSS49
27
197 126 37 71 39
SMB3_CLK 195
SCL DQ37
134 38 72
VSS9 VSS50
149
SMB3_DATA SDA DQ38
136 39 121
VSS10 VSS51
161
DQ39 VSS11 VSS52
114 141 40 122 28
MEM1_ODT2 ODT0 DQ40 VSS12 VSS53
n
119 143 41 196 40 Place one cap close to every 2 pull-up resistors terminated to P0.9V
MEM1_ODT3 ODT1 DQ41
151 42 193
VSS13 VSS54
138 P0.9V
MEM1_BDM(7:0) 0 10
DQ42
153 43 8
VSS14 VSS55
150
DM0 DQ43 VSS15 VSS56
B 1 26
DM1 DQ44
140 44
VSS57
162 B
2 52 142 45
DM2 DQ45 C632 C570 C633 C569 C634 C631 C635
o
3 67 152 46
3709-001529
DM3 DQ46 100nF 100nF 100nF 100nF 100nF 100nF 100nF
10V
4 130 154 47
DM4 DQ47 10V 10V 10V 10V 10V 10V
5 147 157 48
DM5 DQ48
6 170 159 49
DM6 DQ49
7 185 173 50
DM7 DQ50
175 51
C
MEM1_BDQS(7:0) 0 13
DQ51
158 52
DQS0 DQ52
1 31 160 53
DQS1 DQ53
2 51 174 54
DQS2 DQ54
3 70 176 55
DQS3 DQ55
4 131 179 56
DQS4 DQ56
5 148 181 57
DQS5 DQ57 P1.8V_AUX
6 169
DQS6 DQ58
189 58 Place near SO-DIMM1
7 188 191 59
DQS7 DQ59
180 60
MEM1_BDQS#(7:0) 0 11
DQ60
182 61
DQS*0 DQ61
1 29 192 62 EC503
2 49
DQS*1 DQ62
194 63
C627 C628 C630 C629 C625 C43 C44 C36 C45
DQS*2 DQ63 220uF 2200nF 2200nF 2200nF 2200nF 2200nF 100nF 100nF 100nF 100nF
3 68 2.5V AD
DQS*3 10V 10V 10V 10V 10V 10V 10V 10V 10V
4 129 nostuff
DQS*4
5 146
DQS*5
6 167
DQS*6
7 186
DQS*7
3709-001529
A A
Foxcn : 3709-001529
Suyin : 3709-001503 DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR SODIMM_DDR2
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Internal VR Strap
INTVRMEN Pull up C136 Y1
VccSus1_05, VccSus1_5, VccCL1_5 32.768KHz
0.007nF
D VccLAN1_05, VccCL1_05 D
P3.3V
1
R699
10M R745 10K 1%
4
KBC3_CPURST#
KBC3_A20G R725 10K 1%
2801-003856
C135
CHP3_XTALOUT_MN
CHP3_XTALIN_MN
0.007nF
P3.3V_MICOM
U6-1
NH82801IBM
g
PRTC_BAT
PRTC_BAT 1/5
2
CHP_INTRUDER3_R_MN LPC3_LAD(3:0)
C23 K5 0
D2 R715 1M RTCX1 FWH0_LAD0
49-D3 C24 K4 1
BAT54C CHP3_INTRUDER# RTCX2 FWH1_LAD1
L6
n
2
3
C741 FWH2_LAD2
A25 K2 3
1000nF-X5R CHP3_RTCRST# F20
RTCRST# FWH3_LAD3
1
RTC
LPC
48-B2
R101 CHP3_ME_RTCRST# SRTCRST#
l
300K 49-B3 C22 K3
CHP3_INTRUDER# 49-D3
INTRUDER# FWH4_LFRAME# LPC3_LFRAME#
P1.05V
u
B22 J3
INTVRMEN LDRQ0#
A22 J1
R85 LAN100_SLP LDRQ1#_GPIO23
RTC1_BATT_R_MN
20K 1%
a
48-B2
CHP3_RTCRST# E25 N7
GLAN_CLK A20GATE
AJ27
KBC3_A20G R80
s i
C R712 A20M# CPU1_A20M# 56 C
0 C13
LAN_RTCSYNC
AJ25
DPRSTP# CPU1_DPRSTP#
t
49-B3 F14 AE23
CHP3_ME_RTCRST# G13
LAN_RXD0 DPSLP# CPU1_DPSLP#
LAN_RXD1 R83 56
LAN / GLAN
J519 D14 AJ26 CPU1_FERR#_R_MN
RTC1_BATT_MN C134 C85 LAN_RXD2 FERR# CPU1_FERR#
R106 1K 1000nF-X5R 10000nF
C767
m
1 D13 AD22
CPU1_PWRGDCPU
n
PWR1 6.3V 6.3V
For RTC Reset LAN_TXD0 CPUPWRGD
2 0.022nF D12
PWR2 LAN_TXD1
3 nostuff 50V E13 AF25
GND LAN_TXD2 IGNNE# CPU1_IGNNE#
CPU
B10 AE22
a
GLAN_DOCK#_GPIO56 INIT# CPU1_INIT#
e
4309-001022 CHP3_COMPIO_MN AG25
P1.5V INTR CPU1_INTR P1.05V
1608 B28 L3
RTC Battery Holder GLAN_COMPI RCIN# KBC3_CPURST#
R77 24.9 1% B27
GLAN_COMPO
4309-001022 AF23
R741 22 AF6
NMI
AF24 CPU1_NMI
HDA3_AUD_BCLK CPU1_SMI# R81
S fid
HDA_BIT_CLK SMI#
R739 22 HDA3_BCLK_R_MN AH4
HDA3_AUD_SYNC HDA3_SYNC_R_MN
HDA_SYNC
AH27
56
STPCLK# CPU1_STPCLK#
HDA3_AUD_RST# R742 22 AE7
HDA_RST#
HDA3_RST#_R_MN AG26 CPU1_THRMTRIP#_RR_MN R84 54.9 1%
THRMTRIP# CPU1_THRMTRIP#
AF4
HDA3_AUD_SDI0 AG4
HDA_SDIN0
AG27
IHDA
HDA_SDIN1 PECI
AH3
HDA_SDIN2
Place 56 ohm resistor within 2" of ICH9M
AE5
P3.3V HDA_SDIN3 Place PU resistor within 2" of 56ohm res.
R740
n
22 AG5
HDA3_AUD_SDO HDA_SDOUT
AH11
HDA3_SDO_R_MN SATA4RXN
R721 AG7
HDA_DOCK_EN#_GPIO33 SATA4RXP
AJ11
B 10K AE8
HDA_DOCK_RS#_GPIO34 SATA4TXN
AG12 B
1%
AF12
SATA4TXP
o
AG8
CHP3_SATALED# SATALED#
AH9
SATA5RXN
SAT1_RXN0 C724 10nF 25V SAT1_HDD_RXN_C_MN AJ16
SATA0RXN SATA5RXP
AJ9
SATA
C726 10nF 25V SAT1_HDD_RXP_C_MN AH16 AE10
SAT1_RXP0 SAT1_HDD_TXN_C_MN AF17
SATA0RXP SATA5TXN
AF10
SAT1_TXN0 SATA0TXN SATA5TXP
SATA
C723 10nF 25V SAT1_HDD_TXP_C_MN AG17
C
SAT1_TXP0 C722 10nF 25V
SATA0TXP
AH18
SAT1_ODD_RXN_C_MN AH13
SATA_CLKN
AJ18
CLK1_SATA#
SAT1_RXN1 C745 10nF 25V SAT1_ODD_RXP_C_MN AJ13
SATA1RXN SATA_CLKP CLK1_SATA
SAT1_RXP1 SATA1RXP
SAT1_TXN1 C746 10nF 25V SAT1_ODD_TXN_C_MN AG14
SATA1TXN SATARBIAS#
AJ7
C725 10nF 25V SAT1_ODD_TXP_C_MN AF14 AH7
SAT1_TXP1 SATA1TXP SATARBIAS SAT1_ARBIAS_MN
C727 10nF 25V
0904-002378
R719
24.9
1%
SATA Cap. Place ment :
Distance b/w the ICH9-M & cap on the "P" signal should be identical
distance b/w the ICH9-M & cap on the "N" signal same pair.
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR ICH_9M_B
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
U6-2 P3.3V
NH82801IBM
g
2/5
D11 F1 PCI3_REQ0#_MN 10K R749
AD0 PCI REQ0#
C8 G4 PCI3_GNT0#_MN
AD1 GNT0#
D9 B6
AD2 REQ1#_GPI050
E12 A7 R731
n
AD3 GNT1#_GPIO51
E9 F13 1K
AD4 REQ2#_GPIO52
C9 F12 1%
AD5 GNT2#_GPIO53
l
E10 E6
P3.3V AD6 REQ3#_GPIO54
B7 F6
AD7 GNT3#_GPIO55
u
C7
AD8
C5 D8
AD9 C_BE0#
a
G11 B4
AD10 C_BE1#
R724 10K F8 D6
CHP3_SERIRQ F11
AD11 C_BE2#
A5
s i
C R726 10K E7
AD12 C_BE3# C
PCI3_CLKRUN# A3
AD13
D3 PCI3_IRDY#_MN R751 10K
AD14 IRDY#
t
D2 E3
AD15 PAR
F10 R1
AD16 PCIRST#
LPC option ; These are used with LPC D5
AD17 DEVSEL#
C6 PCI3_EDVSEL#_MN R734 10K
D10
AD18 PERR#
E4 PCI3_PERR#_MN R748 10K
R752
m
B3 C2 PCI3_PCLK#_MN 10K
n
AD19 PLOCK#
F7
AD20 SERR#
J4 PCI3_SERR#_MN R728 10K
C3
AD21 STOP#
A4 PCI3_STOP#_MN R737 10K
F3
AD22 TRDY#
F5 PCI3_TRDY#_MN R732 10K
F4 D7 PCI3_FRAME#_MN R733 10K
a
AD23 FRAME#
e
C1
AD24
G7 C14 R99 0
H7
AD25 PLTRST#
D4
PLT3_RST#
D1
AD26 PCICLK
R2
CLK3_PCLKICH
AD27 PME#
G5 R122
S fid
P3.3V AD28
H6 100K
AD29
G1 1%
AD30
H3
AD31
R729 10K CHP3_PIRGA#_MN J5
PIRQA# PIRQE#_GPIO2
H4 Boot BIOS Select
R750 10K CHP3_PIRGB#_MN E1 Interrupt I/F K6
PIRQB# PIRQF#_GPIO3
R730 10K CHP3_PIRGC#_MN J6
PIRQC# PIRQG#_GPIO4
F2 BIOS PCI3_GNT0# SPI3_CS1#
R735 10K CHP3_PIRGD#_MN C4
PIRQD# PIRQH#_GPIO5
G2
LPC HIGH HIGH
n
N29 E29
PEX1_MINIRXN1 N28
PERN1 PCI - Express PERN5
E28 SPI LOW HIGH
PEX1_MINIRXP1 PERP1 PERP5
PEX1_MINITXN1 C114 100nF 10V PEX1_MINITXN1_C_MN P27
PETN1 PETN5
F27
PCI HIGH LOW
B C115 100nF 10V PEX1_MINITXP1_C_MN P26 F26 P3.3V B
PEX1_MINITXP1 PETP1 PETP5
o
L29 C29
PERN2 PERN6_GLAN_RXN
L28 C28 nostuff
PERP2 PERP6_GLAN_RXP
M27 D27 R695
PETN2 PETN6_GLAN_TXN
M26 D26 1K
PETP2 PETP6_GLAN_TXP P3.3V
1%
J29
C
PERN3
J28
PERP3
iTPM Disable
K27 R692
PETN3 SPI
K26 D23 SPI3_CLK_R_MN R694 12.1 1%
PETP3 SPI_CLK HST3_SPI3_CLK 10K
SPI_CS0#
D24 SPI3_CS0#_R_MN R696 12.1 1%
HST3_SPI3_CS#
G29 F23
PEX1_LAN_RXN4 PERN4 SPI_CS1#_GPIO58_CLGPIO6
PEX1_LAN_RXP4 G28
PERP4 SPI_MOSI
D25 SPI3_MOSI_R_MN R693 12.1 1%
HST3_SPI3_DI
100nF C116 10V PEX1_GLAN_TXN4__C_MN H27 E23
PEX1_LAN_TXN4 100nF C117 10V PEX1_GLAN_TXP4_C_MN H26
PETN4 SPI_MISO HST3_SPI3_DO
PEX1_LAN_TXP4 PETP4
0904-002378
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR ICH_9M_B
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. P3.3V_AUX P3.3V_AUX
R714
U6-3
NH82801IBM
2.2K
2.2K
10K
1%
P3.3V_AUX 3/5
D P3.3V_AUX G16 V27
D
SMB3_CLK A13
SMBCLK DMI0RXN
V26
DMI1_RXN_0
SMB3_DATA SMBDATA DMI0RXP DMI1_RXP_0
R103
R102
SMB
R104 10K CHP3_LINKALERT#_MN E17 U29
SMB3_ALERT# CHP3_SMLINK0_MN C17
LINKALERT#_GPIO60_CLGPIO4 DMI0TXN
U28 DMI1_TXN_0
R710 CHP3_SMLINK1_MN B18
SMLINK0 DMI0TXP DMI1_TXP_0
P3.3V_AUX 10K SMLINK1
R717 1K 1% Y27
PEX3_WAKE# 1%
F19
DMI1RXN
Y26
DMI1_RXN_1
RI# DMI1RXP
W29
DMI1_RXP_1
R4
DMI1TXN
W28
DMI1_TXN_1
R711 CHP3_SUSSTAT# SUS_STAT#_LPCPD# DMI1TXP DMI1_TXP_1
g
P3.3V_AUX SMB3_ALERT# SMALERT#_GPIO11 DMI2TXP DMI1_TXP_2
A14 AD27
SYS GPIO
CHP3_PCISTP# E19
STP_PCI#_GPIO15 DMI3RXN
AD26
DMI1_RXN_3
CHP3_CPUSTP# STP_CPU#_GPIO25 DMI3RXP
AC29 DMI1_RXP_3
R718 DMI3TXN DMI1_TXN_3
L4 AC28
n
10K PCI3_CLKRUN# CLKRUN#_GPIO32 DMI3TXP DMI1_TXP_3
1%
R716 0 PEX3_WAKE#_R_MN E20 T26
PEX3_WAKE# WAKE# DMI_CLKN CLK1_PCIEICH#
l
M5 T25 P1.5V
nostuff CHP3_SERIRQ AJ23
SERIRQ DMI_CLKP CLK1_PCIEICH
THM3_ALERT# THRM#
u
AF29
DMI_ZCOMP R76 24.9 1%
D21 AF28
VRM3_CPU_PWRGD VRMPWRGD DMI_IRCOMP
1608
a
nostuff A20 F24 P3.3V
PU : No Reboot Mode TP8 CL_CLK0 CHP3_CL_CLK_0
C740 C739 nostuff B19
s i
C 0.1nF 1nF C16
CL_CLK1 C
50V 50V CHP3_SLPS3# E16
SLP_S3#
F22
CHP3_SLPS4# SLP_S4# CL_DATA0 CHP3_CL_DATA_0 R697
t
G17 C19 3.24K
For ESD P3.3V_AUX CHP3_SLPS5# SLP_S5# CL_DATA1
1%
Controller Link
C10 C25
S4_STATE#_GPIO26 CL_VREF0
G20 A19
KBC3_PWRGD PWROK CL_VREF1 C704
m
R698
n
100nF
R723 M2 F21 453
10K CHP3_DPRSLPVR CHP3_CL_RST_0#
DPRSLPVR_GPIO16 CL_RST0# 10V
R713 B13 D18 1%
Power MGT
10K BATLOW# CL_RST1#
1% 1% CHP3_BATLOW#_MN
R3 A16
a
KBC3_PWRBTN# PWRBTN# MEM_LED_GPIO24
e
D20 C18 CHP3_SUSPWR_ACK
LAN_RST# ALERT#_GPIO10
C11
R105 100 1% NETDETECT_GPIO14 KBC3_AC_PRESENT
D22 C20
P3.3V KBC3_RSMRST# R5
RSMRST# WOL_EN_GPIO9 CHP3_WOL_EN
34-B3,48-C2
CLK3_PWRGD CK_PWRGD
AC5
R100 USB3_P0-
S fid
USBP0N
10K R6 AC4
1% KBC3_PWRGD CLPWROK USBP0P
AD3 USB3_P0+
USBP1N
B16 AD2
R98 10K 1% SLP_M# USBP1P
AC1
CHP3_BIOSWP# AG19
USBP2N
AC2
USB3_P2-
nostuff
KBC3_EXTSMI# AH21
TACH1_GPIO1 USBP2P
AA5
USB3_P2+
R727 10K 1% nostuff CHP3_BIOSWP# AG21
TACH2_GPIO6 EHCI0 USBP3N
AA4
AUD3_SPKR P3.3V KBC3_RUNSCI# A21
TACH3_GPIO7 USBP3P
AB2
KBC3_WAKESCI# GPIO8 USBP4N USB3_MMC- USB0, 6 : Right port (Sub board)
C12 AB3
R736 4.7K LANPHYPC_GPIO12 USBP4P USB3_MMC+ USB1 : WIMAX
n
C21 AA1
SMB3_DATA AE18
ENGDET_GPIO13 USBP5N
AA2
USB3_BLUETOOTH- USB2 : Left single port
TACH0_GPIO17 USBP5P USB3_BLUETOOTH+
R744 CHP3_GPIO18 K1
GPIO18 USBP6N
W5
USB3_P6- USB3 : HSDPA
B R709 4.7K
10K AF8 W4 B
SMB3_CLK CHP3_GPIO20 GPIO20 USBP6P USB3_P6+ USB4 : 3-in-1
1% AJ22 Y3
CHP3_BIOS_CRI# SCLOCK_GPIO22 USBP7N USB5 : Bluetooth
o
GPIO
A9 Y2
SATA_PWR_EN0# D19 QRT_STATE0_GPIO27 USBP7P USB7 : Express USB
W1
CHP3_SATACLKREQ#
SATA_PWR_EN1#
L1
QRT_STATE1_GPIO28 USBP8N
W2
USB3_CAMERA-
CHP3_SATACLKREQ# SATACLKREQ#_GPIO35 USBP8P USB3_CAMERA+ USB8 : Camera
AE19 V2 USB10 : eSATA/USB conn
P3.3V SLOAD_GPIO38 EHCI1 USBP9N
USB
R690 10K 1% CHP3_SDATAOUT0_MN AG22
SDATAOUT0_GPIO39 USBP9P
V3
R708 10K 1% CHP3_SDATAOUT1_MN AF21 U5
C
AH24
SDATAOUT1_GPIO48 USBP10N
U4 USB3_P10-
GPIO49 USBP10P USB3_P10+
R120 10K 1% CHP3_GPIO57_MN A8
GPIO57_CLGPIO5 USBP11N
U1
iTPM Disable USBP11P
U2
nostuff M7
AUD3_SPKR AJ24
SPKR
N4
MCH3_ICHSYNC# B21
MCH_SYNC# OC0#_GPIO59
N5
TP3 OC1#_GPIO40
MISC
AH20 N6
P3.3V PWM0 OC2#_GPIO41 P3.3V
AJ20 P6
PWM1 OC3#_GPIO42
AJ21 M1
PWM2 OC4#_GPIO43
N2
P3.3V OC5#_GPIO29
H1 M4
CLK3_ICH14 CLK14 OC6#_GPIO30
Clocks
AF3 M3
R746 R720 CLK3_USB48 CLK48 OC7#_GPIO31
N3
P3.3V OC8#_GPIO44
10K 10K R82 P1 N1
SUSCLK OC9#_GPIO45
1% 1% nostuff P5
10K OC10#_GPIO46 Int GFX Select
nostuff R691 10K 1% AH23
SATA0GP_GPIO21 OC11#_GPIO47
P3 CHP3_EXTGFX_SEL_MN R743 1K 1%
R707 10K 1% AF19
GPIO
SATA
SATA1GP_GPIO19
AE21 AG2
CHP3_GPIO18 CHP3_BIOS_CRI# SATA4GP_GPIO36 USBRBIAS
AD20 AG1 R148 22.6 1%
CHP3_GPIO20 nostuff SATA5GP_GPIO37 USBRBIAS# CHP3_USBBIAS#_MN
A nostuff A
R689 0904-002378
0
R747 R722 nostuff DRAW DATE TITLE
10K
1%
10K
1% CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
nostuff BIOS CRISIS RECOVER STRAP ELECTRONICS
nostuff HK.PARK PR ICH_9M_B
PLACE NEAR KEYBOARD APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
AD25
AD24
AC25
AC24
AE29
AE28
AE27
AE26
AE25
AB25
AB24
AA25
AA24
THIS DOCUMENT CONTAINS CONFIDENTIAL
G25
H24
F25
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
VCC1_5_B_16
VCC1_5_B_15
VCC1_5_B_14
VCC1_5_B_13
VCC1_5_B_12
VCC1_5_B_11
VCC1_5_B_10
VCC1_5_B_09
VCC1_5_B_08
VCC1_5_B_07
VCC1_5_B_06
VCC1_5_B_05
VCC1_5_B_04
VCC1_5_B_03
VCC1_5_B_02
VCC1_5_B_01
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS H25
EXCEPT AS AUTHORIZED BY SAMSUNG. VCC1_5_B_17
J24
VCC1_5_B_18
J25
VCC1_5_B_19 P1.05V
K24
VCC1_5_B_20
K25
P1.5V VCC1_5_B_21
L23
330ohm@100MHz 22uF->10uF VCC1_5_B_22
L24
VCC1_5_B_23 C733 C734
D B512 2.2uF->1uF L25
VCC1_5_B_24 100nF 100nF D
BLM18PG181SN1 M24 A15
VCC1_5_B_25 VCC1_05_01 10V 10V
M25 B15
VCC1_5_B_26 VCC1_05_02
EC513 N23 C15
C701 C700 C111 N24
VCC1_5_B_27 VCC1_05_03
D15
220uF 10000nF-X5R 10000nF-X5R 1000nF-X5R VCC1_5_B_28 VCC1_05_04
2.5V 6.3V N25 E15
AD 10% 10% VCC1_5_B_29 VCC1_05_05 P1.5V
6.3V 6.3V P24 F15
VCC1_5_B_30 VCC1_05_06
P25 L11
VCC1_5_B_31 VCC1_05_07
nostuff R24 L12
PRTC_BAT VCC1_5_B_32 VCC1_05_08
R25 L14
VCC1_5_B_33 VCC1_05_09
R26 L16
R27
VCC1_5_B_34 VCC1_05_10
L17 C112 C113 B9
VCCA3GP
VCC1_5_B_35 VCC1_05_11 10nF 10000nF BLM18PG181SN1
T24 L18
Need switched P5V_ALW controled by alws_on C150 C152 T27
VCC1_5_B_36 VCC1_05_12
M11
25V 6.3V
VCC1_5_B_37 VCC1_05_13
CORE
100nF 100nF
T28 M18
g
10V 10V VCC1_5_B_38 VCC1_05_14
T29 P11
P5.0V_AUX P3.3V_AUX VCC1_5_B_39 VCC1_05_15
U24 P18
P5.0V P3.3V VCC1_5_B_40 VCC1_05_16 P1.05V
U25 T11
2
2
VCC1_5_B_41 VCC1_05_17 B519
D3 V24 T18 BLM18PG181SN1
VCC1_5_B_42 VCC1_05_18
D5 V25 U11
n
BAT54A VCC1_5_B_43 VCC1_05_19
BAT54A U23 U18
3
3
R149 R121 VCC1_5_B_44 VCC1_05_20 C732
100 100 W24 V11
VCC1_5_B_45 VCC1_05_21 10000nF-X5R
l
1% W25 V12
1
1
1%
VCC1_5_B_46 VCC1_05_22 6.3V
Y5V->X5R
K23 V14
VCC1_5_B_47 VCC1_05_23 P1.05V
U6-4
u
Y24 V16
VCC1_5_B_48 VCC1_05_24
C202 C170 Y25
VCC1_5_B_49 VCC1_05_25
V17
1000nF-X5R
a
1000nF-X5R V18
A23
VCCRTC
NH82801IBM VCC1_05_26
C735 C731 C151
s i
C 100nF 100nF 10000nF-X5R Y5V->X5R C
A6
V5REF 4/5 VCCDMIPLL
R29 10V 10V 6.3V
DMI
P1.5V
t
AE1 W23
V5REF_SUS 0904-002378 VCC_DMI_1
Y23
VCC_DMI_2
AJ19
VCSATAPLL
B11 AB23
C148 C149 V_CPU_IO_1 P3.3V
m
BLM18PG181SN1 AC16 AC23
n
10000nF 1000nF-X5R VCC1_5_A_01 V_CPU_IO_2
AD15
6.3V 6.3V C729 AD16
VCC1_5_A_02
AG29
1000nF-X5R VCC1_5_A_03 VCC3_3_01
AE15
6.3V VCC1_5_A_04 C728 C699
ARX
AF15 AJ6
a
VCC1_5_A_05 VCC3_3_02 P3.3V 100nF 100nF
e
AG15
VCC1_5_A_06 10V 10V
AH15 AC10
P1.5V VCC1_5_A_07 VCC3_3_07
AJ15
VCC1_5_A_08
VCCP CORE
AD19
AC11
VCC3_3_03
AF20 C747 C748
S fid
VCC1_5_A_09 VCC3_3_04 100nF 100nF
AD11 AG24
C730 AE11
VCC1_5_A_10 VCC3_3_05
AC20 P3.3V 10V 10V
1000nF-X5R VCC1_5_A_11 VCC3_3_06
AF11
6.3V VCC1_5_A_12 ATX
AG10 B9
VCC1_5_A_13 VCC3_3_08 P1.5V
AG11 F9
AH10
VCC1_5_A_14 VCC3_3_09
G3
C755 C754 C753
VCC1_5_A_15 VCC3_3_10 100nF 100nF 100nF
AJ10 G6
PCI
VCC1_5_A_16 VCC3_3_11 10V 10V 10V
J2
VCC3_3_12
AC9 J7
VCC1_5_A_17 VCC3_3_13 nostuff
n
K7 nostuff
AC18
VCC3_3_14 C168
P1.5V VCC1_5_A_18 P1.5V_AUX 100nF
AC19 AJ4
VCC1_5_A_19 VCCHDA 10V
HDA
B B
LOGIC_IO
AC21 AJ3
VCC1_5_A_20 VCCSUSHDA
o
G10
C749 VCC1_5_A_21
AC8 C201
100nF VCCSUS1_05_1 100nF
G9 F17
10V VCC1_5_A_22 VCCSUS1_05_2 10V
internal : P1.5V level
AC12
VCC1_5_A_23
VCCSUS1_5_1
AD8 external : P3.3V level
AC13 F18
C
AC14
VCC1_5_A_24 VCCSUS1_5_2 C738
VCC1_5_A_25 100nF
A18
CONTROL LINK VCCPSUS
C750 AB6
AB7
VCC1_5_A_27
G22
C737 C742
100nF VCC1_5_A_28 VCCCL1_05 100nF 100nF
10V AC6
P3.3V VCC1_5_A_29 10V 10V
AC7 G23
VCC1_5_A_30 VCCCL1_5 C736
C702 100nF
A10
VCCLAN1_05_1 VCCCL3_3_1
A24 100nF
C703 10V
C169 A11 B24 1000nF
C769 VCCLAN1_05_2 VCCCL3_3_2 10V
6.3V
LAN
100nF 100nF
10V A12
P1.5V 10V VCCLAN3_3_1 P3.3V
B12
VCCLAN3_3_2 VCCPUSB nostuff
nostuff
A27
VCCGLANPLL
GLAN POWER
D28
VCCSUS3_3_20
VCCSUS3_3_19
VCCSUS3_3_18
VCCSUS3_3_17
VCCSUS3_3_16
VCCSUS3_3_15
VCCSUS3_3_14
VCCSUS3_3_13
VCCSUS3_3_12
VCCSUS3_3_11
VCCSUS3_3_10
VCCSUS3_3_09
VCCSUS3_3_08
VCCSUS3_3_07
VCCSUS3_3_06
VCCSUS3_3_05
VCCGLAN1_5_1
D29
A E26
VCCGLAN1_5_2 A
P1.5V VCCGLAN1_5_3
E27
VCCGLAN1_5_4 P3.3V_AUX DRAW DATE TITLE
A26
VCCGLAN3_3
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
P3.3V ELECTRONICS
C751 C752 C768 HK.PARK PR ICH_9M_B
T7
Y7
Y6
W7
W6
V7
V6
U7
U6
T6
T5
T4
T3
T2
T1
AF1
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
AC22
M12
M13
M14
M15
M16
M17
M23
M28
M29
H29
N11
N12
N13
K28
K29
L13
L15
L26
L27
J23
J26
J27
D D
H5
L2
L5
L7
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
AA26 N14
VSS_001 VSS_133
AA27 N15
VSS_002 VSS_134
AA3 N16
VSS_003 VSS_135
AA6 N17
VSS_004 VSS_136
AB1 N18
VSS_005 VSS_137
AA23 N26
VSS_006 VSS_138
AB28 N27
VSS_007 VSS_139
AB29 P12
VSS_008 VSS_140
AB4 P13
AB5
VSS_009 GND VSS_141
P14
VSS_010 VSS_142
AC17 P15
VSS_011 VSS_143
AC26 P16
g
VSS_012 VSS_144
AC27 P17
VSS_013 VSS_145
AC3 P2
VSS_014 VSS_146
AD1 P23
VSS_015 VSS_147
AD10 P28
VSS_016 VSS_148
AD12 P29
n
VSS_017 VSS_149
AD13 P4
VSS_018 VSS_150
AD14 P7
VSS_019 VSS_151
l
AD17 R11
VSS_020 VSS_152
AD18 R12
VSS_021 VSS_153
u
AD21 R13
VSS_022 VSS_154
AD28 R14
VSS_023 VSS_155
a
AD29 R15
VSS_024 VSS_156
AD4 R16
VSS_025 VSS_157
AD5 R17
s i
C AD6
VSS_026 VSS_158
R18
C
VSS_027 VSS_159
AD7 R28
VSS_028 VSS_160
t
AD9 T12
VSS_029 VSS_161
AE12 T13
VSS_030 VSS_162
AE13 T14
VSS_031 VSS_163
AE14 T15
VSS_032 VSS_164
m
AE16 T16
n
VSS_033 VSS_165
AE17 T17
VSS_034 VSS_166
AE2
VSS_035 U6-5 VSS_167
T23
AE20 B26
VSS_036 VSS_168
AE24 U12
a
VSS_037 NH82801IBM VSS_169
e
AE3 U13
VSS_038 VSS_170
AE4 U14
AE6
VSS_039
VSS_040
5/5 VSS_171
VSS_172
U15
AE9 U16
VSS_041 VSS_173
AF13 U17
S fid
VSS_042 0904-002378 VSS_174
AF16 AD23
VSS_043 VSS_175
AF18 U26
VSS_044 VSS_176
AF22 U27
VSS_045 VSS_177
AH26 U3
VSS_046 VSS_178
AF26 V1
VSS_047 VSS_179
AF27 V13
VSS_048 VSS_180
AF5 V15
VSS_049 VSS_181
AF7 V23
VSS_050 VSS_182
AF9 V28
VSS_051 VSS_183
n
AG13 V29
VSS_052 VSS_184
AG16 V4
VSS_053 VSS_185
AG18 V5
VSS_054 VSS_186
B AG20
VSS_055 VSS_187
W26 B
AG23 W27
VSS_056 VSS_188
o
AG3 W3
VSS_057 VSS_189
AG6 Y1
VSS_058 VSS_190
AG9 Y28
VSS_059 VSS_191
AH12 Y29
VSS_060 VSS_192
AH14 Y4
VSS_061 VSS_193
AH17 Y5
C
VSS_062 VSS_194
AH19 AG28
VSS_063 VSS_195
AH2 AH6
VSS_064 VSS_196
AH22 AF2
VSS_065 VSS_197
AH25 B25
VSS_066 VSS_198
AH28
VSS_067
AH5 A1
VSS_068 VSS_NCTF_01
AH8 A2
VSS_069 VSS_NCTF_02
AJ12 A28
VSS_070 VSS_NCTF_03
AJ14 A29
VSS_071 VSS_NCTF_04
AJ17 AH1
VSS_072 VSS_NCTF_05
AJ8 AH29
VSS_073 VSS_NCTF_06
B11 AJ1
VSS_074 VSS_NCTF_07
B14 AJ2
VSS_075 VSS_NCTF_08
B17 AJ28
VSS_076 VSS_NCTF_09
B2 AJ29
VSS_077 VSS_NCTF_10
B20 B1
VSS_078 VSS_NCTF_11
B29
VSS_087
VSS_088
VSS_089
VSS_090
VSS_091
VSS_092
VSS_093
VSS_094
VSS_095
VSS_096
VSS_097
VSS_098
VSS_099
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_079
VSS_080
VSS_081
VSS_082
VSS_083
VSS_084
VSS_085
VSS_086
VSS_NCTF_12
A A
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
B23
B5
B8
C26
C27
E11
E14
E18
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR ICH_9M_B
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
SPI_BIOS_ROM
02 VERIFY REAL MODE 66 CONFIGURE ADVANCE CACHE REG.
03 DISABLE NMI 6A DISPLAY EXTERNAL CACHE SIZE
04 GET CPU TYPE 6C DISPLAY SHADOW MESSAGE
06 INIT. SYSTEM H/W 6E DISPLAY NON-DISPOSABLE SEGMENT
D 08 INIT. CHIPSET REG. 70 DISPLAY ERROR MESSAGE D
09 SET IN POST FLAG 72 CHECK FOR CONFIGURATION ERROR
0A INIT CPU.REG 74 TEST REAL-TIME CLOCK
0B CPU CACHE ON 76 CHECK FOR KEYBOARD EERROR
0C INIT.CACHE TO POST 7C SETUP HARDWARE INTERRUPT VECTOR
OE INIT. I/O VALUE 7E TEST COPROCESSER IF PRESENT
0F ENABLE THE L-BUS IDE 80 DISABLE ON-BOARD I/O PORT
10 INIT. POWER MANAGER 82 DETECT AND INSTALL EXT.RS232C
11 LOAD ALTERNATE REG. 84 DETECT AND INSTALL EXT.PARALLEL
13 PCI BUS MASTER RESET 86 RE-INIT. ON-BOARD I/O PORT
88 INIT. BIOS DATA ROM
WITH INITIAL POST VALUE 8A INIT.EXTENDED BIOS DATA AREA
14 INIT. KEYBOARD CONTROLLER 8C INIT. FDD CONTROLLER
16 CHECK CHECKSUM 9A SHADOW OPTION ROMS
16MBit 18 8254 TIMER INIT. 9C SETUP POWER MANAGEMENT
g
1A 8237 DMA CONTROLLER INIT. 9E ENABLE H/W INTERRUPT
1C RESET INTERRUP CONTROLLER A0 SET TIME OF DAY
20 TEST DRAM REFRESH A4 INIT. TYPEMATIC RATE
22 TEST 8742 KEYBOARD CONTROLLER A8 ERASE F2 PROMPT
n
P3.3V_MICOM_SW 24 SET ES SEGMENT REG. TO 4GB AA SCAN FOR F2 KEY STROKE
P3.3V_MICOM_SW 26 ENABLE A20 AC ENTER SETUP
28 AUTO SIZING DRAM AE CLEAR IN POST FLAG
l
32 COMPUTE THE CPU SPEED B0 CHECK FOR ERRORS
34 TESET CMOS RAM B2 POST DONE-PREPARE TO BOOT O/S
u
R191 10K 1% 38 SHADOW SYSTEM BIOS ROM B4 ONE BEEP
10K U12 3A AUTO SIZING CACHE B6 CHECK PASSWORD (OPTION)
MX25L1605D R223
a
nostuff 3C CONFIGURE ADVANCED CHIPSET REG. B7 ACPI INIT
KBC3_SPI_CS# 34-A4,48-C2 1 8 3D LOAD ALTER REG. WITH CMOS VALUE BA DMI INIT
CE* VDD
2 7
s i
C KBC3_SPI_DI SO HOLD* 42 INIT. INTERRUPT VECTOR BE CLEAR SCREEN C
34-B3,48-C2
34-B4 3 6 34-B4,48-C2
44 INIT. BIOS INTERRUPT C0 TRY BOOT WITH INT19
KBC3_SPI_WP# 4
WP* SCK
5 34-B4,48-C2
KBC3_SPI_CLK
46 CHECK ROM COPYRIGHT NOTICE D0 INTERRUPT HANDLER ERROR
1
VSS SI KBC3_SPI_DO
t
D8
47 INIT. I20 SUPPORT IF INSTALLED D2 UNKNOWN INTERRUPT ERROR
48 CHECK VIDEO CONFIGURE AGAINST CMOS D4 PENDING INTERRUPT ERROR
3
m
2
22-B3,48-B2
CHP3_BIOSWP# 4C SHADOW VIDEO BIOS ROM DA EXTENDED BLOCK MOVE
n
50 DISPLAY CPU TYPE AND SPEED DC SHUTDOWN 10
52 TEST KEYBOARD 89 ENABLE NMI
54 SET KEYCLICK IF ENABLED 90 INIT. HDD CONTROLLER
56 ENABLE KEYBOARD 91 INIT. LOCAL BUS HDD CONTROLLER
a e
58 TEST FOR UNEXPECTED INTERRUPTS 92 JUMP TO USER PATCH 2
5A DISPLAY " PRESS ...... SETUP" 94 DISABLE A20 ADDRESS LINE
5C TEST RAM GETWEEN 512K AND 640K 96 CLEAR HUGE ES SEGMENT REG.
60 TEST EXTENDED MEMORY 98 SEARCH FOR OPTION ROMS
62 TEST EXTENDED MEMORY ADDRESS LINE
S fid
64 JUMP TO USER PATCH 1
o n B
PLT3_RST#
CLK3_DBGLPC
LPC3_LFRAME#
LPC3_LAD(3)
LPC3_LAD(2)
LPC3_LAD(1)
14-B1,21-C1 30-B3,32-C3
12-B4
20-C1,34-B4
48-B2
20-C1,34-B4
48-B2
20-C1,34-B4
48-B2
20-C1,34-B4
48-B2
20-C1,34-B4
48-B2
C
34-B3
P3.3V
J2
HDR-10P-1R-SMD
1
2
3
4
5
6
7
8
LPC3_LAD(0) 9
A 11
10 A
MNT1
12
MNT2
DRAW DATE TITLE
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
LVDS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
g
Q502
P3.3V SI2315BDS-T1
R504
3
2
200K
D
S
1%
1
G
C506
5 R503 330nF
C507
l
1 + 100nF
KBC3_BKLTON 30.1K 1% 10V
R519 1K 1%
LCD3_BKLTON MCH3_LCDVDDON_Q_MN
4
u
14-C4,48-B2 2
MCH3_BKLTEN - LCD3_BKLTON_R_MN MCH3_LCDVDDON_QR_MN
3 U503 D 3
a
R520 R521 7SZ08 MCH3_LCDVDDON_R_MN
100K 100K Q503
1% 1% R506 10K 1%G RHU002N06 P3.3V
s i
C MCH3_LCDVDDON C
1
S 2
R505
t
100K C510 SI team request
1% 10000nF-X5R
6.3V
22uF->10uF
LED Power
a m e n 2Ch. LCD Connector
VDC
S fid
VDD_LED
LCD_VDD3V P3.3V VDD_LED P3.3V
2.2K
2.2K
C502 C511
n
1000nF->100nF 100nF 100nF
10V 10V
B
Q507 B
R1
R2
SI2307BDS-T1-E3 JLCD501
1 2
3
26-C3,48-B2
2
3 4 LCD3_BKLTON
D
S
14-C4,48-C4
LCD3_BRIT 5 6
1
C
1%
100nF 100nF LCD1_BCLK# 14-B4
9 10 14-B4
LCD1_BDATA2#
25V 25V
LCD1_BDATA1 14-B4
11 12 14-B4
LCD1_BDATA0
LCD1_BDATA1# 13 14 LCD1_BDATA0#
14-B4
15 16 14-B4
P3.3V_VDD_INV_EN_QR_MN LCD1_ACLK 14-B4
17 18 14-C4
LCD1_ADATA2
R518 LCD1_ACLK# 19 20 LCD1_ADATA2#
51.1K 14-B4 14-B4
P3.3V 1%
LCD1_ADATA1 14-C4
21 22 14-C4
LCD1_ADATA0
LCD1_ADATA1# 23 24 14-C4,49-D4
LCD1_ADATA0#
P3.3V_VDD_INV_EN_Q_MN 25 26 14-C4,49-C3
LCD3_EDID_CLK
D 3 27 28 LCD3_EDID_DATA
Q508 29 30
31
RHU002N06 MNT1
R528 10K 1% G
MNT2
32
1
S 2 3710-002498
P3.3V_VDD_INV_EN_MN SOCK-30P-2R-SMD-MNT
A
A
DESIGN DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR GRAPHICS_IF
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
CRT
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
SN74AHCT1G125DCKR
CRT3_P5.0V_D_MN
5
g
2 + 4 R524 40.2 5% BLM18PG181SN1
CRT3_HSYNC 14-D4,48-C3 OE*
-
27-B3,48-C3
CRT5_HSYNC
3 CRT5_HSYNC_R_MN B506
CRT CONNECTOR
1
n
C519
100nF
l
10V J504
DSUB-15-VGA
82nH
u
14-D4,48-D4 L503 CRT3_RED_L_MN 1
CRT3_RED 6
VCC_CRT
a
11
14-D4,48-C3 L502 82nH CRT3_GREEN_L_MN 2
CRT3_GREEN 7
s i
C 12
C
14-D4,48-C4 L501 82nH CRT3_BLUE_L_MN 3
CRT3_BLUE
t
C521 8
50V
50V
50V
1%
1%
1%
U502
SN74AHCT1G125DCKR
100nF 13
0.022nF
0.022nF
0.022nF
150
150
150
1
10V 4
PGB1010603NR
D510
PGB1010603NR
D508
PGB1010603NR
D507
5 C550 C536 C535 9
R527
m
2 + 4 40.2 5% 0.022nF 0.022nF 0.022nF 14
CRT3_VSYNC CRT5_VSYNC
n
-
14-D4,48-C3 OE* 27-B3,48-C3 50V 50V 50V 5 16
2
3 CRT5_VSYNC_R_MN
C549
C532
C533
10 17
R526
R525
R543
1
15
a e
nostuff 3701-001515
nostuff
nostuff
27-B3
CRT5_DDCDATA 27-B3
CRT5_DDCCLK
S fid
27-C3,48-C3
CRT5_HSYNC 27-C3,48-C3
P3.3V P3.3V VCC_CRT CRT5_VSYNC
50V
50V
50V
50V
270pF
270pF
0.1nF
0.1nF
Q506 3
R514 R511
G
1
14-D4,48-D2 CRT5_DDCDATA_CLK_D_MN
D506
S
CRT3_DDCDATA CRT5_DDCDATA
C522
C523
C531
C520
n
2
27-B3 BAV99LT1 3
3
1 2
B D505 B
nostuff
BAV99LT1
nostuff
R513
P3.3V P3.3V VCC_CRT
R512
C o
G
1
CRT3_DDCCLK CRT5_DDCCLK
2
27-B3
3
RHU002N06
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR GRAPHICS_IF
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
D P3.3V D
Codec Pin9 Setting
S/B with Low Voltage IO S/B without Low Voltage IO
Pin9 : 1.5V Pin9 : 3.3V
C774
10000nF-X5R
C762 C191 C189 C190 C188 nostuff
D7 100nF 1nF 1nF 1nF 1nF nostuff
10V
MMBD4148 10V 50V 50V 50V 50V nostuff
C218 1000nF-X5R 6.3V nostuff
AUD3_SPKR 22-B3,48-C4 1 3
75V
SMD_A : 3711-000922
P1.5V
R167
g
SMD_S : 3711-000456
R168 15K
10K 1%
1% AUD3_SPKR_Q_MN U8 J512
nostuff C761 ALC269Q-GR HDR-4P-SMD
1 44 SPK5_R_M_MN B516 BLM18PG181SN1 SPK5_R_M_B_MN
n
100nF
R133 C186 DVDD SPK_OUT_R- 1
4.7K 10V 9 45 SPK5_R_P_MN B515 BLM18PG181SN1 SPK5_R_P_B_MN
4.7nF DVDD_IO SPK_OUT_R+ 2
1% SPK5_L_M_B_MN
25V 3
l
41 SPK5_L_M_MN B514 BLM18PG181SN1 SPK5_L_P_B_MN
SPK_OUT_L- SPK5_L_P_MN B513 BLM18PG181SN1 4
5 40 5
HDA3_AUD_SDO SDATA_OUT SPK_OUT_L+ MNT1
u
20-B3,48-C2 6 6
HDA3_AUD_BCLK R169
20-B3,49-A4
20-B3,49-A4 22 HDA3_AUD_SDI0_R_MN 8
BCLK
32 29-D3,49-B4
MNT2
HDA3_AUD_SDI0 SDATA_IN HPOUT_L_I AUD5_HP_O_LEFT
C676 C677 C663 C664
a
10 33 29-D3,49-B3 3711-000922
HDA3_AUD_SYNC 20-B3,49-A4 11
SYNC HPOUT_R_I AUD5_HP_O_RIGHT 1nF 1nF 1nF 1nF
HDA3_AUD_RST# RESET#
35 AUD5_CBN_MN 50V 50V 50V 50V
s
20-B3,49-A4
i
C G_AUD C187 1000nF-X5R 6.3V AUD3_SPKR_C_MN 12
CBN
36 AUD5_CBP_MN C162 2200nF-X5R10V
C
2203-006399 BEEP CBP
10V
t
2
GPIO0_DMIC_DATA CPVEE
34 C161 2200nF-X5R Do not make a testpoint in these nets
3 AUD5_CPVEE_MN
GPIO1_DMIC_CLK
MIC1_R_B
22 AUD5_MIC1_RIGHT_C_MN C183 1000nF-X5R 6.3V 2203-006399 R109 1K 1% 29-B3
AUD5_MIC1_RIGHT
R170 2.2K 4 21 AUD5_MIC1_LEFT_C_MN C185 1000nF-X5R 6.3V 2203-006399 R110 1K 1% 29-B3
KBC3_SPKMUTE# PD# MIC1_L_B AUD5_MIC1_LEFT
m
29-C4,34-B3
49-D4
n
47
EAPD_SPDIF02 MIC1_VREFO_R
30 AUD5_MIC1_VREFO_R_MN R116 4.7K
48
SPDIF01 MIC1_VREFO_L
28 AUD5_MIC1_VREFO_L_MN R115 4.7K
AUD5_JDREF_R_MN
G_AUD
R132 20K 1% 19 17 AUD5_MIC2_RIGHT_C_MN C182 1000nF-X5R 6.3V 2203-006399 29-B4
a
JDREF MIC2_R_F AUD5_MIC2_INT
e
MIC2_L_F
16 AUD5_MIC2_LEFT_C_MN C184 1000nF-X5R 6.3V 2203-006399
P5.0V_AUD 29-C3 R131 20K 1% 13
AUD5_SENS_MIC# SENSE_A Do not make a testpoint in these nets
AUD5_SENS_HP#
29-D2,49-C4 R130 39.2K 1% 18
SENSE_B MIC2_VREFO
29 29-B3
AUD5_MIC2_VREF
AUD5_SENS_A_MN 39 24
S fid
PVDD1 LINE1_R_C
46 23
PVDD2 LINE1_L_C
C763 C765 42
PVSS1 LINE2_R_E
15
100nF 100nF 43 14
10V 10V
PVSS2 LINE2_L_E G_AUD
7
DVSS
20
MONO_OUT
P4.75V_AUD 25 27 AUD5_VREF_MN
AVDD1 VREF
n
38
AVDD2
31
CPVREF
C764 C760 26
AVSS1 C159
B 100nF 100nF 37
AVSS2 THERMAL
49
4700nF-X7R
C160 B
10V 10V 100nF
6.3V
o
1205-003769 10V
3.9V
SHORT502 RGND-SHORT
SHORT503 RGND-SHORT
C
G_AUD G_AUD
G_AUD
B15
BLM18PG181SN1
P5.0V_AUD P4.75V_AUD
U7 SHORT510 0
MIC5252-4.75BM5
1
IN OUT
5 SHORT509 0
2
GND
3 4 AUD5_LDO_BYPASS_MN
C165 C192 EN BYPASS C164 C743
10000nF-X5R 100nF 100nF 10000nF-X5R
10V 10V SHORT505 1203-003344 10V 10V
R1608-SHORT G_AUD
2nd Vendor : 1203-005579
A (G916-475T1UF) A
C163
SHORT504 1000nF-X5R
R1608-SHORT 6.3V nostuff DESIGN DATE TITLE
nostuff
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
G_AUD G_AUD ELECTRONICS
HK.PARK PR HDA_CODEC
G_AUD G_AUD
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
HEADPHONE
J520
JACK-PHONE-6P-BLACK
28-C3,49-C4 5
AUD5_SENS_HP# 4
28-C2,49-B3 R126 56 AUD5_HP_RIGHT_R_MN B17 BLM18PG181SN1 AUD5_HP_RIGHT_B_MN 3 R
AUD5_HP_O_RIGHT 6
28-C2,49-B4 R125 56 AUD5_HP_LEFT_R_MN B16 BLM18PG181SN1 AUD5_HP_LEFT_B_MN 2 L
AUD5_HP_O_LEFT 1
50V
50V
50V
G1
G2
0.1nF
0.1nF
0.1nF
3722-002588
C181
C180
C155
n
nostuff
s u i al Connect to Mount-hole.
G_AUD
m n t MIC JACK
J518
a e
JACK-PHONE-6P-BLACK
28-C3 5
AUD5_SENS_MIC# 4
28-C1 AUD5_MIC1_RIGHT B12 BLM18PG181SN1 AUD5_MIC1_RIGHT_J_MN 3 R
AUD5_MIC1_RIGHT 6
S fid
AUD5_MIC1_LEFT AUD5_MIC1_LEFT_J_MN
28-C1 B13 BLM18PG181SN1 2 L
AUD5_MIC1_LEFT 1
G1
50V
50V
50V
G2
0.1nF
0.1nF
0.1nF
28-C1
AUD5_MIC2_VREF 3722-002588
C156
C154
C138
n
4.7K nostuff
MIC501
B SOM4013SL-G443-C1033 B
28-C1 R113 1K 1% AUD5_MIC2_INT_J_MN 1
AUD5_MIC2_INT MIC_SIG
o
AUD5_MIC2_INT_B_MN B14 2
GND
BLM18PG181SN1 G_AUD
C157
0.1nF 3003-001158 Connect to Mount-hole.
50V
C
G_AUD C141 10nF 25V
G_AUD
G_AUD
A A
DESIGN DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR HDA_CODEC
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
LAN Controller (RTL8103EL) D
g
J509
Place crystal within 0.75inches from LAN chip. JACK-LAN-8P
LT501 1
Y501 LFE8423 TD+
2
25MHz TD-
1 16 LAN1_RXP_MN 3
n
30-B4
LAN1_MDI1P 3
RD+ RX+
14 LAN1_RXCT_MN LAN1_CABLE_TERMINATION2_MN 4
RD+
RDCT RXCT TERM1
1
30-B4 2 15 LAN1_RXN_MN 5
LAN1_MDI1N RD- RX- TERM2
l
P1.2V_LAN 6
RD-
C578 C577 LAN1_MDI0P
30-B4 7 TD+ TX+
10 LAN1_TXP_MN LAN1_CABLE_TERMINATION1_MN 7
TERM3
u
0.015nF 0.015nF 6 11 LAN1_TXCT_MN 8
TDCT TXCT TERM4
50V 50V 30-B4 8 9 LAN1_TXN_MN
LAN1_MDI0N TD- TX-
C575
a
9
MNT1
100nF 10
10V
10V
MNT2
1%
1%
1%
1%
10V 2603-000099
s i
C C
100nF
100nF
75
75
75
75
3722-002843
t
R633 2.49K 1%
C661
C662
R56
R55
R53
R54
P3.3V_AUX P1.2V_LAN
m n
C64
1nF
C637 C576 C579 C580 3KV
100nF 100nF 100nF 100nF
a
P3.3V_AUX
e
10V 10V 10V 10V
P3.3V_AUX
48
47
46
45
44
43
42
41
40
39
38
37
C638
S fid
VCTRL12A
GND_4
RSET
VCTR12
NC_11
NC_10
CKTAL2
CKTAL1
NC_9
NC_8
LED0
VDD33_2
100nF
10V
R571
10K
1 36 1% P3.3V
AVDD33 DVDD12_4
30-C2 2 35
LAN1_MDI0P 30-C2 3
MDIP0 LED1_EESK
34
LAN1_MDI0N 4
MDIN0 LED2_EEDI_AUX
33
NC_1 U508 LED3_EEDO
30-C2 5 RTL8103EL-GR 32 R769 1K 1% R572
LAN1_MDI1P 30-C2 6
MDIP1 EECS
31 P3.3V_AUX
LAN1_MDI1N MDIN1 GND_3 1K
n
7 1205-003798 30 1%
GND_1 DVDD12_3
8 29
NC_2 VDD33_1
9 28
NC_3 ISOLATE#
B 10
DVDD12_1 PERST#
27 34-B3 25-A4,32-C3 14-B1,21-C1
PLT3_RST#
C581 B
11 26 34-C3,48-A3 22-C4,32-C4
R573 100nF
P1.2V_LAN NC_4 LANWAKE# PEX3_WAKE#
o
12 25 10V
REFCLK_N
REFCLK_P
DVDD12_2
HSON
HSOP
NC_6
NC_7
HSIN
P3.3V
HSIP
R575 10K 1%
C640 C639
100nF 100nF
C
13
14
15
16
17
18
19
20
21
22
23
24
10V 10V
12-B1,48-B2
nostuff LOM3_CLKREQ#
nostuff
R574 0
PEX1_LAN_TXP4 21-A4
PEX1_LAN_TXN4 12-B1
21-A4
CLK1_PCIELOM 12-B1
CLK1_PCIELOM#
PEX1_LAN_RXP4
21-B4 C583 100nF 10V PEX1_LAN_RXP4_C_MN
21-B4 C582 100nF 10V PEX3_LAN_RXN4_C_MN
PEX1_LAN_RXN4
Place AC coupling capacitors
close to LAN chip.
C584 C585
1000nF-X5R 1000nF-X5R
6.3V 6.3V
Place close to pin19.
A A
DESIGN DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR LAN
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
3 IN 1 CARD (AU6336) D
n g l
u
P3.3V_MCD
a
P3.3V
s i
C P3.3V_MCD C
C217 R163
t
100nF 150K
10V
1%
C216 C235 U10
1000nF-X5R 100nF
AU6336C52-MWF C239
m
R164
n
6.3V 10V 1000nF-X5R
2 15 100K
VD33P SD_V33 6.3V
9
VDDHM J522
14 24 31-B2,48-B2
VDD33C SDDATA0
17 31-B2,48-B2
MCD3_SDDATA0 EDGE-SD-11P
a
Y5V->X5R SDDATA1 MCD3_SDDATA1
e
28 19 31-B2,48-B2 4
8
VDD SDDATA2
21 31-B2,48-B2
MCD3_SDDATA2 VDD
C214 C215 VDDU SDDATA3
22
MCD3_SDDATA3 31-B2,48-A3 2
10000nF-X5R 100nF USB3_MMC_R_MN SDDATA4 MCD3_SDCMD CMD
22-B1 R208 0 3 23 48-B3 5
6.3V 10V USB3_MMC+ 22-B1 R210 0 4
DP SDDATA5
12 MCD3_SDCLK CLK
USB3_MMC-
S fid
DM SDDATA6 31-C3,48-B2R165
11 49.9 1% MCD3_SDDATA0_MN 7
USB3_MMC#_R_MN
20
SDDATA7 MCD3_SDDATA0 31-C3,48-B2R166 49.9 1% MCD3_SDDATA1_MN 8
DATA0
MCD3_RSTN_MN
CLED
10
MCD3_SDDATA1 31-C3,48-B2R231 49.9 1% MCD3_SDDATA2_MN 9
DATA1
C236 27
TRIST
13 48-B3
MCD3_SDDATA2 31-C3,48-B2R232 49.9 1% MCD3_SDDATA3_MN 1
DATA2
12-C4 R212 0 470nF 16V 25
RSTN SDCDN
18 48-C4
MCD3_SDCD# MCD3_SDDATA3 CD_DATA3
CLK3_FM48 EXTCLK SDWP
16 31-C2,48-A3
MCD3_SDWP 48-B3 10
6
SDCMD
26 R211 33 48-B3
MCD3_SDCMD MCD3_SDCD# 48-C4 11
CD
7
NC1 SDCLK MCD3_SDCLK MCD3_SDWP WP
NC2
1 MCD3_REXT_MN 3
REXT VSS1
n
5 6
VS33P VSS2
29
GND
12
MNT1
B 0904-002453 13
MNT2
B
R209 C237 14
MNT3
o
330 0.022nF 15
50V
MNT4
3709-001526
3-in-1 Socket
C
Support : SD/MMC/SDHC
A A
DESIGN DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR MULTICARD
APPROVAL REV PART NO.
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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
Wireless LAN D
WLAN, 4mm
P3.3V P3.3V P3.3V P3.3V
PEX3_WAKE#
22-C4,30-B3
34-C3,48-A3
R206
10K
1%
1
J521
EDGE-MINIPCI-E-52P
WAKE* P3.3V_1
n g
2
C776
100nF
l
10V C777
100nF
10V
u
3 4
RSVD_1 GND_1
5 6
RSVD_2 P1.5V_1
a
12-B1,49-C4 7 8
MIN3_CLKREQ# 9
CLKREQ* SIM_VCC_C1
10
GND_2 SIM_DATAIO_C7
12-B1 11 12
s i
C CLK1_MINIPCIE# 12-B1 13
REFCLK- SIM_CLK_C3
14 P3.3V 36-B4,48-B4
C
CLK1_MINIPCIE 15
REFCLK+ SIM_RESET_C2
16 WLON_LED#
GND_3 SIM_VPP_C6
t
17 18 D 3
SIM_RSVD_C8 GND_4 Q33
19 20 32-C1,34-B3
SIM_RSVD_C4 W_DISABLE* KBC3_RFOFF# C171 RHU002N06
21 22 C172 C756 32-C3,34-B3 G
GND_5 PERST* PLT3_RST# 10000nF KBC3_RFOFF#
m
21-B4 23 24 34-B3
25-A4,30-B3
14-B1,21-C1 100nF 100nF 1
PEX1_MINIRXN1
n
PERN0 P3.3V_AUX 6.3V
21-B4 25 26 S 2
PEX1_MINIRXP1 27
PERP0 GND_6
28
GND_7 P1.5V_2
29 30
GND_8 SMB_CLK
31 32
a
PEX1_MINITXN1 PETN0 SMB_DATA
e
21-B4 33 34
PEX1_MINITXP1 21-B4 35
PETP0 GND_9
36
GND_10 USB_D-
37 38
RSVD_11 USB_D+
39 40
RSVD_12 GND_11
41 42
S fid
RSVD_13 LED_WWAN*
43 44 Mini PCI Express Card
RSVD_14 LED_WLAN*
45 46
nostuff For Half minicard 47
RSVD_15 LED_WPAN*
48 30.00 mm
M506 M507 RSVD_16 P1.5V_3
49 50
HEAD HEAD RSVD_17 GND_12
51 52
DIA DIA RSVD_18 P3.3V_2
50.95 mm
48.05 mm
LENGTH LENGTH 53 Top
BA61-01090A BA61-01090A MNT1
54
MNT2
Pin 1
n
3709-001498
C o
A A
DESIGN DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR MINI_PCIE_CONN
APPROVAL REV PART NO.
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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
n g l
MAIN TO SUB SATA ODD CONN
u
JHDD1
a
HDD-22P-SMD
S1
s i
C 20-B3 S2
GND1 P5.0V C
SAT1_TXP0 20-B3 S3
TX+
SIGNAL
SAT1_TXN0 TX-
t
S4 J515
GND2 CONN-12P-FPC
20-B3 S5
SAT1_RXN0 20-B3 S6
RX-
SAT1_RXP0 S7
RX+ 1
GND3 2
m
C102 C104 C124 C101 C103
n
3
P1
P3.3V 3.3V_1 100nF 10000nF-X5R 10000nF-X5R 100nF 100nF 4
P2
3.3V_2 10V 10V 10V 10V 10V 5
P3
P4
3.3V_3 SAT1_TXP1 6
a
GND4 SAT1_TXN1 7
e
P5 nostuff
C211 C212 C213 P6
GND5
nostuff
8
10000nF 100nF 100nF
P7
GND6 nostuff SAT1_RXN1 9
POWER
S fid
5V_3 12
P10
GND7
P11 3708-002190
RESERVE
P12
P5.0V GND8
P13
12V_1
P14
12V_2
P15
12V_3
C773 C772 C771 C758 C759 M1
100nF 10000nF 10000nF 100nF 100nF MNT1
M2
10V 6.3V 6.3V 10V 10V MNT2
n
nostuff 3710-002788
nostuff
B B
C o
A A
DESIGN DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR SATA_DEVICES
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. P3.3V_MICOM MICOM_MEC1308
P3.3V
SHORT518
0 nostuff MICOM RESET
34-B2,40-D2
D KBC3_RST# D
C264 C781 C780 C778 C265
100nF 100nF 100nF 100nF 100nF
Q46 D 3 P3.3V_AUX
10V 10V 10V 10V 10V
RHU002N06
G
THM3_STP#_Q_MN
1
S 2 R230
BSS84 4.7K
106
119
Q45
68
14
39
58
84
49
40
3 2 THM3_STP#_R_MN
KBC5_KSO(0:15)
VCC0
VCC1_1
VCC1_2
VCC1_3
VCC1_4
VCC1_5
VCC1_6
VCC2
AVCC
D S
0 21
KSO0 G1
1 20 R229
KSO1
2 19 100K 8-C2,48-B4
g
3 18
KSO2
124 1%
THM3_STP#
4 17
KSO3 OUT0_SCI
125
KBC3_LED_ACIN#
5 16
KSO4 OUT1
123
10kohm pull-up to P3.3V_AUX
6 13
KSO5 OUT7_NSMI
122 KBC3_EXTSMI# should be at the thermal sensor side.
KSO6 OUT8_KBRST KBC3_CPURST#
7 12 U13 121
n
8 10
KSO7 OUT9_PWM2
120 KBC3_WAKESCI#
KSO8 OUT10_PWM0
9 9
KSO9 MEC1308-NU PWM1_OUT11
118
KBC3_LED_POWER#
l
10 8
KSO10
11 7
KSO11
u
12 6 107
13 5
KSO12_GPIO00_KBRST GPIO01
79 KBC3_CHGEN P3.3V P3.3V_AUX
KSO13_GPIO18 GPIO02 KBC3_PRECHG
a
14 81 80 39-B4,48-C2
15 83
GPIO04_KSO14 GPIO03
60 39-A4,48-C2
KBC3_CHG4.2V
GPIO05_KSO15 BA09-00021A NRESET_OUT_GPIO06 THM3_ALERT#
4 85
s i
C KBC3_SUSPWR 108
GPIO24_KSO16 GPIO07_PWM3
86 R763 10K
C
KBC3_PWRGD GPIO26_KSO17 GPIO08_RXD
87 P3.3V_MICOM_SW KBC3_RUNSCI#
KBC5_KSI(0:7) GPIO09_TXD
t
0 29 R201 10K
1 28
KSI0 KBC3_EXTSMI# R200 10K
2 27
KSI1
88
KBC3_WAKESCI#
KSI2 GPIO11_AB2A_DATA ADT3_SEL# R228
3 26 89 300K nostuff
KSI3 GPIO12_AB2A_CLK PEX3_WAKE# nostuff
m
4 25 90 1%
CHP3_SLPS3#
n
KSI4 GPIO13_AB2B_DATA
5 24 91
6 23
KSI5 GPIO14_AB2B_CLK
92 BAT3_DETECT#
7 22
KSI6 GPIO15_FAN_TACH1
101
C259
KSI7 GPIO16_FAN_TACH2
102 43-C4,48-C4
KBC3_VRON 100nF
a
10V
GPIO17_A20M KBC3_A20G P3.3V_MICOM P3.3V_MICOM_SW
e
35
KBC5_TCLK 36
IMCLK
103
KBC5_TDATA 61
IMDAT GPIO20_PS2CLK
105
KBC3_CAPSLED#
KBC5_KCLK 62
KCLK GPIO21_PS2DAT
75
KBC5_KDATA 66
KDAT 32KHZ_OUT_GPIO22_WK_SE01
73 KBC3_PWRON R772 0
KBC5_MCLK KBC3_USBCHG
S fid
EMCLK GPIO25
67 74
KBC5_MDATA EMDAT GPIO27_WK_SE05
93
GPIO28
98 37-C4,49-C3
KBC3_USBPWRON#
LPC3_LAD(0:3) 0 46
GPIO29_BC_CLK
99
LAD0 GPIO30_BC_DAT
1 48 100
LAD1 GPIO31_BC_INT# P3.3V_MICOM_SW
2 50 126
3 51
LAD2 GPIO32
65 KBC3_BKLTON
52
LAD3 GPIO33
64
KBC3_RSMRST#
LPC3_LFRAME# 53
LFRAME# GPIO34
63 KBC3_PWRBTN# R757 4.7K
PLT3_RST# LRESET# GPIO35 KBC3_SPKMUTE# KBC3_SMDATA#
R758
n
54 1 4.7K
CLK3_PCLKMICOM PCI_CLK GPIO36 KBC3_RFOFF# KBC3_SMCLK#
55 34 R762 10K
PCI3_CLKRUN# CLKRUN# GPIO37_CIR_LED LID3_SWITCH# ADT3_SEL#
CHP3_SERIRQ 57
SER_IRQ GPIO38_CIR_IN
33
PLT3_RST# KBC3_TX
34-C3,39-A2
48-C4 R760 10K
B 59
NC_TEST_CLK GPIO39
30
KBC3_SPI_WP# KBC3_RX
34-A1 R198 10K B
R761 10K
KBC3_LED_ACIN#
o
R759 10K
76 KBC3_LED_CHARGE#
KBC3_RUNSCI# NEC_SCI
111 P3.3V P3.3V_MICOM_SW P5.0V
AB1A_DATA
112
KBC3_SMDATA#
AB1A_CLK KBC3_SMCLK#
HST3_SPI3_CLK
21-A1,48-C2 SHORT517 0 2
HSTCLK_GPIO41 AB1B_DATA
109
KBC3_THERM_SMDATA
SHORT519 0 94 110 R199 R245 10K 1%
C
HST3_SPI3_DO 21-B1,48-C2 SHORT514 0 127
HSTDATAIN_GPIO43 (MISO) AB1B_CLK KBC3_THERM_SMCLK KBC5_TCLK R244 10K 1%
HST3_SPI3_DI HSTDATAOUT_GPIO45 (MOSI) R227 10K KBC5_TDATA
21-B1,49-D4 SHORT512 0 96 10K 1% R243 10K 1%
HST3_SPI3_CS# 31
HSTCS0#_GPIO44
69 KBC5_KCLK R242 10K 1%
HSTCS1#_GPIO42 TEST_PIN KBC3_P3.3V_PU_R_MN KBC5_KDATA
KBC3_SPI_CLK SHORT516 0 3
FLCLK PWRGD
78
KBC5_MCLK R241 10K 1%
CAP
71
XTAL2
A A
11
37
47
45
72
56
82
104
117
15
CLK3_MICOM_XTAL2_MN
1 4 MICOM Crisis Update DRAW DATE TITLE
C779
C260 Y3
2 3
C258 4700nF-X5R
Condition: P90=P91=P92=High(MICOM_P3V)
SY.KIM 9/23/2008
BONN-L SAMSUNG
0.022nF 0.022nF 10V CHECK DEV. STEP
0.032768MHz ELECTRONICS
50V 50V HK.PARK PR MICOM
MD0=MD1=Low(0V) APPROVAL REV PART NO.
Serial Port: P84 & P85 H.J.KIM 1.2 MICOM_SMSC MEC1308 BA41-
MODULE CODE LAST EDIT
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. Micom Glue Logic TPD5_R_BUTTON#
35-C3,49-B3 1
SW503
SW-TACT-4P
3
2 4
P5.0V
3
2 1
D nostuff when 2111b(144p) is used D
BAV99LT1
P3.3V_MICOM D10
KEYBOARD TPD5_L_BUTTON#
35-C3,49-C3
nostuff
1
SW502
SW-TACT-4P
3
2 4
1%
1%
1%
1%
1%
1%
1%
1%
P5.0V
3
10K
10K
10K
10K
10K
10K
10K
10K
2 1
BAV99LT1
g
D9
R647
R648
R649
R650
R651
R652
R653
R654 nostuff
KBC5_KSI(0:7) 34-C4,48-B2
u n al
Power Switch Button
34-B2,48-C2
KBC3_PWRSW#
s i
C C
1 2
SW501
t
SW-TACT-4P
3404-001311
3 4
m n
J511
KBC5_KSO(0:15) 34-D4,48-B2 CONN-24P-FPC
24
a
23
e
22
21
20
19
LID SWITCH
S fid
18
17 P3.3V
16
15
14
13
12
11
10
9
R540
U506
n
20K
8 A3212ELH/HED55XXU12 1%
7
1
B 6 C548 SUPPLY
2 48-B2
34-B3,35-A1 B
5 1000nF-X5R
3
OUTPUT LID3_SWITCH#
4 6.3V GND
o
3
2 1009-001010
1
3708-001321
For Common useness with Cannes-L
C
P3.3V
TOUCHPAD P5.0V
C63 J513
CONN-6P-FPC R501
100nF U501 20K
10V A3212ELH/HED55XXU12 1%
MNT2
8 1
7
MNT1 C501 SUPPLY
2 34-B3,35-B1
34-B1,48-B3
6 1000nF-X5R
3
OUTPUT 48-B2 LID3_SWITCH#
KBC5_TDATA 5 6.3V GND
TPD5_R_BUTTON# 35-B3,49-B3
4
TPD5_L_BUTTON# 3 1009-001010
34-B1,48-C4
35-B3,49-C3
KBC5_TCLK 2
1
C77 C79 C78 C80
A 0.01nF 3708-002402 A
1nF 0.5pF 1nF 1nF
50V 50V 50V 50V nostuff
DESIGN DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR MICOM GLUE LOGIC
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
LEDs D
n g l
ADAPTERIN/CHARGING LED
P3.3V_MICOM
s u ti a
P3.3V
KBC3_LED_ACIN#
LED504
LTST-C195KGJRKT
3 G
1
KBC3_LED_ACIN#_R_MN
R237 221 1%
C
m
LED501
n
LTST-C193TBKT-AC 4 2 R236 475 1%
KBC3_LED_CHARGE# R
R233 221 1% KBC3_LED_CHARGE#_R_MN
KBC3_CAPSLED# KBC3_CAPSLED#_LED_MN
2
34-C3,49-D4
a
P3.3V_AUX
CHP3_SATALED#
LED502
S fid
LTST-C193TBKT-AC e
CHP3_SATALED#_LED_MN R234 221 1%
KBC3_LED_POWER#
LED505
LTST-C193TBKT-AC
2 1 R238
KBC3_LED_POWER#_R_MN
221 1%
2
20-B3,49-B4
n
LED503
B LTST-C193TBKT-AC B
o
WLON_LED#_LED_MN R235 221 1%
WLON_LED#
2
32-C1,48-B4
C
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR LED_SWITCH
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. USB Single connector X 3 (Left)
P5.0V_ALW TPS2062 2ea must be changed into PPTC.
D EC510 can be replaced with 22uF after measurement D
C89 U4
100nF
TPS2062ADRBR
10V
2
IN GND
1 Need 4A Routing
8 7
OC1# OUT1
EC6
KBC3_USBPWRON#_R_MN
5
OC2# OUT2
6 C86 100uF C87 C88
100nF 16V 100nF 0.033nF
R541 0 3 10V AS 10V 50V
KBC3_USBPWRON# 34-B3,37-C4
EN1#
49-C3 nostuff
4 9 nostuff
KBC5_USBCHG# EN2# T_GND
37-A4,48-C2 R542 0 TPS1_P5.0VAUX_USBPWR1_MN
g
1205-003683
R658 0 R678 0
nostuff
R657 0 J514 R677 0 J517
R58 JACK-USB-4P JACK-USB-4P
R57
n
0 0 PWR PWR
2 3 USB3_P2-_B_MN 22-B1 2 3 USB3_P0-_B_MN
USB3_P2- 22-B1
D- USB3_P0- 22-B1
D-
USB3_P2+ D+ USB3_P0+ D+
l
22-B1 USB3_P2+_B_MN USB3_P0+_B_MN
P5.0V_ALW GND GND
u
nostuff 1 4 5 nostuff 1 4 5
nostuff B8 MNT1 MNT1
6 B10 6
nostuff ACM2012-900-2P-T MNT2 MNT2
a
7 ACM2012-900-2P-T 7
C571 U507 8
MNT3
8
MNT3
100nF
TPS2062ADRBR MNT4 MNT4
s i
C 10V C
2
IN GND
1 Need 2A Routing 3722-002767 3722-002767
P5.0V_AUX_USB
t
8 7
OC1# OUT1
TPS2_P5.0VAUX_USBPWR1_MN C573 EC505
5 6 R570 0 100nF 100uF C572 C574
OC2# OUT2
10V 16V 100nF 0.033nF
AS
m
3 10V 50V
KBC3_USBPWRON# nostuff
n
34-B3,37-D4
EN1#
49-C3 4 9 nostuff
EN2# T_GND
1205-003683
nostuff for sleep in charge
a e
R635 0 P5.0V_STB
R634 0 J508
JACK-USB-4P
S fid
2 3 USB3_P6-_B_MN
PWR
USB3_P6- D- R225
22-B1 200K
USB3_P6+ 22-B1 USB3_P6+_B_MN
D+
1%
GND
nostuff 1 4 5
MNT1
B510 6 37-A4,48-C2
7
MNT2 KBC5_USBCHG#
ACM2012-900-2P-T MNT3
8
MNT4 D 3
n
3722-002767 Q44
G RHU002N06
B KBC3_USBCHG 34-B3,40-A4 B
1
48-C2 S 2
10V
100nF
C25
USB SUB B’D CONNECTOR
P5.0V_ALW
8
U2
TPS2062ADRBR
IN
OC1#
GND
OUT1
7
1
P5.0V_AUX_USB C o Need 2A Routing
nostuff
nostuff
nostuff
5 6 R40 0
OC2# OUT2 J503
3 HDR-6P-SMD
KBC5_USBCHG# 37-B1,48-C2
EN1#
1
4 9
EN2# T_GND 2
3
A 1205-003683 USB3_P10- 4 A
22-B1
USB3_P10+ 22-B1
5
6
7 DESIGN DATE TITLE
MNT1
8
MNT2
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
3711-002049 ELECTRONICS
HK.PARK PR USB_CONN
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
n g l
C
P3.3V
s u ti a C34 C33
P5.0V C
m
100nF 100nF
n
10V 10V
J523
HDR-4P-1R-SMD
a e
J506
1 HDR-6P-SMD
22-B1 B3 R45 0
C240 C241 USB3_BLUETOOTH- 2 nostuff
100nF 100nF USB3_BLUETOOTH+
22-B1
3 ACM2012-900-2P-T 1
10V 10V 4 2
5 22-B1 1 4 USB3_CAMERA-_B_MN
USB3_CAMERA-
S fid
MNT1 3
6 22-B1
MNT2 USB3_CAMERA+ USB3_CAMERA+_B_MN
4
5
6
3711-000456 2 3 7
MNT1
8
nostuff MNT2
R44 0
3711-002049
n
nostuff
nostuff
nostuff
B B
C o
A A
DESIGN DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR USB_DEVICES
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CHARGE & POWER MANAGEMENT
AP4957AGM
AP4957AGM
VDC_ADPT VDC
J502 VDC_CHG
Q3-1
Q3-2
Q501
1 -30V
3 -30V
HDR-4P-1R B1 AO4435L
D2
D2
8
6
D 1 HU-1M2012-121JT D
PNS_CHGVR_DCJACK_QB_MN ANS_CHGVR_VDC_ADPT_RQ_MN R3 0.02 1 8
D1 7
D1 5
2 S1 D1
4700nF-X5R
S
S
1W 2 7
3 C27 C30 C29 C28 C513 EMI C8 1% 3
S2 D2
6
4
R508 R20 EC2 EC1
G
4 100nF 100nF 100nF S3 D3
MNT1
5 25V 25V 25V
10nF 100K 1000nF 300K 100nF R19 R34 68uF 68uF C18 C17 4
G D4
5
B2 25V 25V 25V
C19
6 1% 1% 2.2 22 25V 25V 1nF 1nF
MNT2 HU-1M2012-121JT nostuff AL AL
CHGVR_SGATE_RQ_MN
50V 50V
25V
3711-007003
R507 R21 C15 100nF
100K 43.2K
P3.3V_MICOM
CHGVR_SGATE_RRQ_MN
1% 1% 25V
3 D BGATE
60V
R8
EMI 10K
G
g
VCHG=12.597V@2600Cell 1 CHGVR_P3.3V_MICOM_RQ_MN
VCHG=13.05V@2950Cell C10 2 S Q4
100nF RHU002N06
IPRECHG=0.27A 25V 48-C4
34-B1,39-A2
ADT3_SEL#
n
ICHG=2.56A FOR 5200mAh & 4000mAh
nostuff
l
Q504
D 3 Q5-1
R22
u
BSS84 0 AO4822AL
G To enhance
a
1 S
2 D1 7 8 L1 DMB performance (060310)
R38 B502
D2 10uH
0.02 HU-1M2012-121JT
s i
C G
SIQ1048-R100 1/2W J501
ANS_CHGVR_VDC_CHG_BJ_MN
C
S
2703-003654 1% BATT-CONN-7P
2 1 CHGVR_PHASE_RL_MN 7
t
6
C514 5
4700nF-X5R
4700nF-X5R
4700nF-X5R
BGATE VDC_ADPT VDC D1 5 6
100nF D2 R36 R37 4
10 10 R33 R35
50V
nostuff 25V 3
50V
D501
CHGVR_BAT3_SMDATA#_CBJ_MN
G B501
CHGVR_BAT3_DETECT#_CBJ_MN
CHGVR_BAT3_SMCLK#_CBJ_MN
22 22
n
BAT54A 2
R24 R27 R28 4 S
3 HU-1M2012-121JT
25V
25V
25V
CHGVR_CSIP_MN
470K
300K 300K
1nF
PNS_CHGVR_PHASE_RC_MN
300K 1
1nF
1% 1% 1% G_CHG C4
2
1nF 3711-007163
a
C16
e
15.15V@1.264V 50V
C13 47nF
C505
R26 R29
30V
R39
C21
C22
C23
C24
10nF 50V B505
30.1K 27.4K C503
1% 25V 1% U1
1
1000nF BLM18PG181SN1
ISL6255AHRZ-T
25V Q5-2
S fid
19 20 CHGVR_CSIN_MN 34-C2,48-B2
BAT3_DETECT#
CSIP CSIN AO4822AL
CHGVR_SGATE_MN C518
G_CHG 18 17 C504 0.1nF
G_CHG SGATE BGATE R502 50V
CHGVR_DCIN_MN 25 100nF nostuff B504
DCIN 3.3
(1.26V) CHGVR_ACSET_MN 27 25V BLM18PG181SN1
VREF ACSET
CHGVR_DCSET_MN 28 PNS_CHGVR_BST_MN
DCSET
14 39-A1,48-B2
BAT3_SMDATA#
C14 BOOT PNS_CHGVR_BST_RC_MN
1000nF 15 PNS_CHGVR_TG_MN C517
G_CHG
UGATE
R16 25V R30 5.1 CHGVR_VDDP_MN 13
VDDP PHASE
16 PNS_CHGVR_PHASE_MN 0.1nF
nostuff 50V
n
200K 1% CHGVR_VDD_MN 26 12 ANS_CHGVR_BG_MN B503
2.5A@1.024V VDD LGATE
1% 11 BLM18PG181SN1
0.268A@0.107V PGND ( 2.39V )
CHGVR_CHLIM_MN 7
CHLIM VREF BAT3_SMCLK#
B CHGVR_VADJ_MN 9
VADJ CSOP
21 CHGVR_CSOP_MN 39-A1,48-D3 B
R13 R11 CHGVR_ACLIM_MN 8
ACLIM CSON
22 CHGVR_CSON_MN C516
o
150K 10K CHGVR_ICM_MN 5 0.1nF
ICM nostuff 50V
1% 1% 6
VREF VREF
1 CHGVR_EN_MN
CHGVR_CHLIM_RQ_MN
VREF EN
CHGVR_KBC3_PRECHG_RQ_MN D 3 CHGVR_ICOMP_MN 3 2
G_CHG Q2 ICOMP CELLS
CHGVR_VCOMP_MN 4 10
C
R6 10K RHU002N06 VCOMP GND
KBC3_PRECHG
G R12 R18 R25
34-C3,48-C2 1 60V
24.3K 200K 23 29 1K
P3.3V_MICOM
13.05V@2.058V ACPRN THERM CELLS Cells N/B
R7 S 2 1% 1% R14 24 1%
CHGVR_DCPRN_MN
CHGVR_ICM_RC_MN
DCPRN
C11 C2 34-C3,48-B3
CHGVR_VCOMP_RC_MN
BAV99LT1
BAV99LT1
50V 25V 25V C12
2
R10 R9 R15 R17 C1 GND 3
30.1K 300K 200K 27.4K R23 R31 1nF
100nF
1% 1% 1% 1% Float 50V
D503
D502
G_CHG G_CHG 25V 10K 0 2
1%
3
70V
70V
CHGVR_VADJ_RQ_MN
D 3 G_CHG
1
CHGVR_KBC3_CHG4.2V_RQ_MN G_CHG G_CHG G_CHG G_CHG
R4 10K G G_CHG G_CHG G_CHG
KBC3_CHG4.2V 34-C3,48-C2 60V P3.3V_MICOM
1 3.03A@0.506V(60W)
S 2
High : VCELL to 4.200V Q1 4.32A@1.74V
Low : VCELL to 4.350V R5 RHU002N06
470K R32 R510 100 1%
1%
BAT3_SMDATA# 39-B1,48-B2 34-B1,48-C2
KBC3_SMDATA#
20K
G_CHG 1% R509 100 1%
BAT3_SMCLK# 39-B1,48-D3 34-B1,48-C2
KBC3_SMCLK#
A nostuff ADT3_SEL# A
48-C4
34-B1,39-C3
G_CHG (ACTIVE LOW)
Adapter configuration SHORT501 DRAW DATE TITLE
INSTPAR
60W / 3.03A / 96% 90W / 4.32A / 91.2%
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
Value SEC Code Value SEC Code ELECTRONICS
HK.PARK PR 5.0V_AUX&3.3V_AUX
Rtop 200K 2007-007334 10K 2007-007142 APPROVAL REV PART NO.
G_CHG H.J.KIM 1.2 CHARGER (MAX17085GTL) BA41-
Rbot 27.4K 2007-007274 30.1K 2007-002910
MODULE CODE LAST EDIT
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V_AUX & P5.0V_ALW
VDC VDC VDC VDC
KBC3_RST#
nostuff
C249 EC17
EC16 C197 100nF R221 C229 68uF
68uF 4700nF-X5R C220 25V 470K 100nF 25V
25V 100nF 1% 25V AL
SYSVR_VIN_MN
25V
AL 25V
KBC3_RST#
U11
9 4 3 2 TPS51125RGER TPS51125 2nd
D4 D3 D2 D1
16 13 G_P3.3V
VIN EN0 D1 7 8 P3.3V_AUX
D2
g
AON6912L DRVH1 DRVH2 AP4232GM
L7 1 2 S
1 L8
3.9uH S1_D2
PNS_SYSVR_PHASE1_MN 2.2uH
10 20 11 PNS_SYSVR_PHASE2_MN PNS_SYSVR_PHASE2_RC_MN
LL1 LL2
C247
R216
R186
C250
100nF
100nF
R188 R189
3.3
3.3
25V
25V
n
R214 R215 PNS_SYSVR_BST1_MN D1 5 6 10 10
EC15 10 10 G2 22 9 1% 1%
VBST1 VBST2 C231 C255 C254 C253
40V
D2 EC18
R190
C230
2
330uF
100nF
8
1.5K
PNS_SYSVR_BST1_RC_MN PNS_SYSVR_BST2_MN PNS_SYSVR_BST2_RC_MN Q41-2 100uF
1%
10V
6.3V S3 S2 S1 19 12 G
22000nF-X5R
AP4232GM 20% 20%
22000nF-X5R
10000nF-X5R
10000nF-X5R
7 6 5 DRVL1 DRVL2 6.3V 6.3V 16V
PNS_SYSVR_PHASE1_RC_MN ANS_SYSVR_BG1_MN ANS_SYSVR_BG2_MN 4 S
3 C251 6.3V 6.3V
1
AS
nostuff
u
C246 C245 1nF
SYSVR_PHASE2_RC_MN
B340A
1nF 1nF 50V
D512
C224
a
50V 50V
0.22nF
50V
s i
C 24 7
C
VO1 VO2 CAN Polymer 6t (15mohm)
nostuff
t
nostuff
R180 R182
C222 15K C225 6.19K
CAN Polymer 6t (15mohm) C221 0.22nF 1% 0.22nF 1% C226
SYSVR_FB2_MN
m
100nF 50V SYSVR_FB1_MN 2 5 50V 100nF
n
10V
VFB1 VFB2 10V
R179 R181 R184
332K 10K
R183 10K
1% 1% P2.0V_REF 150K 1%
a
1%
e
18 3
VCLK VREF
C223 G_P3.3V
S fid
G_P3.3V 220nF
P3.3V_MICOM 16V
P5.0V_STB P3.3V_MICOM
G_P3.3V
R753
100K 17
VREG5
P5.0V_STB 1%
23 8
AUX3_PWRGD 41-B4
PGOOD VREG3
SYSVR_ENTRIP2_MN C248 C227 P2.0V_REF P5.0V_STB
n
6
ENTRIP2 22000nF-X5R 10000nF-X5R
R187 20% 6.3V
D 3 6.3V
100K R185 C782
B 1% Q38 100K R755 B
4.7nF
G RHU002N06 1% 25V
0
R754
0
P12V_ALW
o
1
SYSVR_TONSEL_MN
S 2 4
Q37 TONSEL
RHU002N06 nostuff
R144 D 3 G_P3.3V G_P3.3V P5.0V_STB P2.0V_REF VDC P12.0V_ALW
1K R139 SYSVR_ENTRIP1_MN
1% 0 1
C
48-C2
ENTRIP1
G
KBC3_SUSPWR
34-C4,40-A4
41-B4,42-B2
44-A4,45-C4 1 R177 R178 R218 0
S 2 1M 100K 0
D 3 1% 1% R220
R118
nostuff Q36 15 14 SYSVR_SKIPSEL_MN
nostuff
nostuff S 2 MMBT3904
G_P3.3V
R219 2
3
C167
BZX84C12L
ZD1
P5.0V_STB 0
1nF
G_P3.3V nostuff 50V
C198
1
4700nF-X5R
25V
SHORT507
R768
100K
34-B3,37-B2
48-C2
KBC3_USBCHG
D 3
2
A A
BAT54C
Q35
R176 10K
G RHU002N06
3
1
D4
R175 S 2 SAMSUNG
1
475K G_P3.3V
34-C4,40-B4
41-B4,42-B2
44-A4,45-C4
48-C2 1% ELECTRONICS
KBC3_SUSPWR
4 3 2 1
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
DDR2 Power
VDC
D D
U9
RT8207GQW
15
VDDP
g
D1 7 8
C770 R155 D2
1000nF-X5R 5.1 Q23-1
25V 1% 21 PNS_DDR3VR_TG_MN G
AP4232GM
DDR3VR_VDD_MN UGATE P1.8V_AUX
14 2 S
1 -30V L6
VDD
n
2.2uH
C205 R154 PHASE
20 PNS_DDR3VR_PHASE_MN (5A)
1000nF-X5R 17.4K R738 C757 SIQ1048-2R2
OCP 11.4A
l
25V 1% PNS_DDR3VR_BST_RC_MN R108 R107
VDC 16 22 PNS_DDR3VR_BST_MN
10 10 EC13
CS BOOT D1 5 6 C137
u
DDR3VR_CS_MN
3.3 100nF D2 330uF
G_DDR 100nF
25V Q23-2 2.5V
10V
a
R151 19 ANS_DDR3VR_BG_MN G AP4232GM PNS_DDR3VR_PHASE_RC_MN 2409-001176
LGATE
750K 4 S
3 -30V C174 CAN Polymer 6t (15mohm)
1% fs = 340KHz 1nF
s i
C P3.3V_AUX DDR3VR_TON_MN 12 50V
C
TON
t
18
PGND
R152
200K R156 C208 C207
43.2K 1nF 100nF
m
DDR3VR_PGOOD_MN 13 1% 50V 10V
n
PGOOD DDR3VR_FB_MN
9 nostuff
FB
VTT Enable 10
KBC3_PWRON S3 R158 R157
34-B3,42-B4
44-C3,48-B3 43.2K 100K
a e
1% 1%
1K D6
SHORT508 MMBD4148
DDR3VR_KBC3_SUSPWR_RRD_MN
DDR3VR_S5_MN
3 1 11
KBC3_SUSPWR 75V
S5
8 G_DDR
VDDQ & VTTREF Enable
S fid
nostuff P1.8V_AUX VDDQ
R207 1K 1% C177 C175
AUX3_PWRGD 40-B3
nostuff
23
10000nF-X5R 100nF
R153 68K VLDOIN 6.3V 10V
5% C206 R162 R159
100nF 0 0 Skip Mode DDR3VR_MODE_MN 4 nostuff P0.9V
MODE
25V 24
VTT
2
G_DDR VTTSNS
R161 DDR3VR_DEM_MN 6
DEM
n
0 C178 C210
R160 10000nF-X5R 10000nF-X5R
NON-Tracking Discharge 0 6.3V 6.3V
B 3
GND NC1
7 B
o
G_DDR nostuff 1
VTTGND
17
NC2
25
PAD
5
VTTREF MEM1_VREF
1203-005570 C209 15-D1,18-C3
C
G_DDR 26V 47nF
19-C3,48-B4
50V
G_DDR
SHORT506
INSTPAR
G_DDR
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR PWR_MEMORY
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. CHIPSET POWER(P1.5V_AUX & P1.05V)
C685
0.22nF
D 50V D
C684
CHSETVR_FB2_RC_MN nostuff
1nF
50V R664
CHSETVR_FB1_RC_MN
20K
1% 1% R666 R667
51.1K 15K
15K
R665 1% 1%
g
G_P1.5V
n l
CHSETVR_TONSEL_MN
nostuff
68uF 68uF 100nF C100 EC10
u
25V 25V 25V R663 R66 68uF
100nF
AL AL 25V
100K 100K 25V nostuff
AL
a
1% 1% nostuff
nostuff
s
43-C4,48-B2
i
nostuff
C VCCP3_PWRGD C686 C
0.22nF
C683 R668 50V
t
10nF 100K R59
6
5
4
3
2
1
CHPSETVR_PHASE1_RC_MN
25V 1% P1.5V_AUX
VO2
VFB2
TONSEL
GND
VFB1
VO1
9 4 3 2
D4 D3 D2 D1 C96 7 24 CHSETVR_PG1_MN C98 1.5K C84
100nF R63 G_P1.5VCHSETVR_EN2_MN8 PGD2 PGD1 R68 100nF D1 7 8 1% 100nF
m
25V 3.3 23 CHSETVR_EN1_MN 3.3 10V
n
P1.05V EN2 EN1 25V D2
Q10
PNS_CHSETVR_BST2_MN9 22 PNS_CHSETVR_BST1_MN Q11-1
VBST2 U509 VBST1
L4 AON6912L G1 PNS_CHSETVR_BST2_RC_MN PNS_CHSETVR_TG2_MN10 21 PNS_CHSETVR_TG1_MN PNS_CHSETVR_BST1_RC_MN G
AO4822AL L5
1 DRVH2 DRVH1 C121
2.2uH 11
PNS_CHSETVR_PHASE2_MN TPS51124RGER 20 PNS_CHSETVR_PHASE1_MN 2 S
1
ANS_CHSETVR_BG2_MN12
LL2 LL1
S1_D2 19 ANS_CHSETVR_BG1_MN 2.2uH
20%
a
DRVL2 1203-004708
22000nF-X5R 6.3V
DRVL1
10000nF-X5R 6.3V
e
SIQ1048-2R2 10 R69 R67 SIQ1048-2R2 6.3V
D1 5 6 C120
PGND2
PGND1
2703-003232 20%
V5FILT
2703-003232 R64 R62 10 10 EC12
TRIP2
TRIP1
D2 22000nF-X5R 10000nF-X5R
V5IN
THM
EC7 10 10 Q11-2 C123 6.3V 330uF
330uF G2 G 2.5V
AO4822AL 2409-001176
2.5V 8 4 S
3 PNS_CHSETVR_PHASE1_RC_MN
S fid
2409-001176 CAN Polymer 6t (15mohm)
25
13
14
CHSETVR_5VFILT_MN 15
16
17
18
CAN Polymer 6t (15mohm)
PNS_CHSETVR_PHASE2_RC_MN S3 S2 S1 C94 C99
C95 7 6 5 1nF P5.0V_AUX 1nF C122
1nF 50V 50V
CHSETVR_TRIP2_MN
nostuff
50V
CHSETVR_TRIP1_MN
C689 nostuff
nostuff
R675 4700nF-X7R nostuff
3.3 6.3V
C688
n
1000nF-X7R
6.3V
B R674 R676 B
D511 20K 10K
o
MMBD4148 1% 1%
75V
3 1
R669
10K
34-B3,41-C4
44-C3,48-B3 G_P1.5V 1%
C
KBC3_PWRON 45-C4,48-C2
KBC3_SUSPWR
R65 41-B4,44-A4
39.2K 34-C4,40-A4
1%
C97 C687
100nF 100nF
10V 10V
G_P1.5V G_P1.5V
INSTPAR
SHORT3
G_P1.5V
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR PWR_MV_Cantiga
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
CPU VRM [TI IMVP6+]
EXCEPT AS AUTHORIZED BY SAMSUNG. VDC
C132
10000nF-X5R
U510 6.3V 5
TPS51620RHAR D
13 26
CPU1_PSI# 10-D4,48-C4
PSI# V5IN
Q8
20 30 PNS_CPUVR_TG1_MN G AON6414L
CPU1_VID(0) 10-D4,48-C2 19
VID0 DRVH1 CPU_CORE
CPU1_VID(1) VID1 4 L3
10-D4,48-C2 18 S1 S2 S3 0.39uH
CPU1_VID(2) VID2
C108
17 28 1 2 3
220nF
10-D4,48-C2 PNS_CPUVR_PHASE1_MN
R70
g
CPU1_VID(3) VID3 LL1
3.3
25V
10-D4,48-C2 16 MPO104-R39
CPU1_VID(4) 10-D4,48-C2 15
VID4
29 PNS_CPUVR_BST1_MN D 5 2703-002992
CPU1_VID(5) VID5 VBST1 R660 R659
1
4
10-D4,48-C2 14 PNS_CPUVR_BST1_RC_MN 10 10 R60 EC511
CPU1_VID(6) 10-D4,48-C2
VID6
Q9 3.01K EC509 1000uF
R683 499 1% 32 27 1% 2.5V
n
CHP3_DPRSLPVR
CPUVR_DRRSLPVR_MN
DPRSLPVR DRVL1
ANS_CPUVR_BG1_MN G 330uF nostuff
14-B1,22-C3
49-B4 12 4 AON6704L PNS_CPUVR_PHASE1_RC_MN 2V
2
3
CPU1_DPRSTP# DPRSTP# AL
10-D4,14-B1
20-C1,48-A2 35
PWRMON C109 S1 S2 S3 C679
l
1nF 1 2 3 1nF 1 2
CPUVR_THERM_MN 10 50V 50V
THERM nostuff R61
u
R79 4.7K
150K 11 TH2
VR_TT# 1% ESR 4.5mohm
a
1% 25 NTCG163JF103HT
PGND
C708
s i
C R680 R701 470 C
CPUVR_VR_ON_MN 34 68nF CPUVR_CSP1_RC_MN
VCCP3_PWRGD 42-C3,48-B2
VR_ON
4 CPUVR_CSP1_MN 16V
CSP1 R702
0
C707
t
R679 P3.3V CPUVR_CSN1_MN R703 100nF
10K nostuff
5 1%
KBC3_VRON 34-C3,48-C4
CSN1
470 10V
0
R684
C709 C706 VDC
m
nostuff 10K
n
1% 0.033nF 0.033nF
22-C4,34-A4
49-B3 31 50V 50V
VRM3_CPU_PWRGD 33
PGOOD
CLK_EN#
EC11
a
P3.3V P5.0V C47 C48 C654
e
100nF 4700nF-X5R 4700nF-X5R 68uF
25V
25V 25V 25V
R687 0 AL
P3.3V P5.0V R688 0 CPUVR_OSRSEL_MN 38 2402-001144
nostuff
OSRSEL
S fid
R686 0
R685 0 CPUVR_TRIPSEL_MN 36
TRIPSEL
5
nostuff D
P5.0V_FILT_CPU
Q7
40 21 PNS_CPUVR_TG2_MN G AON6414L
V5FILT DRVH2
4 L2
C690 S1 S2 S3 0.39uH
P1.7V_VREF 1 2 3
n
2.2nF 23 PNS_CPUVR_PHASE2_MN
LL2
50V C110 MPO104-R39
2 22 PNS_CPUVR_BST2_MN 220nF D 5 2703-002992
VREF VBST2 R642 R641
B R71
25V
10 10 B
G_CPU C131 37
TONSEL 3.3 Q6 R49 EC510
o
220nF 24 ANS_CPUVR_BG2_MN G 3.01K 330uF
DRVL2 4
16V AON6704L PNS_CPUVR_PHASE2_RC_MN 1% 2V
C656 S1 S2 S3 C655 AL
1nF 1 2 3 1nF 1 2
G_CPU 50V 50V
nostuff R50
C
4.7K TH1
P1.7V_VREF CPUVR_CSP2_RC_MN 1% NTCG163JF103HT
A G_CPU A
DRAW DATE TITLE
G_CPU
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR PWR_CPU_MV_TPS51620
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Switched Power
D D
g
1 4 SI3456BDV-T1-E3
D1 S INSTPAR
2 SHORT7 1 4
D2 D1 S
5 2
D3 D2
R147 6 3 R78 5
D4 G Q28 D3
INSTPAR 6 3
n
R119 470K 200K D4 G
100K 1% AP4435GM SHORT6 1%
1% 1 8
S1 D1
l
2 7
S2 D2 INSTPAR D 3
C200 3
S3 D3
6
C118
3 SHORT5
u
D 4700nF R135 C195 4 5 Q12
Q31 10V 100K 10nF
G D4
C196 C193 G RHU002N06 C119 10000nF-X5R
44-C1,45-B4 RHU002N06 1% 25V KBC3_PWRON_INV# 60V 22nF 6.3V
C199
a
G -30V 100nF 4700nF 1
KBC3_PWRON_INV# 60V 4.7nF 10V 10V
25V
1 S 2
25V
s i
S 2
C D 3 R134 C
Q30 D 3 10K
1%
t
34-B3,41-C4 G RHU002N06
KBC3_PWRON 60V
Q27
42-B4,44-C3 48-B3
1 34-B3,41-C4 G
KBC3_PWRON RHU002N06
S 42-B4,44-C4 48-B3
1 60V
2
S 2
a m e n
S fid nostuff
n
nostuff
nostuff
Sleep’n Charger nostuff
nostuff
B nostuff B
P5.0V_ALW P5.0V_AUX nostuff
P5.0V_ALW P5.0V_AUX nostuff
o
Q39 nostuff
D1 D2 D3 D4
R174 0
1 2 5 6
AO6409L
R173 0 -20V
4S
C242
3
G
R172
C
10nF
100K 25V
1%
C243 C244
P5.0V_ALW_RRQ_P5.0V_AUX_MN 4700nF 100nF
P5.0V_ALW_RRCQ_P5.0V_AUX_MN
R213 6.3V 10V
KBC3_SUSPWR_RCQ_P5.0V_AUX_MN D 3
10K
1%
R171 10K 1% G
KBC3_SUSPWR C219 Q34
60V
34-C4,40-A4 1
41-B4,42-B2 10nF S 2 RHU002N06
45-C4,48-C2 25V
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR PWR_MV_SWITCHED
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
POWER DISCHARGER
R117
n g l
3
R136
100K
1%
R137
1K
1%
3 3
R138
49.9
1%
3
R140
10
3
R141
1K
u
D D D D D
10K
34-C4,40-A4 1% Q14 Q15 Q16 Q17 Q18
41-B4,42-B2 44-A4,48-C2 RHU002N06 RHU002N06 RHU002N06 RHU002N06 RHU002N06
a
G G G G G
KBC3_SUSPWR 60V 60V 60V 60V 60V nostuff nostuff
1 1 1 1 1 nostuff nostuff
s i
S 2 S 2 S 2 S 2 S 2
C nostuff nostuff C
nostuff nostuff
nostuff nostuff
t
nostuff
a m e n
S fid
P3.3V P5.0V P1.5V P1.05V
n
B D 3 D 3 D 3 D 3 B
Q19 Q20 Q21 Q22
o
44-C1 G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06
KBC3_PWRON_INV# 60V 60V 60V 60V
1 1 1 1
S 2 S 2 S 2 S 2
nostuff nostuff
nostuff nostuff
nostuff nostuff
C
nostuff nostuff
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR PWR_MV_DISCHARGER
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
Battery & SATA ODD SUBBOARD D
n g l
SAT1_TXP1_SUB
SAT1_TXN1_SUB
S1
S2
S3
J516
CDROM-SATA-13P
GND_1
TX+
TX-
u
S4
GND_2
S5
SAT1_RXN1_SUB RX-
a
S6
SAT1_RXP1_SUB S7
RX+
P5.0V_ODD GND_3
s i
C P1
C
DP
P2
5V_1
t
P3
C127 C125 C126 C129 C128 P4
5V_2
Female(M/B side) Male(Battery side) 100nF 10000nF-X5R 10000nF-X5R 100nF 100nF
P5
MD
nostuff 10V 6.3V 6.3V 10V 10V GND_4
P6
J507 nostuff GND_5
m n
BATT-CONN-7P 3711-007097 14
MNT1
15
7 7 MNT2
6 6
3710-002634
a
5 5 G_ODD
e
4 4
3 3
2 2 G_ODD
S fid
1 1
cannesl Project_LYON Connector
3710-002830 BATT-CONN-7P cannesl Project_OSLO2 Connector : 3710-002635
J505
Project_BONN Connector : 3710-002635
G_SUB G_SUB
MT2001 MT2002
n
RMNT-25-60-1P RMNT-25-60-1P SUB TO MAIN SATA ODD CONN
B B
G_SUB G_SUB
C o P5.0V_ODD
SAT1_TXP1_SUB
SAT1_TXN1_SUB
SAT1_RXN1_SUB
SAT1_RXP1_SUB
3708-002190
12
11
10
9
8
7
6
5
4
3
2
MT2008
RMNT-25-70-1P
MT2007
RMNT-25-70-1P
1 G_ODD G_ODD
CONN-12P-FPC
J3
ODD sub board mount hole
G_ODD
A A
DRAW DATE TITLE
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR SUB BOARD2
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
EMI1
EMI
GASKET-FINGER
g
cannesl
MT501 MT506 MT504 MT2009
RMNT-30-90-1P RMNT-30-90-1P RMNT-30-90-1P RMNT-25-70-1P (30,90) x 2
u n al CPU_CORE CPU_CORE
C669 C665
s i
C 1nF 1nF
C
50V 50V
t
(30,90) x 7, (25,70) x 1
m n
Add for EMC (Top), 2008.11.19
a
P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V
e
P1.8V_AUX P1.8V_AUX P1.8V_AUX
C82 C130 C678 C262 C515 C641 C26 C133 C5 C93
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
S fid
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V
C636 C547 C672
1nF 1nF 1nF
50V 50V 50V
Add for EMC (5th Layer), 2008.11.19 Add for EMC (Bottom), 2008.11.19
n
VDC VDC VDC VDC VDC VDC VDC VDC P5.0V_STB P5.0V_STB P5.0V_STB P5.0V_STB P5.0V_STB
B B
o
C3 C7 C83 C20 C107 C105 C653 C526 C90 C204 C744 C508 C256
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V
C
P5.0V P5.0V P5.0V P5.0V_ALW P5.0V_ALW P5.0V_ALW
Add for EMC (Bottom), 2008.11.19 C58 C266 C263 C512 C31 C194
100nF 100nF 100nF 100nF 100nF 100nF
25V 25V 25V 25V 25V 25V
CHECK
SY.KIM
DEV. STEP
9/23/2008
BONN-L SAMSUNG
ELECTRONICS
HK.PARK PR ICT PORT
APPROVAL REV PART NO.
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D AUD5_CBP_MN D
BAT3_SMCLK#
CPU1_NMI CHGVR_EN_MN
CPU1_TCK CHP3_GPIO18
CPU1_TDI CHP3_GPIO20
CPU1_TMS CHP3_SERIRQ
CRT3_RED CHP3_SLPS3#
FAN5_VDD CHP3_SLPS4#
SMB3_CLK CHP3_SLPS5#
CPU1_STPCLK#
CPU2_THERMDA
CPU2_THERMDC
CRT3_DDCDATA
g
DDR3VR_CS_MN
ADT3_SEL# DDR3VR_FB_MN
DDR3VR_S5_MN
AUD3_SPKR CPU1_DPSLP# FAN3_FDBACK#
CPU1_IGNNE# HDA3_AUD_SDO
n
CPU1_VID(0) HST3_SPI3_DI
CPU1_VID(1) HST3_SPI3_DO
CPU1_VID(2) KBC3_CHG4.2V
l
CPU1_VID(3) KBC3_CPURST#
CPU1_VID(4) KBC3_EXTSMI#
u
CPU1_PSI# CPU1_VID(5) KBC3_PWRBTN#
CPU1_VID(6) KBC3_RSMRST#
a
CRT3_DDCCLK KBC3_RUNSCI#
KBC3_SMDATA#
s i
C KBC3_BKLTON KBC3_SPI_CLK C
CPU1_SMI# KBC3_PRECHG KBC3_SPI_CS#
CRT3_BLUE CPU1_FERR# KBC3_PWRSW# KBC3_SPI_WP#
t
KBC3_A20G KBC3_SMCLK# KBC5_KSO(10)
KBC3_VRON CPU1_INIT# KBC5_KSO(11)
KBC5_KCLK KBC3_SPI_DO KBC5_KSO(12)
KBC5_MCLK KBC3_SUSPWR KBC5_KSO(13)
m n
KBC5_TCLK CPU1_TRST# KBC3_USBCHG KBC5_KSO(14)
CRT3_GREEN KBC5_KSI(0) KBC5_KSO(15)
CRT3_HSYNC KBC5_KSI(1) KBC5_USBCHG#
LCD3_BRIT CRT3_VSYNC KBC5_KSI(2)
a
MCD3_SDWP CRT5_HSYNC KBC5_KSI(3)
e
CRT5_VSYNC KBC5_KSI(4)
KBC5_KSI(5)
KBC5_KSI(6)
KBC5_KSI(7)
S fid
KBC5_KSO(0)
KBC5_KSO(1)
KBC5_KSO(2) LID3_SWITCH#
KBC5_KSO(3) LOM3_CLKREQ#
KBC5_KSO(4) LPC3_LFRAME#
KBC5_KSO(5) MCD3_REXT_MN
KBC5_KSO(6) MCD3_RSTN_MN
KBC5_KSO(7) MCD3_SDDATA0
KBC5_KSO(8) SMB3_ALERT# MCD3_SDDATA1
KBC5_KSO(9) SPK5_L_M_MN MCD3_SDDATA2
n
MEM1_VREF SPK5_L_P_MN MCD3_SDDATA3
SPK5_R_M_MN MCH1_CFG6_MN
SPK5_R_P_MN MCH1_HXSWING
B KBC3_CHGEN THM3_ALERT# MCH3_CLKREQ#
B
KBC3_PWRGD VCCP3_PWRGD
o
KBC3_PWRON
KBC5_KDATA BAT3_DETECT#
KBC5_MDATA BAT3_SMDATA#
KBC5_TDATA CHGVR_ICM_MN
SMB3_DATA CHGVR_VDD_MN
C
THM3_STP# LCD3_BKLTON CHP3_BIOSWP#
LPC3_LAD(0) CHP3_CPUSTP#
LPC3_LAD(1) CHP3_PCISTP#
LPC3_LAD(2) CHP3_RTCRST#
LPC3_LAD(3)
WLON_LED# MCD3_SDCD# MCH3_BKLTEN
MCD3_SDCLK
MCD3_SDCMD
MCH1_HVREF
CPU1_CPURST#
CPU1_DPRSTP#
PEX3_WAKE#
A A
SAMSUNG
ELECTRONICS
4 3 2 1
www.manuals.clan.su
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
g
CHGVR_VADJ_RQ_MN SYSVR_PHASE2_RC_MN CPU_CORE
CHP3_SATACLKREQ# CPU_CORE
CPU1_GTLREF_MN G_AUD P3.3V_MCD
CPU1_THRMTRIP# CHP3_VCCL1_05_MN G_AUD
CPUVR_DROOP_MN CHSETVR_TRIP1_MN G_AUD
n
CPUVR_ISLEW_MN CHSETVR_TRIP2_MN CHP3_VCCSUS1_5_2_MN G_AUD
CPUVR_THERM_MN CLK3_MICOM_XTAL1_MN G_CHG P5.0V_ALW
CPUVR_VR_ON_MN CPU1_PROCHOT#_MN CLK3_MICOM_XTAL2_MN
l
CRT3_BLUE_L_MN CPUVR_CSP1_RC_MN CLK3_PCLKMICOM_R_MN
DDR3VR_MODE_MN CPUVR_CSP2_RC_MN CPU1_THRMTRIP#_R_MN
u
CPUVR_TRIPSEL_MN G_CPU P5.0V_AUD
KBC3_LED_CHARGE# KBC3_USBPWRON#_R_MN P5.0V_AUD
a
PCI3_GNT0#_MN KBC3_THERM_SMCLK
PCI3_IRDY#_MN KBC3_LED_ACIN# MCH3_LCDVDDON_QR_MN
s i
C PCI3_PCLK#_MN KBC3_USBPWRON# G_DDR P5.0V_AUX C
PCI3_PERR#_MN LCD3_EDID_DATA P5.0V_AUX
MCH1_VTTLF1_MN PNS_CHGVR_BST_MN PNS_CHGVR_BST_RC_MN
t
PCI3_SERR#_MN MCH1_VTTLF2_MN PNS_CPUVR_TG1_MN PNS_CHSETVR_BST1_MN
MCH1_VTTLF3_MN PNS_CPUVR_TG2_MN PNS_CHSETVR_BST2_MN G_ODD P5.0V_ODD
PCI3_FRAME#_MN PNS_DDR3VR_TG_MN PNS_CPUVR_PHASE1_MN
MIN3_CLKREQ# PLT3_RST#_R_MN PNS_CPUVR_PHASE2_MN
m n
PCI3_CLKRUN# RTC1_BATT_R_MN THM3_TRIP_SET_MN PNS_DDR3VR_PHASE_MN
RTC1_BATT_MN WLON_LED#_LED_MN P5.0V_STB
SYSVR_FB2_MN
SPI3_MOSI_R_MN AUD5_MIC1_RIGHT_J_MN
a e
G_P1.5V P1.05V_PEG
AUD5_HP_LEFT_R_MN
AUD5_SENS_HP# TPD5_L_BUTTON# CHGVR_CHLIM_RQ_MN CHP3_SATALED#_LED_MN
CHGVR_CSIN_MN TPD5_R_BUTTON# CHGVR_PHASE_RL_MN
S fid
CHGVR_CSIP_MN CHGVR_VCOMP_RC_MN KBC3_CAPSLED#_LED_MN G_P3.3V P1.7V_VREF
CHGVR_CSON_MN VRM3_CPU_PWRGD
CHGVR_CSOP_MN ANS_CHGVR_BG_MN
CHGVR_DCIN_MN AUD5_HP_O_RIGHT CHSETVR_5VFILT_MN PNS_CPUVR_BST1_RC_MN
CHGVR_VADJ_MN SPK5_L_M_B_MN CHSETVR_FB1_RC_MN PNS_DDR3VR_BST_RC_MN LCD_VDD3V P12.0V_ALW
CHGVR_VDDP_MN SPK5_L_P_B_MN CHSETVR_FB2_RC_MN CHP3_SATACLKREQ#_R_MN
CHP3_CL_CLK_0 SPK5_R_M_B_MN CHGVR_ICM_RC_MN CHSETVR_TONSEL_MN CHPSETVR_PHASE1_RC_MN
CHP3_DPRSLPVR SPK5_R_P_B_MN CHP3_BATLOW#_MN CLK3_PCLKICH_R_MN CRT5_DDCDATA_CLK_D_MN
CHP3_PM_SYNC# CHP3_ME_RTCRST# CPUVR_DRRSLPVR_MN KBC3_LED_CHARGE#_R_MN P0.9V P4.75V_AUD
CHP3_SATALED# CPUVR_ISLEW_RR_MN MCH1_P1.05V_MPLL_R_MN
n
CHP3_SUSSTAT# CHP3_SATA1GP_MN KBC3_THERM_SMDATA MCH1_SM_RCOMP_V_OH_MN
MCH1_SM_RCOMP_V_OL_MN
MCH3_CLKREQ#_R_MN MCH1_VCC_AXG_SENSE_MN P1.5V P3.3V_MICOM
B CHP3_VCCL1_5_MN PNS_CPUVR_BST1_MN MCH1_VSS_AXG_SENSE_MN P1.5V
B
CHP3_XTALOUT_MN PNS_CPUVR_BST2_MN P3.3V_VDD_INV_EN_Q_MN
o
PNS_DDR3VR_BST_MN PNS_CHGVR_PHASE_RC_MN
PNS_CHSETVR_PHASE1_MN P3.3V P3.3V_MICOM_SW
PNS_CHSETVR_PHASE2_MN P3.3V
AUD3_SPKR_C_MN P3.3V
CPU1_FERR#_R_MN MCH1_P1.05V_PEG_PLL_MN P3.3V
C
CPUVR_OSRSEL_MN MCH1_P1.8VAUX_SM_CK_MN P5.0V P5.0V_FILT_CPU
CPU1_PWRGDCPU AUD5_HP_O_LEFT CRT3_GREEN_L_MN P3.3V_VDD_INV_EN_QR_MN P5.0V
CPU1_VCCSENSE CRT3_P5.0V_D_MN PNS_CHGVR_DCJACK_QB_MN P5.0V
CPU1_VSSSENSE PNS_CHSETVR_BST1_RC_MN P5.0V
CPUVR_CSN1_MN AUD5_SENS_A_MN PNS_CHSETVR_BST2_RC_MN P1.05V
CPUVR_CSN2_MN DDR3VR_PGOOD_MN PNS_CPUVR_PHASE1_RC_MN P1.05V
CPUVR_CSP1_MN CHGVR_ACLIM_MN KBC3_LED_POWER# ANS_CHSETVR_BG1_MN PNS_CPUVR_PHASE2_RC_MN P1.05V
CPUVR_CSP2_MN CHGVR_ACSET_MN ANS_CHSETVR_BG2_MN PNS_DDR3VR_PHASE_RC_MN P1.05V
CRT3_RED_L_MN CHGVR_CHLIM_MN MCD3_SDCLK_R_MN AUD5_HP_RIGHT_B_MN PNS_SYSVR_PHASE2_RC_MN PRTC_BAT VDC
DDR3VR_DEM_MN CHGVR_DCPRN_MN MCD3_SDDATA0_MN AUD5_HP_RIGHT_R_MN CHGVR_KBC3_PRECHG_RQ_MN VDC
DDR3VR_TON_MN CHGVR_DCSET_MN AUD5_LDO_BYPASS_MN CHGVR_P3.3V_MICOM_RQ_MN VDC
DDR3VR_VDD_MN CHGVR_ICOMP_MN MCD3_SDDATA2_MN AUD5_MIC2_INT_B_MN CHP3_P1.5V_VCCDMIPLL_MN VDC
HDA3_AUD_BCLK CHGVR_SGATE_MN MCD3_SDDATA3_MN AUD5_MIC2_INT_J_MN P1.2V_LAN VREF
HDA3_AUD_RST# CHGVR_VCOMP_MN CHGVR_SGATE_RRQ_MN CHGVR_KBC3_CHG4.2V_RQ_MN
HDA3_AUD_SDI0 CHP3_BIOS_CRI# CHP3_EXTGFX_SEL_MN PNS_CHSETVR_PHASE1_RC_MN
HDA3_AUD_SYNC CHP3_CL_DATA_0 CHP3_LINKALERT#_MN PNS_CHSETVR_PHASE2_RC_MN
A A
DESIGN DATE TITLE
SAMSUNG
ELECTRONICS
4 3 2 1
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