Faculty of Engineering

Electrical Engineering Department

Computer and Control
Third Year
Second Semester
General System
Digital Electronic circuit
Resistance Transistor - RTL Logic(OR & NOR)

Done by:
Osama maaodhah (202270222)
Mutasim alkamil (202270192)
Fares qaid alselwi (202270243)

Supervision by:
Eng. Abdulraqeeb Alshraay

Sana’a .2024
Contents
Contents ............................................................ 2
Abstract ............................................................. 3
Introduction....................................................... 3
Objectives .......................................................... 3
OR & NOR Circuit ............................................... 4
Equipment ......................................................... 4
Procedures ........................................................ 5
Discussion .......................................................... 7
Conclusion ......................................................... 8
General Description (RTL-OR & NOR ) ................ 8
OR Gate ............................................................. 8
NOR Gate ......................................................... 10

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Abstract
The objective of this laboratory experiment is to design and test a
OR&NOR gates using resistor-transistor technology. The OR&NOR gates
is a fundamental components in digital logic, and understanding its
operation is essential for further studies in digital electronics. The
experiment involves the use of transistors, resistors, switches and a multi-
meter to construct and test the OR and NOR gates circuit on a breadboard
The logic functions are achieved through specific connections of these
components.

Introduction
To achieve digital logic levels in practical circuitry, two controllable stable
states are required. The logic levels are referred to in the binary number
system as 'zero' and 'one'. The two stable states are referred to as 'low' and
'high.' In the laboratory, the current switching properties of bipolar junction
transistors and diodes can be used to develop analog circuits which form
the basic building blocks required to implement digital logic processes.
Three basic digital circuits will be built in this experiment.

Objectives
The objective of this experiment is to build and test the OR and NOR logic
circuits using resistors and transistors. The electrical signals in the logic
circuits will be measured to verify their correct functionality, and the
measurement results will be analyzed.:
1. Analyze the circuit: The operation of the OR&NOR gates and how
it responds to different input combinations.
2. Understand the role of resistors: Learn why specific resistor values
are chosen for the OR&NOR gates and how they support the
desired fan out.
3. Explore the characteristics of the OR & NOR gates: Study the input
and output characteristics of the OR & NOR gates, which are
essential for understanding its behavior and performance.

3
OR & NOR Circuit
When the input signal applied to the circuit of Figure 1 is at a low voltage
level, (less than 0.7 volts) the base-emitter junction of the transistor is
driven into cut-off. In this case, no current flows through RC. (IC=O) The
output voltage will be high and equal to the
DC supply voltage. When the input voltage
becomes greater than 0.7 volts, the
transistor is driven into saturation. The
output voltage will be low and almost equal
to the junction saturation voltage VCE,SAT
(about 0.3 volts). The transistor of this
circuit functions as a switch and the circuit
operates as an inverter

Figure 1: circuit diagram

One-Transistor RTL Gate:-
The figure below shows a simple 3-input RTL
circuit which is a NOR gate. The circuit has
each input combined through a coupling
resistor (R1, R2, or R3) and fed to the base
of Q1. The coupling resistors provide isolation
that is less effective than that provided by
transistors or diodes. This isolation makes the
RTL sensitive to the value of the coupling
resistors and the number of inputs (fan-in).
Figure 2
Equipment:

1. Source DC (5V).
2. Three10k ohm resistor.
3. Two 1k ohm resistor.
4. Two Switches.
5. Two Transistor BC 107.
6. Multimeter.
7. Breadboard
8. Jumper wires.

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Procedures :

Circuit Design: This involves planning and selecting the

components for the NOR gate using RTL.
Circuit Assembly: This step involves assembling the NOR gate
on a breadboard
Circuit Testing: This involves testing the NOR gate to ensure it
functions correctly.
Data Collection: This step involves collecting data on the output
of the NOR gate for different input combinations.
Data Analysis: This involves analyzing the collected data to
identify any discrepancies or inconsistencies between the
expected and actual output.
1. Firstly, we connect the circuit as shown in the figure(2).
2. Constructing an OR & NOR logic circuit using resistors and
transistors and switches according to the given schematic in
the technical manual.
3. Place the resistors and transistors on the breadboard according
to the schematic, making sure to establish the correct
connections.
4. Connect the input signals to the appropriate terminals of the
OR & NOR gates circuit.
5. Connecting the multimeter to the collector, the first transistor,
reading the output of the NOR gate, and recording it with
changing the switch.
6. Connecting the multimeter to the collector, the second
transistor, reading the output of the OR gate, and recording it
with changing the switch.
7. Record the measured values .

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 - Equivalent circuit in Multisim

Figure 3 Equivalent circuit in Multisim

Results and Analysis:

Tabulate the measured values of the input and output signals for both the
OR and NOR logic circuits. Compare the measured values with the
expected truth table values. Analyze any discrepancies and discuss possible
sources of error in the experiment.

A B OR NOR
0 0 0 1

0 1 1 0

1 0 1 0

1 1 1 0

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Discussion
In this experiment, the OR and NOR logic gates were implemented using
resistors and transistors in the same electronic circuit. The objective was to
examine the functionality of both logic gates and compare the measured
values with their expected truth table values.
Upon constructing the circuit and applying power, the input signals were
connected to the appropriate terminals of the OR and NOR gates. The
output signals were then observed using a multimeter.
For the OR gate, the measured values of the input and output signals were
recorded and compared with the expected truth table values. It was
expected that the output would be high (logic "1") if any of the input signals
were high, and low (logic "0") only when both input signals were low. The
measured values were consistent with the expected truth table, confirming
the correct functionality of the OR gate.
Similarly, for the NOR gate, the measured values of the input and output
signals were compared with the expected truth table values. The output of
the NOR gate was expected to be low (logic "0") if any of the input signals
were high, and high (logic "1") only when both input signals were low. The
measured values aligned with the expected truth table, confirming the
proper operation of the NOR gate. During the experiment, several factors
could have contributed to discrepancies between the measured and
expected values. One possible source of error could be due to inaccuracies
in the component values or variations in the characteristics of the resistors
and transistors used. Additionally, issues related to the quality of the
connections, such as loose connections or improper wiring, could have
influenced the results. To improve the accuracy of the experiment, careful
attention should be given to the selection and calibration of the resistors
and transistors. It is also important to ensure secure and proper connections
throughout the circuit. Using high-quality components and conducting
multiple trials can further enhance the reliability of the results. Overall, the
experiment successfully demonstrated the implementation of the OR and
NOR logic gates using resistors and transistors in the same circuit. The
measured values aligned with the expected truth table values, indicating
the proper functionality of both logic gates. This experiment provided
valuable insights into digital electronics and reinforced the understanding
of logic gate operations.
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Conclusion
In conclusion, the Resistors Transistor Logic (OR & NOR) experiment
demonstrated the implementation of logic gates using resistors and
transistors. The measured values of the input and output signals were
compared to the expected truth table values, and any discrepancies were
analyzed. The experiment provided hands-on experience in digital
electronics and reinforced the understanding of logic gate functionality.
The experiment successfully achieved its objective of exploring the
behavior of the NOR gate in RTL and its role as a fundamental building
block of digital logic circuits

General Description (RTL-OR & NOR ) :

 OR Gate
The OR gate differs from the AND gate in that only ONE input has to be
HIGH to produce a HIGH output. An easy way to remember the OR gate is
that any HIGH input will yield a HIGH output.

Logic Symbol
The figure below shows the standard symbol for the
OR gate. The number of inputs can vary according to
the needs of the designer.

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 OR Gate Equivalent Circuit
The OR gate may also be represented by a simple circuit as shown in the
figure below. In the OR gate, two switches are placed in parallel. If either or
both of the switches are closed (view 1), the lamp will light. The only time
the lamp will not be lit is when both switches are open (view 2).

Figure 4. OR gate equivalent circuit.

Let’s assume we are applying two variables, A and B, to the inputs of an OR
gate. For the circuit to produce a HIGH output, either variable A, variable B,
or both must be HIGH. The Boolean expression for this operation
is f = A+B and is spoken "f equals A OR B." The plus sign indicates the OR
function and should not be confused with addition.

OR Gate Operation
Look at the figure below. At time t0, both A and B are LOW and f is LOW.
At t1, B goes HIGH producing a HIGH output. At t2 when both inputs go
LOW, f goes LOW. When A goes HIGH at t3, f also goes HIGH and remains
HIGH until both inputs are again LOW. At t5, both A and B go HIGH
causing f to go HIGH.

Figure 5. OR gate signals.

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Truth Table
Using the inputs, A and B, let’s construct a Truth Table for the
OR gate. You can see from the discussion of the figure above
that there are four combinations of inputs. List each of these
combinations of inputs and the respective outputs and you have
the Truth Table for the OR gate.
When writing or stating the Boolean expression for an OR gate
with more than two inputs, simply place the OR sign (+) between each input
and read or state the sign as OR. For example, the Boolean expression for an
OR gate with the inputs of A, B, C, and D would be:
f = A+B+C+D
This expression is spoken "f equals A OR B OR C OR D."

 NOR Gate
The NOR gate is an OR gate with an inverter on the output. The NOR gate
will have a HIGH output only when all the inputs are LOW. The standard
logic symbol for this gate is shown in the figure below. More than just the
two inputs may be shown.

NOR gate.

When broken down, the two functions performed by the NOR gate can be
represented by the equivalent circuit depicted in the figure below. When
both inputs to the OR gate are LOW, the output is LOW. A LOW applied to
an inverter gives a HIGH output. If either or both of the inputs to the OR
gate are HIGH, the output will be HIGH. When this HIGH output is applied
to the inverter, the resulting output is LOW. The Boolean expression for the
output of this NOR gate is f = A + B.

NOR gate equivalent circuit.

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NOR Gate Operation
The logic level inputs and corresponding outputs for a NOR gate are shown
in the figure below. At time t0, both A and B are LOW; as a result, f is
HIGH. At t1, A goes HIGH, B remains LOW, and f goes LOW. At t2, A goes
LOW, B goes HIGH, and the output remains LOW. The output goes HIGH
again at t3 when both inputs are LOW. At t4 when both inputs are HIGH, the
output goes LOW and remains LOW until t5 when both inputs go LOW.
Remember the output is just opposite of what it would be for an OR gate.

Figure 6. NOR gate input and output signals.

Truth Table
The Truth Table for a NOR gate with A and B as inputs
is shown below.

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