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Lecture 3 DataPath Components

The document discusses various datapath components used in system-on-chip designs including comparators, multipliers, and arithmetic logic units. It describes the design and operation of equality comparators, magnitude comparators, and array-style multipliers. Examples are provided to illustrate the components.

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0% found this document useful (0 votes)
54 views9 pages

Lecture 3 DataPath Components

The document discusses various datapath components used in system-on-chip designs including comparators, multipliers, and arithmetic logic units. It describes the design and operation of equality comparators, magnitude comparators, and array-style multipliers. Examples are provided to illustrate the components.

Uploaded by

Mustafa
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 9

10/18/2023

EE 3007 SoC Design


Datapath Components

Datapath Components

 Comparator
 Multipliers
 ALU (Arithmetic and Logic Unit)

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10/18/2023

Datapath Components
Comparators

 N-bit equality comparator: Outputs 1 if two N-bit numbers are equal


 4-bit equality comparator with inputs A and B
 a3 must equal b3, a2 = b2, a1 = b1, a0 = b0
 Two bits are equal if both 1, or both 0
 eq = (a3b3 + a3’b3’) * (a2b2 + a2’b2’) * (a1b1 + a1’b1’) * (a0b0 + a0’b0’)
 Recall that XNOR outputs 1 if its two input bits are the same
 eq = (a3 xnor b3) * (a2 xnor b2) * (a1 xnor b1) * (a0 xnor b0)

a3 b3 a2 b2 a1 b1 a0 b0
0110 = 0111 ? 0 0 1 1 1 1 0 1

a3 a2 a1 a0 b3 b2 b1 b0
1 1 1 0
4-bit equality comparator
eq

(b)
0 eq
(a)
3

Datapath Components
Magnitude Comparator

 N-bit magnitude comparator


 Indicates whether A>B, A=B, or A<B, for its two A=1011 B=1001
N-bit inputs A and B
1011 1001 Equal
 How to design? 1011 1001 Equal
 Consider how compare by hand.
 First compare a3 and b3. If equal, compare a2 1011 1001 Unequal
and b2. And so on. Stop if comparison not
equal -- whichever’s bit is 1 is greater. If never So A > B
see unequal bit pair, A=B.

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10/18/2023

Datapath Components
Magnitude Comparator

 By-hand example leads to idea for design


 Start at left, compare each bit pair, pass results to the right
 Each bit pair called a stage
 Each stage has 3 inputs indicating results of higher stage, passes results to lower stage

a3 b3 a2 b2 a1 b1 a0 b0

a b a b a b a b
Igt in_gt out_gt in_gt out_gt in_gt out_gt in_gt out_gt AgtB
Ieq in_eq out_eq in_eq out_eq in_eq out_eq in_eq out_eq AeqB
Ilt in_lt out_lt in_lt out_lt in_lt out_lt in_lt out_lt AltB

Stage 3 Stage 2 Stage 1 Stage 0


(a)

0 Igt a3 a2 a1 a0 b3 b2 b1 b0
AgtB
1 Ieq 4-bit magnitude comparator AeqB
0 Ilt AltB

(b)
5

Datapath Components
8 bit Magnitude Comparator
A[7:4] B[7:4] A[3:0] B[3:0]

0 Igt a[3:0] b[3:0] Igt a[3:0] a[3:0]


AgtB AgtB
1 Ieq 4-bit magnitude comparator AeqB Ieq 4-bit magnitude comparator AeqB
0 Ilt AltB Ilt AltB

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10/18/2023

Datapath Components
Magnitude Comparator

a3 b3 a2 b2 a1 b1 a0 b0

a b a b a b a b
Igt in_gt out_gt in_gt out_gt in_gt out_gt in_gt out_gt AgtB
Ieq in_eq out_eq in_eq out_eq in_eq out_eq in_eq out_eq AeqB
Ilt in_lt out_lt in_lt out_lt in_lt out_lt in_lt out_lt AltB

Stage 3 Stage 2 Stage 1 Stage 0

 Each stage:
 out_gt = in_gt + (in_eq * a * b’)
 A>B (so far) if already determined in higher stage, or if higher stages equal but in this stage a=1
and b=0
 out_lt = in_lt + (in_eq * a’ * b)
 A<B (so far) if already determined in higher stage, or if higher stages equal but in this stage a=0
and b=1
 out_eq = in_eq * (a XNOR b)
 A=B (so far) if already determined in higher stage and in this stage a=b too
 Simple circuit inside each stage, just a few gates (not shown)

Datapath Components
Magnitude Comparator Example: Minimum of Two Numbers

 Design a combinational component that computes the minimum of


two 8-bit numbers

11000000 01111111
a
MIN A B 8 8

8 8 8 8
A B

A B 1 I1 I0 M in
0 Igt AgtB s
8-bit magnitude comparator
0 8-bit
C
1 Ieq AeqB
0 Ilt
0 2x1 mux 8
AltB

8
(b)
C
(a)
01111111

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10/18/2023

Datapath Components
Multipliers – Array Style

 Can build multiplier that mimics multiplication by hand


 Notice that multiplying multiplicand by 1 is same as ANDing with 1

Datapath Components
Multipliers – Array Style

 Generalized representation of multiplication by hand

10

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10/18/2023

Datapath Components
Multipliers – Array Style

 Multiplier design – array of AND gates

a3 a2 a1 a0

b0

pp1
b1

0 0

pp2
b2
+ (5-bit)
00

pp3
b3
+ (6-bit) A B
0 00 *

pp4
P

+ (7-bit)
Block symbol
p7..p0

11

Datapath Components
Arithmetic Logic Unit (ALU)

 Arithmetic Logic Unit (ALU)


 Perform any of various arithmetic (add, subtract, increment, etc.) and logic (AND, OR, etc.)
operations, based on control inputs
 Motivation
 Suppose want multi-function calculator that not only adds and subtracts, but also
increments, ANDs, ORs, XORs, etc

Inputs Sample output if


Outputs A=0000 1111,
x y z B=0000 0101
0 0 0 S=A+B S = 0001 0100
0 0 1 S=A-B S = 0000 1010
0 1 0 S=A+1 S = 0001 0000
0 1 1 S=A S = 0000 1111
1 0 0 S = A AND B (bitwise AND) S = 0000 0101
1 0 1 S = A OR B (bitwise OR) S = 0000 1111
1 1 0 S = A XOR B (bitwise XOR) S = 0000 1010
1 1 1 S = NOT A (bitwise complement) S = 1111 0000

12

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10/18/2023

Datapath Components
Multifunction Calculator without an ALU

 Can build multifunction calculator


using separate components for DIP switches

each operation, and muxes 1


0
 But too many wires, and wasted 8 8
power computing all those
A B
operations when at any time you
only use one of the results Wasted
+ Ð +1 AND OR XOR NOT
power
8 8
8
8
8 8 8
8
1 0 A lot of wires
0 1 2 3 4 5 6 7
x
s2
y 8-bit 8x1 mux
s1
z s0
8
e
Id
8-bit register
clk
CALC
8

LEDs

13

Datapath Components
ALU Example: Multifunction Calculator

 Design using ALU is elegant and efficient


 No mass of wires
 No big waste of power

DIP switches DIP switches

1 1 1 1
0 0 0 0
8 8 6 6
A B A B
1 0 A B
Wasted x
+ Ð +1 AND OR XOR NOT power x
y ALU
8 8 8 y
8 z z S
8 8 8
8 6
1 0 0 1 2 3 4 5 6 7 A lot of wi res.
x e
y s2 ld
s1 6-bit register
z s0 8-bit 8x1 mux clk
8 6 CALC
e Id
8-bit register
clk CALC LEDs
8

LEDs

14

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10/18/2023

Datapath Components
Arithmetic-Logic Unit (ALU)

 More efficient design uses ALU


 ALU design not just separate components multiplexed (same problem as previous
slide!),
 Instead, ALU design uses single n-bit adder, plus logic in front of adder’s A and B
inputs => Logic in front is called an arithmetic-logic extender
 Arithmetic-logic extender modifies the A and B inputs such that desired operation will
appear at output of the adder

15

Datapath Components
Arithmetic-Logic Extender in Front of ALU

 xyz=000
 Want S=A+B
 Pass a to ia, b to ib, and set cin=0
 xyz=001
 Want S=A-B
 Pass a to ia, b’ to ib, and set cin=1
 xyz=010
 Want S=A+1
 Pass a to ia, set ib=0, and set cin=1
 xyz=011
 Want S=A
 Pass a to ia, set ib=0, and set cin=0
 xyz=100
 Want S=A AND B
 Set ia=a*b, b=0, and cin=0
 others: likewise

 Based on above
 Create logic for ia(x,y,z,a,b) and ib(x,y,z,a,b)
for each abext
 Create logic for cin(x,y,z), to complete design
of the AL-extender component

16

8
10/18/2023

Datapath Components
Designing an ALU – Example 1

a1 b1 a0 b0
 Given a 2-bit ALU,
AL-ext
Find its operation table 0 0 0 0 0 1 0 0
Inputs
Outputs 0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3
x y x
0 0 S=
y
ia1 ib1 ia0 ib0 cin
0 1 S=
1 0 S=
1 1 S=

IA IB
2-bit Adder cin

17

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