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MES Module 1

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22 views64 pages

MES Module 1

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daniel007work
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© © All Rights Reserved
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MICROCONTROLLER AND

EMBEDDED SYSTEMS (PCI)


22AML135

Lt. Rohini Thrimurthy


Assistant Professor
Dept. of ECE
BNMIT
Course outcome
• CO 1: Provide the student with a basic understanding of microcontroller and embedded systems design.
• CO 2: Learn the addressing modes, instructions, and assembler directives and develop the ALP to solve
problems.
• CO 3: Develop embedded C programs for microcontrollers and run on the simulator, target board and various
interfaced hardware devices.
• CO 4: Integrate Hardware and Software to Implement the required embedded smart systems
• CO 5: Simulate and demonstrate the solution for the given problem using Arduino.

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 2


Syllabus and book
1. M. Morris Mano, Digital Design, 4th Edition, Pearson Prentice Hall 2008
2. Joseph Yiu, ''The Definitive Guide to the ARM Cortex-M3", 211d Edition, Newnes, (Elsevier), 2010.
3. Shibu K V, "Introduction to Embedded Systems", Tata McGraw Hill Education Private Limited, 2nd Edition.
4. Exploring Arduino: Tools and Techniques for Engineering, Wizardry 1st Edition WILEY, ISBN-10: 1118549368,

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 3


BINARY LOGIC
A= 1100 1010
7 6 5 4 3 2 1 0

1 1 0 0 1 0 1 0

MSB?
LSB?
0th bit
How to make 2nd bit high
How to make 4th and 3rd bit low

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 4


Puzzle
• A king is hosting a grand party where 1000 Jars of the drink are
prepared. He gets the news just 1 hour before that, someone has
poisoned one of the jars. If anyone consumes it from that Jar he will
die in 1 hour. The king also has 100 prisoners. If you are his minister
how will you help him identify which Jar is poisoned?

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 5


Number System

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 6


Bits
NIBBLE 1110
BYTE 1100 0101
WORD 1100 0101 1100 0101
DOUBLE WORD 1100 0101 1100 0101 1100 0101 1100 0101

10- BIT= REPRESENTS __________ DIFFERENT VALUES

2^10= 1024= 1K

32 BIT?
MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 7
Solve it and give the answer in Hexadecimal

PROBLEM
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

1 1 1 0 0 0 1 1 1 0 1 1 1 1 0 0 0 1 1 1 1 0 1 0 1 1 1 0 0 1 0 1

0 0 0 0

The mentioned positions should be zero, what operations will you perform with what number for the given binary number?

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 8


Logic gates- Another perspective

L= A . B L= A + B

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 9


Canonical and standard forms

= "(3,5,6,7)

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 10


MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 11
Rules

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 12


Write the digital circuit

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 13


Solutions:
1. x’+y
2. x
3. 1
4. x’+y+z’
5. xy’+x’z’
MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 14
Solutions

4 =x’+y+z’ Since x’+ xz’= x’+ z’

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 15


MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 16
QUAD Integrated Circuits

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 17


QUAD Integrated Circuits

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 18


Lab exp1: Simplification and Realization of given Boolean
Expression using logic gates.

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 19


LAB EXP 2

• Realize
Half Adder & Full Adder using logic gates.
Half Subtractor & Full subtractor using logic gates.

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 20


Equation
Half Adder

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 21


Full Adder

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 22


Half Subtractor Equation

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 23


Full Subtractor

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 24


Karnaugh map (K-map)

Resource: https://www.youtube.com/watch?v=0vEvpcY8O3o&list=PLxCzCOWd7aiGmXg4NoX6R31AsC5LeCPHe&index=13

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 25


K- map Rules for simplification

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 26


K- map Rules for simplification

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 27


K- map Rules for simplification

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 28


Summary of K- map Rules for simplification

Resource: https://www.slideshare.net/vanithachandru/karnaugh-map-24702642
MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 29
2 variable k-map

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 30


3 variable k-map

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 31


4 variable k-map

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 32


3var SOP example

PRIME IMPLICANTS:
x’y
xy’

F (x,y,z)= x’y + xy’ Next question:

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 33


using K-Map

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 34


Example of essential prime implicants
F (A, B, C)= ∑ m (1, 3, 6, 7)

PRIME IMPLICANTS:
A’C
AB
BC

ESSENTIAL PRIME IMPLICANTS:


A’C
AB

F (A, B, C)= A’C + AB

Resource: Byju’s MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 35


Example of essential prime implicants

PRIME IMPLICANTS: BC’D, ACD, ABC, ABD


Essential PRIME IMPLICANTS: BC’D, ACD, ABC
ABD IS NOT ESSENTIAL PRIME IMPLICANT

F(A,B,C,D) = BC’D+ ACD + ABC


MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 36
Example wrap around
• F (P, Q, R, S) = ∑(0, 2, 5, 7, 8, 10, 13, 15)

ESSENTIAL PRIME IMPLICANTS:


QS
Q’S’

F (P, Q, R, S) =QS + Q’S’

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 37


More examples
• Solve

• Lab Exp1

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 38


Lab Exp 3: Realize Binary to Gray & Gray to Binary Code Converters using Logic Gates.

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 39


MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 40
MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 41
4 var SOP examples

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 42


Solution

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 43


Significance of “Don’t Care” Conditions:
1. Simplification of the output:
These conditions denote inputs that are invalid for a given digital circuit. Thus, they can used to further simplify the
boolean output expression of a digital circuit.

2. Reduction in number of gates required:


Simplification of the expression reduces the number of gates to be used for implementing the given expression.
Therefore, don’t cares make the digital circuit design more economical.

3. Reduced Power Consumption:


While grouping the terms along with don’t cares reduces switching of the states. This decreases the memory space
that is required to represent a given digital circuit which in turn results in less power consumption.

4. Represent Invalid States in Code Converters:


These are used in code converters. For example- In design of 4-bit BCD-to-XS-3 code converter, the input
combinations 1010, 1011, 1100, 1101, 1110, and 1111 are don’t cares.

5. Prevention of Hazards in Digital Circuits:


Don’t cares also prevents hazards in digital systems.

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 44


BCD TO EXCESS-3 EXCESS-3 TO BCD

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 45


Example with don’t care and wrap around

F(P,Q,R,S) = P’QS + Q’S’ + PQ’

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 46


Example with don’t care

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 47


3 VAR POS
F (P, Q, R) = π(0,3,6,7)

QR
P

F’= PQ + QR + P’Q’R’

F (P, Q, R) = (P’ + Q’) (Q’ + R’) (P + Q + R)


MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 48
POS- 4 VAR

Solution:
A) SOP

Solution:
B) POS

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 49


Twisted questions on POS
• Minimise the following function in POS minimal form using K-
Maps: F(A, B, C, D) = m(0, 1, 2, 3, 4, 5) + d(12, 13, 14, 15)

• Writing the given expression in POS form:


F(A, B, C, D) = M(6, 7, 8, 9) + d(12, 13, 14, 15)

• F’= AC’+BC

• Applying De Morgan’s Theorem

• Therefore, POS minimal is,


F = (A'+ C)(B' + C')
MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 50
POS- 4 VAR with don’t care
F(A,B,C,D) = M(6,7,8,9) + d(10,11,12,13,14,15)

So, the minimized POS form of the function is:


F = A'(B' + C')

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 51


POS- 4 VAR
F (P, Q, R, S) = π (3, 5, 7, 8, 10, 11, 12, 13)

RS
PQ

F’= R’SQ + P’RS +PR’S’+PQ’R

F (P, Q, R, S) =(R + S’+ Q’).(P+R’ + S’).(P’+ R


+ S).(P’+ Q + R’)

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 52


Map Entered variable (MEV or VEM) Method

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 53


Rules to enter mapped variable in K-map

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 54


MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 55
MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 56
MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 57
MEV- SOLUTION

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 58


K-Map entry and simplification

Resource: https://www.youtube.com/watch?app=desktop&v=V1RGtdVOBKA

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 59


Simply using Quine- McClusky method
XYZ’ + XY’Z’ = XZ’
110 100 1- 0

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 60


Selection of prime implicants using Petrick's method

0 1 2 5 6 7 8 9 10 14
a’c’d (1,5) x x
a’bd (5,7) x x
a’bc (6,7) x x
b’c’ (0,1,8,9) x x x x

b’d’ (0,2,8,10) x x x x

cd’ (2,6,10,14) x x x x Solution:


f = a’bd + b’c’ + cd’

MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 61


MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 62
MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 63
MC and ES by Lt. Rohini T, Asst. Prof., BNMIT 64

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