Scribd
Upload
40 views3 pages

Lab 1 Sem 2 22 - 23

The document introduces the Terasic DE1-SoC development board and Quartus Prime design software. It provides procedures to create and test simple Verilog designs, including connecting switches to LEDs and driving 7-segment displays. Students will learn about the DE1-SoC board features, use Quartus Prime to compile designs, and test designs by programming the FPGA board.

Uploaded by

HANI SHAFIQAH BINTI RAZALI / UPM
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
40 views3 pages

Lab 1 Sem 2 22 - 23

The document introduces the Terasic DE1-SoC development board and Quartus Prime design software. It provides procedures to create and test simple Verilog designs, including connecting switches to LEDs and driving 7-segment displays. Students will learn about the DE1-SoC board features, use Quartus Prime to compile designs, and test designs by programming the FPGA board.

Uploaded by

HANI SHAFIQAH BINTI RAZALI / UPM
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

Department of Computer and Communication Systems Engineering

Faculty of Engineering
Universiti Putra Malaysia
43400 UPM Serdang
Selangor

Course : ECC3162 COMPUTER AND COMMUNICATION


SYSTEMS PRACTICAL II
Credit Hours : 1 (0+1)
Semester : 2 - 2022/2023
Lecturer : Pn. Roslizah binti Ali
Demonstrator : Aishah binti Abd Rahman
Wan Muhammad Haikal bin Sobri
Laboratory : Intelligent Systems Engineering Lab
Duration : 3 Hours

LAB 1 : INTRODUCTION TO QUARTUS PRIME AND DE1-SOC BOARD

Objectives:

1. To familiarize with the functionality of the DE1-SoC development board.


2. To create, compile and program Verilog HDL using Quartus Prime design
software.
3. To test Verilog designs on the DE1-SoC board.
List of Equipment / Components:

NO. EQUIPMENT QTY

1 Computer - Quartus Prime Software 1


2 Terasic DE1-SoC Board 1

Introduction:
In this lab the Terasic DE1-SoC board will be introduced. The lab will expose
students to the Quartus Prime design software as well as the necessary knowledge
to create, compile and test Verilog designs on the DE1-SoC board.

Procedures:

A. DE1-SoC board

In this lab, you will be using the DE1-SoC board developed by Terasic. Do your
own research and write on the following in your lab report:

1. The board diagram with the components (labelled) on the board.


2. The characteristics / features of the board.

B. Introduction to Quartus Prime Design Software

1. A guide for using the Quartus Prime software is given in the file
Quartus_Prime_Introduction_Verilog.pdf on PutraBLAST. Go through the
document in detail and implement all the procedures.
2. Record your results.
3. List out all the important steps to use Quartus Prime software for FPGA design.
C. Testing a simple Verilog design

1. Create a new Verilog HDL file by following ALL the steps that you have gone
through in Part B and use the following code:

// Simple module that connects the SW switches to the LEDR lights


module Lab_1 (SW, LEDR);
input [3:0] SW; // toggle switches
output [3:0] LEDR; // red LEDs
assign LEDR[0] = SW[0];
assign LEDR[1] = SW[1];
assign LEDR[2] = SW[2];
assign LEDR[3] = SW[3];
endmodule

2. Toggle the switches (SW0, SW1, SW2 and SW3) and observe the LEDs
(LEDR0, LEDR1, LEDR2 and LEDR3).
3. Modify the code so that all 10 switches (SW0-SW9) can be used to toggle all
10 LEDs (LEDR0-LEDR9). Test your design on the DE1-SoC board.
4. Write and compile a Verilog code to control one 7-segment display (HEX0)
using switches (SW0 – SW6) to produce numeric characters. Download and
test the compiled code on the DE1-SoC board.
5. Write and compile a Verilog code to display the word “CCSE” using four 7-
segment display. Download and test the compiled code on the DE1-SoC board.
6. Discuss all your results and conclude the findings of your experiment.

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy