LECTURE-08

Serial Communication Interfaces

in
AVR Microcontrollers

Part-3
I2C Protocol

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 Serial Communication Interfaces in AVR
I2C Protocol
• Inter-Integrated Circuit (I2C) is a serial communication
protocol crafted to facilitate interaction among
integrated circuits, enabling numerous devices to
communicate through a common bus.
• This protocol is recognized for its straightforwardness
and effectiveness in transmitting data.
• I2C is a synchronous, multi-master, multi-slave,
packet-switched serial communication protocol.
• It was developed by Philips (now NXP) and is widely used for communication between
integrated circuits, sensors, and peripherals in embedded systems.
• Like UART communication, I2C uses only two wires: a bidirectional Serial Data Line
(SDA) for data transfer and a unidirectional Serial Clock Line (SCL) for synchronization.
• Devices on the I2C bus are either masters, which is responsible for generation of clock
signal, initiation and termination of transfer, or slaves, which respond to master
requests.
• Each device on the bus has a unique 7-bit address (10-bit addressing is also supported),
allowing communication with multiple devices on the same bus.
• I2C combines the best features of SPI and UARTs. With I2C, you can connect multiple
slaves to a single master (like SPI) and you can have multiple masters controlling single,
or multiple slaves. Collision detection and arbitration mechanisms resolve conflicts
when multiple masters attempt to communicate simultaneously.
• This is really useful when you want to have more than one microcontroller logging data
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to a single memory card or displaying text to a single LCD.
• But the most common configuration is a single master and many slaves
Serial Communication Interfaces in AVR
I2C Protocol
I2C supported frequencies

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Serial Communication Interfaces in AVR
I2C Protocol
I2C Message Format

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Serial Communication Interfaces in AVR
I2C Protocol
I2C Message Format

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Serial Communication Interfaces in AVR
I2C Protocol
I2C Message Format

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Serial Communication Interfaces in AVR
I2C Protocol
Steps of Data Transmission

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Serial Communication Interfaces in AVR
I2C Protocol
Steps of Data Transmission

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Serial Communication Interfaces in AVR
I2C Protocol
Steps of Data Transmission

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Serial Communication Interfaces in AVR
I2C Protocol
I2C Connection Models

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Serial Communication Interfaces in AVR
I2C Protocol
I2C Connection Models

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Serial Communication Interfaces in AVR
I2C Protocol
ADVANTAGES AND DISADVANTAGES OF I2C

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I2C support in AVR
ATmega16/32 I2C Module

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 I2C support in AVR
ATmega16/32 I2C Module

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 I2C support in AVR 15

I2C Registers
TWBR: TWI Bit Rate Register
TWI bit rate register used in generating SCL frequency while operating in
master mode

TWCR: TWI Control Register

TWI control register is used to control events of all I2C communication.

➢ Bit 7 – TWINT: TWI interrupt

• This bit gets set whenever TWI completes its current event (like start, stop,
transmit, receive, etc).
• While I-bit in (AVR status register) SREG and TWIE bit in TWCR is enabled
then TWI interrupt vector called whenever TWI interrupt occur.
• TWI interrupt flag must be cleared by software by writing a logical one to it. This
bit is not automatically cleared by hardware.

TWI stands for "Two-Wire Interface." It's essentially another name for the I2C protocol.
The term "TWI" is often used to refer to the same protocol, especially by Atmel (now Microchip
Technology), which developed it for their microcontrollers due to trademark issues with the term "I2C."
 I2C support in AVR
I2C Registers
➢ Bit 6 – TWEA: TWI enable acknowledgment bit
• This is TWI acknowledgment enable bit, it is set in receiver mode to generate
acknowledgment and cleared in transmit mode.
➢ Bit 5 – TWSTA: TWI START condition bit
• The master device set this bit to generate START condition by monitoring free bus
status to take control over the TWI bus.
➢ Bit 4 – TWSTO: TWI STOP condition bit
• The master device set this bit to generate STOP condition to leave control over the
TWI bus.
➢ Bit 3 – TWWC: TWI write collision
• This bit gets set when writing to the TWDR register before the current transmission
not complete i.e. TWINT is low.
➢ Bit 2 – TWEN: TWI enable bit
• This bit set to enables the TWI interface in the device and takes control over the
I/O pins.
➢ Bit 1 - Reserved
➢ Bit 0 – TWIE: TWI interrupt enable
• This bit is used to enable TWI to interrupt routine while the I-bit of SREG is set as
long as the TWINT flag is high.

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 I2C support in AVR
I2C Registers
TWSR: TWI Status Register
➢ Bit 7:Bit 3 - TWS7: TWS3: TWI status bits
• TWI status bits shows the status of TWI control and bus

➢ Bit 1:0 - TWPS1:TWPS0: TWI pre-scaler bits

• TWI pre-scaler bits used in bit rate formula to calculate SCL frequency

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 I2C support in AVR
I2C Registers
TWDR: TWI Data Register
TWDR contains data to be transmitted or received. It’s not writable while TWI is
in process of shifting a byte. The data remains stable as long as TWINT is set.

TWAR: TWI Address Register

TWAR register contains the address of the TWI unit in slave mode.
It is mostly used in the multi-master system.

➢ Bit 7:1 - TWA6: TWA0: TWI address bits

• TWI address bits contain TWI 7-bit address with which it can called by other
masters in slave mode.
➢ Bit 0 – TWGCE: TWI general call enable bit
• It allows a master device to address all devices on the bus simultaneously.
• When the General Call feature is enabled (by setting the TWGCE bit in the TWAR
register in AVR microcontrollers), any device that recognizes the general call
address will respond to the following data transfer.
• This feature is useful for scenarios where a command or data needs to be 18
broadcast to multiple devices on the I2C bus without explicitly addressing each
one individually.
 I2C support in AVR
I2C Registers
There are four transmission modes in I2C in which the I2C device works.

• When the device is Master it works in MT and MR transmission modes.

• When the device is Slave it works in ST and SR transmission modes.

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 I2C support in AVR
Basic Configuration Steps of I2C AVR Devices
Master Mode Configuration Slave Mode Configuration
1.Initialize I2C: 1.Initialize I2C:
A. Enable the I2C interface. A. Enable the I2C interface.
B. Set the clock frequency (by B. Set the slave address (by writing to the TWAR register).
setting the prescaler and 2.Enable Address Recognition:
TWBR register). A. Enable the TWGCE bit in the TWAR register if you want to
2.Start Condition: respond to general call addresses.
A. Send a start condition to 3.Enable ACK and TWI:
begin the communication. A. Enable the ACK bit in the TWCR register to acknowledge the
B. Send the address of the address.
slave device (with the R/W B. Enable the TWI (Two-Wire Interface) by setting the TWEN
bit indicating write). bit in the TWCR register.
3.Send Data: 4.Handling Data Transfer:
A. Send data to the slave A. Wait for the address match and read/write command.
device (e.g., register B. If it's a write operation, receive the data from the master.
address or data to write). C. If it's a read operation, send the requested data to the
4.Stop Condition: master.
A. Send a stop condition to 5.Stop or Repeated Start Detection:
end the communication. A. Detect stop or repeated start conditions to determine when
the communication ends or a new transaction starts.
6.Disable TWI:
A. Disable the TWI by clearing the TWEN bit in the TWCR 20
register when communication is complete.
Example
#include <avr/io.h>
#include <util/delay.h>
#include <avr/interrupt.h>

#define F_CPU 8000000UL // Set CPU clock frequency to 8MHz

#define EEPROM_ADDRESS 0b10100000 // Example EEPROM I2C address

// Function prototypes // Generate start condition

void i2c_init(); void i2c_start() {
void i2c_start(); TWCR = (1 << TWINT) | (1 << TWSTA) | (1 << TWEN); // Start condition
void i2c_stop(); while (!(TWCR & (1 << TWINT))); // Wait for TWINT flag to be set
void i2c_write(uint8_t data); }
uint8_t i2c_read(uint8_t ack);

// Initialize I2C
void i2c_init() {
// Set TWI bitrate (100 kHz)
TWBR = 32; // ((F_CPU / SCL frequency) - 16) / (2 * prescaler value)
TWSR &= ~(1 << TWPS0); // Prescaler = 1

// Enable TWI module

TWCR |= (1 << TWEN); // Generate stop condition
} void i2c_stop() {
TWCR = (1 << TWINT) | (1 << TWSTO) | (1 << TWEN); // Stop condition
_delay_us(50); // Allow time for stop condition to complete 21
}
Example // Write data byte to I2C bus
void i2c_write(uint8_t data) {
int main(void) { TWDR = data; // Load data into TWDR register
// Initialize I2C TWCR = (1 << TWINT) | (1 << TWEN); // Clear TWINT bit to start transmission
i2c_init(); while (!(TWCR & (1 << TWINT))); // Wait for TWINT flag to be set (trans. complete)
}
// Main loop
while (1) {
// Start I2C communication
i2c_start();

// Write data to EEPROM (e.g., write address and data)

i2c_write(0x00); // EEPROM address to write to
i2c_write(0xAA); // Data to write

// End I2C communication

i2c_stop();

// Delay between write operations

_delay_ms(1000);
}
} // Read data byte from I2C bus
uint8_t i2c_read(uint8_t ack) {
TWCR = (1 << TWINT) | (1 << TWEN) | (ack << TWEA); // Clear TWINT bit to start reception
while (!(TWCR & (1 << TWINT))); // Wait for TWINT flag to be set (reception complete)
return TWDR; // Read received data from TWDR register 22
}
THANKS

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