0% found this document useful (0 votes)
77 views10 pages

A3290 1 Datasheet

Uploaded by

Eliezer Coronel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
77 views10 pages

A3290 1 Datasheet

Uploaded by

Eliezer Coronel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 10

A3290 and A3291

Chopper-Stabilized, Precision Hall-Effect Latches


for Consumer and Industrial Applications

FEATURES AND BENEFITS DESCRIPTION


• Symmetrical switchpoints The A3290 and A3291 Hall-effect latches are extremely
• Resistant to physical stress temperature-stable and stress-resistant sensor ICs, especially
• Superior temperature stability suited for operation over extended temperature ranges (up
• Output short-circuit protection to 125°C). Superior high-temperature performance is made
• Operation from unregulated supply possible through dynamic offset cancellation, which reduces
• Reverse battery protection the residual offset voltage normally caused by device package
• Solid-state reliability overmolding, temperature dependencies, and thermal stress. The
• Small package size two devices are identical except for their magnetic switchpoints.
They are not intended for automotive applications.
APPLICATIONS
Both devices include, on a single silicon chip, a voltage regulator,
• Industrial motor/encoders
a Hall voltage generator, a small-signal amplifier, chopper
• Commutation/index sensing
stabilization, a Schmitt trigger, and a short-circuit protected
• BLDC motors
open-drain output to sink up to 25 mA. A south polarity magnetic
• Fan motors
field of sufficient strength is required to turn the output on. A
north polarity field of sufficient strength is necessary to turn
PACKAGES: the output off. An onboard regulator permits operation with
Not to scale
supply voltages in the range of 3 to 24 V.
Two package styles provide a magnetically optimized package
for most applications: type LH is a miniature SOT23W low-
NOT FOR profile surface-mount package, and type UA is a three-pin
NEW DESIGN ultramini SIP for through-hole mounting. Both packages are
lead (Pb) free with 100% matte-tin leadframe plating.

3-pin SOT23W
(suffix LH)
3-pin SIP, 3-pin SIP,
matrix HD style chopper style
(suffix UA) (suffix UA)

VCC

Regulator

OUT
Low-Pass
Sample and Hold
Dynamic Offset

Filter
Cancellation

Amp Control

Current Limit

1Ω

GND

Functional Block Diagram

A3290-DS, Rev. 21 April 6, 2022


MCO-0000307
A3290 and Chopper-Stabilized, Precision Hall-Effect Latches
A3291 for Consumer and Industrial Applications

SPECIFICATIONS

SELECTION GUIDE
Magnetic Switchpoints [2]
Part Number Packing [1] Package Type Operate, BOP Release,
(G) BRP (G)

A3290KLHLT-T 3000 pieces per 7-in. reel Surface-mount SOT23W


A3290KLHLX-T 10000 pieces per 13-in. reel Surface-mount SOT23W 5 to 50 –50 to –5
A3290KUA-T [3] 500 pieces per bulk bag Through-hole ultramini SIP
A3291KLHLT-T 3000 pieces per 7-in. reel Surface-mount SOT23W
A3291KLHLX-T 10000 pieces per 13-in. reel Surface-mount SOT23W 10 to 100 –100 to –10
A3291KUA-T 500 pieces per bulk bag Through-hole ultramini SIP

[1] Contact Allegro for additional packing options.


[2] Algebraicconvention used: (+) south polarity, (–) north polarity.
[3] The chopper-style UA package is not for new design; the matrix HD style UA package is recommended for new designs.

ABSOLUTE MAXIMUM RATINGS


Characteristic Symbol Notes Rating Units
Supply Voltage VCC 26.5 V
Reverse Battery Voltage VRCC –30 V
Output Off Voltage VOUT 26 V
Device provides internal current limiting to help protect itself
Continuous Output Current IOUT 25 mA
from output short circuits
Reverse Output Current IROUT –50 mA
Magnetic Flux Density B Unlimited G
Operating Ambient Temperature TA Range K –40 to 125 °C
Maximum Junction Temperature TJ(max) 165 °C
Storage Temperature Tstg –65 to 170 °C
GND

3
Terminal List
Number
Name Function
LH UA
VCC 1 1 Power supply
OUT 2 3 Output
1 2 2
1 3
GND 3 2 Ground
VCC

VOUT

VCC

VOUT
GND

Package LH, Package UA,


3-Pin SOT23W Pinout 3-Pin SIP Pinout
Diagram Diagram

2
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A3290 and Chopper-Stabilized, Precision Hall-Effect Latches
A3291 for Consumer and Industrial Applications

ELECTRICAL CHARACTERISTICS: Over operating temperature range, unless otherwise noted


Characteristic Symbol Test Conditions Min. Typ. [1] Max Units
Supply Voltage Range [2] VCC Operating, TJ < 165°C 3.0 – 24 V
Output Leakage Current IOFF VOUT = 24 V, B < BRP – – 10 µA
Output Saturation Voltage VOUT(SAT) IOUT = 20 mA, B > BOP – 185 500 mV
Output Current Limit ION B > BOP 30 – 60 mA
Power-On Time tPO VCC > 3.0 V – – 50 µs
Chopping Frequency fC – 800 – kHz
Output Rise Time tR RLOAD = 820 Ω, CLOAD = 20 pF – 0.2 2.0 µs
Output Fall Time tF RLOAD = 820 Ω, CLOAD = 20 pF – 0.1 2.0 µs
B < BRP , VCC = 12 V – 3.0 8.0 mA
Supply Current ICC
B > BOP , VCC = 12 V – 4.0 8.0 mA
Reverse Battery Current IRCC VRCC = –20 V – – –5.0 mA
Zener Voltage VZ + VD ICC = 15 mA, TA = 25°C 28 – – V
Zener Impedance ZZ + ZD ICC = 15 mA, TA = 25°C – 50 – Ω
[1] Typical data at TA = 25°C, 12 V.
[2] Maximum VCC must be derated for power dissipation and junction temperature. See application information.

MAGNETIC CHARACTERISTICS [3]: Over VCC range, unless otherwise noted


Characteristic Symbol Test Conditions Min. Max. Units
TA = 25°C and TA(max) 5 50 G
A3290
TA = –40°C 5 50 G
Operate Point [4] BOP
TA = 25°C and TA(max) 10 100 G
A3291
TA = –40°C 10 100 G
TA = 25°C and TA(max) –50 –5 G
A3290
TA = –40°C –50 –5 G
Release Point [5] BRP
TA = 25°C and TA(max) –100 –10 G
A3291
TA = –40°C –100 –10 G
TA = 25°C and TA(max) 10 100 G
A3290
TA = –40°C – 100 G
Hysteresis (BOP – BRP) BHYS
TA = 25°C and TA(max) 20 200 G
A3291
TA = –40°C – 200 G
[3] Thepositive polarity symbol (+) indicates south magnetic field, and the negative polarity symbol (–) indicates north magnetic field.
[4] Required polarity observed and transition of magnetic gradient through BOP . See functional description.
[5] Required polarity observed and transition of magnetic gradient through B
RP after BOP . See functional description.

3
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A3290 and Chopper-Stabilized, Precision Hall-Effect Latches
A3291 for Consumer and Industrial Applications

THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information
Characteristic Symbol Test Conditions [1] Value Units
Package LH, 1-layer PCB with copper limited to solder pads 228 °C/W
Package LH, 2-layer PCB with 0.463 in.2 of copper area each side
Package Thermal Resistance RθJA 110 °C/W
connected by thermal vias
Package UA, 1-layer PCB with copper limited to solder pads 165 °C/W
[1] Additional thermal information available on Allegro website.

Power Derating Curve

25
24 VCC(max)
23
22
Maximum Allowable VCC (V)

21
20
19
18
17
16
15
14
13
12
2-layer PCB, Package LH
11 (RθJA = 110 ºC/W)
10
9 1-layer PCB, Package UA
8 (RθJA = 165 ºC/W)
7
6 1-layer PCB, Package LH
5 (RθJA = 228 ºC/W)
4 VCC(min)
3
2
20 40 60 80 100 120 140 160 180

Temperature (ºC)

Power Dissipation versus Ambient Temperature

1900
1800
1700
1600
1500
1400
1300
Power Dissipation, PD (m W)

1200 2-
l
1100 (R aye
θJ rP
A = C
1000 11 B, P
1-la 0 º ac
900 C/ ka
(R yer PC W
) ge L
800 θJA = B, P H
165 ack
700 ºC/ a
W) ge U
600 A
500 1-lay
400 er P
(R CB,
300 θJA =
228 Packag
ºC/W e LH
200 )
100
0
20 40 60 80 100 120 140 160 180
Temperature (°C)

4
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A3290 and Chopper-Stabilized, Precision Hall-Effect Latches
A3291 for Consumer and Industrial Applications

FUNCTIONAL DESCRIPTION
Chopper-Stabilized Technique recoverability after temperature cycling. This technique will also
slightly degrade the device output repeatability. A relatively high
The Hall element can be considered as a resistor array similar
sampling frequency is used in order to process faster signals.
to a Wheatstone bridge. A basic circuit is shown in Figure 1,
demonstrating the effect of the magnetic field flux density (B) More detailed descriptions of the circuit operation can be found on
impinging on the Hall element. When using Hall-effect tech- the Allegro website, including: Technical Paper STP 97-10, Mono-
nology, a limiting factor for switchpoint accuracy is the small lithic Magnetic Hall Sensing Using Dynamic Quadrature Offset
signal voltage (VHALL) developed across the Hall element. This Cancellation, and Technical Paper STP 99-1, Chopper-Stabilized
voltage is disproportionally small relative to the offset that can Amplifiers with a Track-and-Hold Signal Demodulator.
be produced at the output of the Hall device, caused by device
Operation
overmolding, temperature dependencies, and thermal stress.
The outputs of the A3290 and A3291 switch low (turn on) when
A large portion of the offset is a result of the mismatching of
a magnetic field perpendicular to the Hall element transitions
these resistors. The A3290 and A3291 use a dynamic offset
through and exceeds the Operate Point threshold (BOP). This
cancellation technique, with an internal high-frequency clock,
is illustrated in Figure 3. After turn-on, the output is capable of
to reduce the residual offset. The chopper-stabilizing technique
sinking 25 mA, and the output voltage reaches VOUT(SAT).
cancels the mismatching of the resistor circuit by changing the
direction of the current flowing through the Hall element (refer Note that these devices latch; that is, after a south (+) polarity
to Figure 2). To do so, CMOS switches and Hall voltage mea- magnetic field of sufficient strength impinging on the branded
surement taps are used, while maintaining VHALL signal that is face of the device turns on the device, the device remains on
induced by the external magnetic flux. until the magnetic field is reduced below the Release Point
threshold (BRP ). At that transition, the device output goes high
The signal is then captured by a sample-and-hold circuit and fur-
(turns off). The difference in the magnetic operate and release
ther processed using low-offset bipolar circuitry. This technique
points is the hysteresis (BHYS) of the device. This built-in hyster-
produces devices that have an extremely stable quiescent Hall
esis allows clean switching of the output, even in the presence
output voltage, are immune to thermal stress, and have precise
of external mechanical vibration and electrical noise.
B
+V CC When the devices are powered on, if the ambient magnetic field
has an intensity that is between BOP and BRP , the initial output
+VHALL
state is indeterminate. The first time that the level of B either
rises through BOP , or falls through BRP , however, the correct
output state is obtained.

–V HALL
Hysteresis of ΔVOUT
Figure 1: Hall Element, Basic Circuit Operation Switching Due to ΔB
V+
VOUT(off)
Regulator
Switch to High

Switch to Low
VOUT
Sample and Hold

Low- VOUT(on)(sat)
Amp Pass
Filter
B+
BOP
BRP

BHYS

Figure 3: Output Voltage Responds to Sensed Mag-


Figure 2: Chopper Stabilization Circuit (Dynamic
netic Flux Density
Quadrature Offset Cancellation)
5
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A3290 and Chopper-Stabilized, Precision Hall-Effect Latches
A3291 for Consumer and Industrial Applications

APPLICATION INFORMATION
It is strongly recommended that an external bypass capacitor be summarizing the ability of the application and the device to dissi-
connected (in close proximity to the Hall element) between the pate heat from the junction (die), through all paths to the ambient
supply and ground of the device to reduce both external noise air. Its primary component is the Effective Thermal Conductivity
and noise generated by the chopper stabilization technique. This (K) of the printed circuit board, including adjacent devices and
configuration is shown in Figure 4. traces. Radiation from the die through the device case (RθJC) is
The simplest form of magnet that will operate these devices is a relatively small component of RθJA. Ambient air temperature
ring magnet. Other methods of operation, such as linear magnets, (TA) and air motion are significant external factors, damped by
are possible. overmolding. Sample power dissipation results are given in the
Thermal Characteristics section. Additional thermal data is also
The device must be operated below the maximum junction tem- available on the Allegro website.
perature of the device (TJ(max)). Under certain combinations of
peak conditions, reliable operation may require derating supplied Extensive applications information for Hall-effect devices is
power or improving the heat dissipation properties of the applica- available in: Hall-Effect IC Applications Guide, Application Note
tion. The Package Thermal Resistance (RθJA) is a figure of merit 27701 and Guidelines for Designing Subassemblies Using Hall-
Effect Devices, Application Note 27703.1.

VCC

VCC VOUT
A329x

0.1 uF
GND

Figure 4: Typical Basic Application Circuit


A bypass capacitor is highly recommended.

6
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A3290 and Chopper-Stabilized, Precision Hall-Effect Latches
A3291 for Consumer and Industrial Applications

CUSTOMER PACKAGE DRAWINGS

For Reference Only – Not for Tooling Use


(Reference Allegro DWG-0000628, Rev. 1)
NOT TO SCALE
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown

+0.125
2.975 –0.075

1.49
4°±4°
3 Active Area Depth
0.28 ±0.04 mm
+0.020
0.180–0.053

2.40
0.96 0.70
+0.10 +0.19
2.90 –0.20 1.91 –0.06

Hall element 1.00


(not to scale) 0.25 MIN
0.38 NOM

0.95
1 2
PCB Layout Reference View
0.55 REF 0.25 BSC All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
Seating Plane to meet application process requirements and PCB layout tolerances
Gauge Plane

8× 10° ±5° Branded Face

0.57 ±0.04
3× 1.00 ±0.13 C XXT

0.10 C 0.41 ±0.04


SEATING
PLANE 1
+0.10
0.05 –0.05
Standard Branding Reference View
0.95 BSC
0.40 ±0.10 Line 1 = 3 characters

Line 1: Last 2 digits of Part Number, Temperature Code

Branding scale and appearance at supplier discretion

XXX

1
Standard Branding Reference View
Line 1 = 3 characters

Line 1: Last 3 digits of Part Number

Branding scale and appearance at supplier discretion

Figure 5: Package LH, 3-Pin SOT23W

7
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A3290 and Chopper-Stabilized, Precision Hall-Effect Latches
A3291 for Consumer and Industrial Applications

For Reference Only – Not For Tooling Use


(Reference DWG-0000404, Rev. 1)
NOT TO SCALE
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown

Ejector pin flash Mold gate and tie bar


protrusion protrusion zone

R0.25 MAX (2×) 5° (2×) 0.56 MAX

XXX
45° (2×) 1.52 ±0.05 1.68 MAX
0.10 MAX
5° (2×) 1

Standard Branding Reference View


+0.08 Line 1,2 = 3 characters
4.09 –0.05

3.00 ±0.05 Line 1: Logo A


Line 2: Last 3 digits of Part Number
Branding scale and appearance at supplier discretion
Mold gate and tie bar
protrusion zone 0.15 MAX

Ejector pin +0.05 0.50 ±0.08 Active Area Depth


(far side) 2.04 0.08 –0.00
Including gate and
tie bar burrs
Ejector pin flash
protrusion
1.44
3.10 MAX +0.08
3.02 –0.05
Hall Element
(not to scale) 45°
10° (3×)

1.02 MAX 0.79 REF

0.51 REF

0.05 NOM
0.05 NOM

14.99 ±0.25 +0.03


0.41 –0.06

0.10 MAX

0.10 MAX
Dambar Trim Detail

1.27 NOM (2×) +0.05


0.43 –0.07 (3×)

Figure 6: Package UA, 3-Pin SIP, Matrix Style

8
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A3290 and Chopper-Stabilized, Precision Hall-Effect Latches
A3291 for Consumer and Industrial Applications

For Reference Only – Not for Tooling Use


(Reference DWG-9049)
Dimensions in millimeters – NOT TO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown

45°

+0.08
4.09
–0.05 1.52 ±0.05

E C
2.04

2 X 10°
1.44 E E Mold Ejector
+0.08 Pin Indent
3.02
–0.05
Branded 45°
Face

2.16 MAX
0.51 REF
A 0.79 REF

1 2 3

+0.05 +0.03
0.43 0.41
–0.07 –0.06

NOT FOR
NEW DESIGN
1.27 NOM

NNT

15.75 ±0.25
1

D Standard Branding Reference View


= Supplier emblem
N = Last three digits of device part number
T = Temperature code

A Dambar removal protrusion (6X)

B Gate and tie bar burr area

C Active Area Depth, 0.50 mm REF

D Branding scale and appearance at supplier discretion

E Hall element, not to scale

Figure 7: Package UA, 3-Pin SIP, Chopper Style (A3290)

9
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A3290 and Chopper-Stabilized, Precision Hall-Effect Latches
A3291 for Consumer and Industrial Applications

Revision History
Number Date Description
11 November 11, 2013 Conform Description
12 January 1, 2015 Added LX option to Selection Guide
13 May15, 2015 Added new package for A3291
14 July 13, 2015 Corrected LH package Active Area Depth value
15 January 12, 2016 Updated Reverse Supply Current test conditions in Electrical Characteristics table
16 October 31, 2016 Chopper-style UA package designated as not for new design
17 September 21, 2017 Updated Power-On Time test conditions (p. 3)
18 September 25, 2018 Minor editorial updates
19 October 2, 2019 Updated LH and UA matrix package drawings (pages 7-8) and other minor editorial updates
20 March 25, 2021 Added Applications (page 1); updated pinout diagrams (page 2) and UA package drawing (page 8)
21 April 6, 2022 Updated package drawings (pages 7-8)

Copyright 2022, Allegro MicroSystems.


Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit
improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor
for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.

For the latest version of this document, visit our website:

www.allegromicro.com

10
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy