EUROPEAN STANDARD EN 50083-9

NORME EUROPÉENNE

EUROPÄISCHE NORM June 1998

ICS 33.060.40 Supersedes EN 50083-9:1997

Descriptors: Telecommunications, television broadcasting, sound broadcasting, multimedia, interfaces, antenna conductors,
satellite broadcasting, cable television

English version

Cable networks for television signals, sound signals

and interactive services
Part 9: Interfaces for CATV/SMATV headends and similar
professional equipment for DVB/MPEG-2 transport streams

Systèmes de distribution par câbles Kabelnetze für Fernsehsignale, Tonsig-

destinés aux signaux de radiodiffusion nale und interaktive Dienste
sonore, de télévision et multimedia inter- Teil 9: Schnittstellen für CATV-/SMATV-
active Kopfstellen und vergleichbare profes-
Partie 9: Interfaces pour les têtes de sionelle Geräte für DVB/MPEG-2-
réseaux pour antennes communautaires, Transportströme
antennes collectives par satellite et maté-
riel professionels analogues pour les flux
transport DVB/MPEG-2

This European Standard was approved by CENELEC on 1996-10-01. CENELEC members are
bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for
giving this European Standard the status of a national standard without any alteration.

Up-to-date lists and bibliographical references concerning such national standards may be ob-
tained on application to the Central Secretariat or to any CENELEC member.

This European Standard exists in three official versions (English, French, German). A version in
any other language made by translation under the responsibility of a CENELEC member into its
own language and notified to the Central Secretariat has the same status as the official versions.

CENELEC members are the national electrotechnical committees of Austria, Belgium, Czech Re-
public, Denmark, Finland, France, Germany, Greece, Iceland, Ireland, Italy, Luxembourg, Nether-
lands, Norway,Portugal, Spain, Sweden, Switzerland and United Kingdom.

CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung

Central Secretariat: rue de Stassart 35, B - 1050 Brussels

___________________________________________________________________
© 1998 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.

Ref. No. EN 50083-9:1998 E

Page 2
EN 50083-9:1998

FOREWORD

This second edition of the European Standard was prepared by CENELEC Technical
Committee TC 209, "Cable networks for television signals, sound signals and interac-
tive services" on the basis of EN 50083-9:1997 and the first amendment to
EN 50083-9. Both documents are based on the specification "Interfaces for
CATV/SMATV Headends and similar Professional Equipment" (document: DVB-
TM1449 Rev 1, 11 July 1995, and Corrigendum 1997) [1], prepared by the DVB-TM ad
hoc group on "Physical Interfaces".

The text of the first amendment was approved by CENELEC on 1997-12-xx with the re-
quest to prepare a second edition of EN 50083-9, by incorporating this amendment into
the European standard EN 50083-9:1997.

The following dates were fixed:

- latest date by which the EN has to be implemented

at national level by publication of an identical
national standard or by endorsement (dop) 1998-12-01

- latest date by which national standards conflicting

with the EN have to be withdrawn (dow) 1998-12-01

For products which have complied with the relevant national standard before
1998-12-01, as shown by the manufacturer or by a certification body, this previous
standard may continue to apply for production until 2003-12-01.

Annexes designated "normative" are part of the body of the standard. Annexes desig-
nated "informative" are given for information only. In this standard, annexes A and B
are normative and annexes C to F are informative.
 Page 3
EN 50083-9:1998

CONTENTS
Page

1 Scope............................................................................................................. 4

1.1 General .......................................................................................................... 4

1.2 Specific scope of this part 9 ........................................................................... 4

2 Normative references..................................................................................... 5

3 Terms, definitions and abbreviations ............................................................. 7

3.1 Terms and definitions..................................................................................... 7

3.2 Abbreviations ................................................................................................. 8

4 Interfaces for MPEG-2 data signals ............................................................... 9

4.1 Introduction ....................................................................................................9

4.2 Synchronous Parallel Interface (SPI) ...........................................................12

4.3 Synchronous Serial Interface (SSI)..................................................................

4.4 Asynchronous Serial Interface (ASI)............................................................ 17

Annexes

Annex A (normative) Synchronous Serial Interface (SSI) ........................................ 18

Annex B (normative) Asynchronous Serial Interface (ASI)....................................... 29

Annex C (informative) 8B/10B tables ......................................................................... 39

Annex D (informative) Implementation guidelines and clock recovery

from the Synchronous Serial Interface (SSI) .......................... 44

Annex E (informative) Implementation guidelines and deriving clocks

from the MPEG-2 packets for the ASI..................................... 48

Annex F (informative) Bibliography ............................................................................ 53

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EN 50083-9:1998

1 Scope

1.1 General

Standards of EN 50083 series deal with cable networks for television signals, sound
signals and interactive services including equipment, systems and installations
• for headend reception, processing and distribution of television and sound
signals and their associated data signals and
• for processing, interfacing and transmitting all kinds of signals for interactive
services
using all applicable transmission media.

All kinds of networks like

• CATV-networks,
• MATV-networks and SMATV-networks,
• Individual receiving networks
and all kinds of equipment, systems and installations installed in such networks, are
within this scope.

The extent of this standardization work is from the antennas, special signal source in-
puts to the headend or other interface points to the network up to the system outlet or
the terminal input, where no system outlet exists.

The standardization of any user terminals (i.e. tuners, receivers, decoders, multimedia
terminals etc.) as well as of any coaxial and optical cables and accessories therefor is
excluded.

1.2 Specific scope of this part 9

This standard describes physical interfaces for the interconnection of signal processing
devices for professional CATV/SMATV headend equipment or for similar systems, such
as in uplink stations. Especially this document specifies the transfer of DVB/MPEG-2
data signals in the standardized transport layer format between devices of different
signal processing functions.

RF interfaces and interfaces to telecom networks are not covered in this document.

In addition references are made to all other parts of EN 50083 series (Cable networks
for television signals, sound signals and interactive services) and in particular for RF,
video and audio interfaces to part 5: "Headend equipment“.

For connections to telecom networks a special Data Communication Equipment (DCE)

is necessary to adapt the serial or parallel interfaces specified in this document to the
bitrates and transmission formats of the public Plesiochronic Digital Hierarchy (PDH)
networks. Other emerging technologies such as Connectionless Broadband Data
Services (CBDS), Synchronous Digital Hierarchy (SDH), Asynchronous Transfer Mode
(ATM) etc. can be used for transmitting MPEG-2 Transport Streams (TS) between re-
mote locations. ATM is particularly suitable for providing bandwidth on demand and it
allows for high data rates.
 Page 5
EN 50083-9:1998

2 Normative references

This European Standard incorporates by dated or undated reference, provisions from

other publications. These normative references are cited at the appropriate places in
the text and the publications are listed hereafter. For dated references, subsequent
amendments to or revisions of any of these publications apply to this European Stan-
dard only when incorporated in it by amendment or revision. For undated references
the latest edition of the publication referred to applies.

EN 50083 Cable networks for television signals, sound signals

and interactive services

EN 50083-1: 1993 Part 1: Safety requirements

+ A1 1997
EN 50083-2: 1995 Part 2: Electromagnetic compatibility for equipment
+ A1 1997
EN 50083-3 1998 Part 3: Active wideband equipment for coaxial cable
networks
EN 50083-4: 1998 Part 4: Passive wideband equipment for coaxial cable
networks
EN 50083-5: 1998 Part 5: Headend equipment
EN 50083-6: 1997 Part 6: Optical equipment
EN 50083-7: 1996 Part 7: System performance
EN 50083-8: Part 8: Electromagnetic compatibility for networks
(under consideration)

EN 188101 1995 FS: Single-mode dispersion unshifted (B1.1) optical

fibre

EN 188201 1995 A1a graded index multimode optical fibres

EN ISO/IEC
13818-1 1995 Information technology - Generic coding of moving
pictures and associated audio information -
Part 1: Systems
(under consideration)

ETS 300 421 1994 Digital broadcasting for television, sound and data
services - Framing structure, channel coding and
modulation for 11/12 GHz satellite services

ETS 300 429 1994 Digital broadcasting for television, sound and data
services - Framing structure, channel coding and
modulation for cable systems
Page 6
EN 50083-9:1998

ETS 300 473 1995 Digital broadcasting systems for television, sound and
data services, Satellite Master Antenna Television
(SMATV) distribution systems

IEC 169-8 1978 Radio frequency connectors - Part 8: RF coaxial

connectors with inner diameter of outer conductor
6,5 mm (0,25 in) with bayonet lock
Characteristic impedance 50 Ω (type BNC)

IEC 793-2 1992 Optical fibres - Part 2: Product specifications

IEC 874-14 1993 Connectors for optical fibres and cables,

Part 14: Sectional specification for fibre-optic
connector - Type SC

ISO 2110 1989 Information technology - Data communication,

25 pole DTE/DCE interface connector and contact
number assignments

ISO/IEC
13818-9 1996 Information technology - Generic coding of moving
pictures and associated audio information -
Part 9: Extension for real-time interface for systems
decoders

ISO/IEC
CD 14165-1 Fibre Channel - Part 1: Physical and signalling inter-
face (FC-PH)

ITU-R Rec.
BT.656-2 1994 Interfaces for digital component video signals in
525-line and 625-line television systems operating at
the 4:2:2 level of recommendation ITU-R BT.601

ITU-T Rec.
G.654 1993 Characteristics of a 1550 nm wavelength loss-
minimized single-mode optical fibre cable (Rev 1)

ITU-T Rec.
G.703 1991 Physical/electrical characteristics of hierarchical
digital interfaces (Rev 1)

ITU-T Rec.
G.957 1993 Optical interfaces for equipments and systems
relating to the synchronous digital hierarchy
 Page 7
EN 50083-9:1998

3 Terms, definitions and abbreviations

3.1 Terms and definitions

3.1.1 headend
Equipment which is connected between receiving antennas or other signal sources and
the remainder of the cable distribution system to process the signals to be distributed.

NOTE: The headend may, for example, comprise antenna amplifiers, frequency
converters, combiners, selectors and generators.

3.1.2 Satellite Master Antenna Television system (SMATV)

A system which is designed to provide sound and television signals to the households
of a building or group of buildings.

NOTE: Two system configurations are defined in ETS 300 473 as follows:

• SMATV system A, based on transparent transmodulation of QPSK satel-

lite signals into QAM signals to be distributed to the user

• SMATV system B, based on direct distribution of QPSK signals to the

user, with two options:
- SMATV-IF distribution in the satellite IF band (above 950 MHz)
- SMATV-S distribution in the VHF/UHF band, for example in the ex-
tended S-band (230-470 MHz)

3.1.3 Biphase Mark

A line code which ensures DC balance, easy clock recovery and polarity freedom.

3.1.4 Transport Stream

Includes one or more programs with one or more independent time bases into a single
stream. The Transport Stream is designed for use in environments where errors are
likely, such as storage or transmission in lossy or noisy media.

3.1.5 Transport Packet

A packetized element of the Transport Stream. The packets are either 188 bytes or in
case of using Reed Solomon FEC 204 byte in length

3.1.6 DVALID
A signal which indicates in the 204 Byte mode of a Transport Stream that the empty
space is filled with dummy bytes.

3.1.7 PSYNC
A flag which indicates the beginning of a packet.
Page 8
EN 50083-9:1998

3.2 Abbreviations

8B/10B eight to ten bit conversion

ACCP Accumulated Phase
ACCT Accumulated Time
ASI Asynchronous Serial Interface
ASI-C Asynchronous Serial Interface on coacial cable
ASI-O Asynchronous Serial Interface on opticaL fiber
ATM Asynchronous Transfer Mode
BER Bit Error Rate
CBDS Connectionless Broadband Data Services
DFB Distributed Feedback
DJ Deterministic Jitter
DVALID data valid
DVB Digital Video Broadcast
FC FIBRE Channel
FEC Forward Error Correction
FIFO First In First Out
FWHM Full Width Half Max
IEC International Electrotechnical Commission
ISO International Standards Organisation
ITU-R International Telecommunication Union Radiocommunication
ITU-T International Telecommunication Union Telecommunication
LVDS Low Voltage Differential Signalling
MPEG Motion Picture Experts Group
MSB Most Significant Bit
NA not applicable
NRZ Non-Return-to-Zero
PDH Plesiosynchronic Digital Hierarchy
PLL Phase Lock Loop
PMD Physical Medium Dependent
PSYNC Packet Synchron
QAM Quadrature Amplitude Modulation
QPSK Quarternary Phase Shift Keying
RD Running Disparity
RIN Relative Intrinsic Noise
RJ Random Jitter
RS Reed Solomon
SDH Synchronous Digital Hierarchy
SMPT Society of Motion Picture and Television Engineers
SPI Synchronous Parallel Interface
SSI Synchronous Serial Interface
SSI-C Synchronous Serial Interface on coacial cable
SSI-O Synchronous Serial Interface on optical fiber
Tr rise-time
TS Transport Stream
 Page 9
EN 50083-9:1998

UNC Unified National Coarse Thread

NOTE: Only the abbreviations used in the English version of this part of EN 50083 are
mentioned in this subclause. The German and the French versions of this part may use
other abbreviations. Refer to 3.2 of each language version for details.

4 Interfaces for MPEG-2 data signals

4.1 Introduction
This subclause describes possible interfaces for devices transmitting or receiving
MPEG-2 data as transport packets, such as QPSK demodulators, QAM modulators,
multiplexers, demultiplexers, or telecom network adapters.

This specification is similar to ETS 300429 and ETS 300421.

NOTE: Both standards describe a first functional block representing the MPEG2 source
coding and multiplexing as standardised in EN ISO/IEC 13818-1, a second functional
block representing the channel adaptation, whereas an interface in between shall be
based on MPEG2 transport stream specification as per EN ISO/IEC 13818-1.

The function of the channel modulator/demodulator is to adapt the signal to the

characteristics of the transmission channel: satellite, terrestrial or cable as specified in
the DVB base line documents.

Also the case where data signals are transmitted to or from a headend via a telecom
network or if a headend serves to insert data signals into such networks is considered to
be covered by the generic channel modulator / demodulator functional block. The
interface parameters valid for this network have to be met. For the latter reference is
made to ITU-T G.703 for Plesiochronic Digital Hierarchy (PDH) networks.

4.1.1 Application requirements

In order to avoid any unnecessary processing at transmitting or receiving station of an
interface in certain applications, it is considered an application requirement that the
interface supports 204 byte packet length in such cases, in addition to or instead of the
188 packet lengthas specified in EN ISO/IEC 13818-1. These two cases are identified
in the protocol diagrams of figures 1 and 2 where also the scope of this specification is
delineated. The relevant associated packet structures are illustrated in figures 3 and 4.
Page 10
EN 50083-9:1998

MPEG2 TS packet MPEG2 TS optional

(188 bytes) packet (188 extra data
bytes) (16 bytes)

Conversion to
lower protocol 204 byte packets
layers
lower protocol
layers

transmission medium transmission medium

Figure 1: Protocol stack for 188 byte Figure 2: Protocol stack for 204 byte
packets packets

NOTE: Shaded areas identify the scope of this standard

1 187 databytes (MPEG2 TS packet)

Sync byte

Figure 3 : Packet structure of 188 byte packet

1 187 databytes (MPEG2 TS packet) plus 16 extra

Sync byte bytes

Figure 4: Packet structure of 204 byte packet

4.1.2 Interfaces
Three interfaces and two serial transmission media are specified as follows:

• SPI (Synchronous Parallel Interface);

• SSI-C (Synchronous Serial Interface on coaxial cable);
• SSI-O (Synchronous Serial Interface on optical fibre);
• ASI-C (Asynchronous Serial Interface on coaxial cable);
• ASI-O (Asynchronous Serial Interface on optical fibre).

Each of these interfaces feature a BER such that FEC is not required for reliable data
transport.

The synchronous parallel interface is specified to cover short or medium distances, i.e.
for devices arranged near to each other. Subclause 4.2 describes the definitions for
such a parallel interface derived from ITU-R Recommendation G.656. Flags are
provided to distinguish 188 byte packets from 204 byte packets, and to signal the
existence of valid RS bytes. Note that the interface as such is transparent to the RS
bytes.
 Page 11
EN 50083-9:1998

The synchronous serial interface (SSI) which can be seen as an extension of the
parallel interface, is briefly introduced in subclause 4.3 and described in detail in
annexes A and D. The packet length and the existence of valid RS bytes are conveyed
through suitable coding mechanisms.

Subclause 4.4 introduces the Asynchronous Serial Interface (ASI). Details of the ASI
are provided in annexes B and E. The ASI is configurable to either convey 188 byte
packets (which is mandatory) or optionally 204 byte packets.

4.1.3 Packet length and contents

Each of the interface specifications can be used to convey either 188 byte packets or
204 byte packets in order to enable selection of the appropriate interface
characteristics dependent on the kind of equipment to be interconnected. Which packet
sizes are mandatory and which are optional is specified in table 1.

Table 1: Mandatory and optional packet lengths

Data packet carrying capability

Interface 188 bytes 204 bytes 204 bytes
(with 16 dummy (with 16 RS
bytes) bytes)
SPI transmitter O M O
receiver M M M
SSI transmitter O M O
receiver M M M
ASI transmitter M O O
receiver M O O

M mandatory O optional

In case the data stream is packetised in 188 byte packets and the interface is
configured to convey 204 byte packets, the extra packet length can be used for
additional data. The contents of the 16 bytes in this extra packet length are not
specified in this standard. One application could be the transmission of 16 RS bytes
associated with the preceding transport package.

4.1.4 Compliance
For an equipment to be compliant to this standard it is sufficient for the equipment to
show at least one instance of at least one of the interface specifications as introduced
in 4.1.2 and specified in detail in subsequent subclauses of this standard, while at least
the mandatory packet sizes as indicated in 4.1.3 shall be supported.

4.1.5 System integration

The interfaces specified in this standard define physical connections between various
pieces of equipment. It is important to notice that various parameters which are
important for interoperation are not specified in this standard. This is intentional as it
Page 12
EN 50083-9:1998

leaves maximum implementation flexibility for different applications. In order to facilitate

system integration equipment suppliers shall provide the following information about
the characteristics of the interfaces in their equipment:

• Interface type (SPI, SSI-C, SSI-O, ASI-C, ASI-O);

• Supported packet length (188 bytes, 204 bytes, both);
• Maximum input jitter (jitter measured as specified in ISO/IEC 13818 part 9);
• Output jitter (jitter measured as specified in ISO/IEC 13818 part 9);
• Minimum input data rate (rate measured as specified in EN ISO/IEC 13818
part 1);
• Maximum input data rate (rate measured as specified in EN ISO/IEC 13818
part 1).

Some of these parameters may not be applicable to certain types of equipment. If all
relevant parameters are provided by equipment suppliers, the proper functioning of the
complete system can be ensured.

4.2 Synchronous parallel interface (SPI)

This subclause describes an interface for a system for parallel transmission of variable
data rates. The data transfer is synchronized to the byte clock of the data stream,
which is the MPEG Transport Stream. Transmission links use LVDS technology, (for
details concerning LVDS, see [2]) and 25 pin connections.

Clock 1

Data (0-7) 8

TX DVALID 1 RX
PSYNC 1

Figure 5: System for parallel transmission

The data to be transmitted are MPEG-2 Transport Packets with 188 or 204 bytes. In
the case of the 204 byte packet format packets may contain a 16 bytes "empty space",
a DVALID Signal serves to identify these dummy bytes. A PSYNC flag labels the be-
ginning of a packet. The data are synchronized to the clock depending on the trans-
mission rate.

Equipment which implements the parallel interface shall support the three transmission
formats as shown in figures 6, 7 and 8.

4.2.1 Signal format

The clock, data, and synchronization signals shall be transmitted in parallel: 8 data bits
together with one (MPEG-2) PSYNC signal and a DVALID signal which indicates in the
 Page 13
EN 50083-9:1998

204 byte mode that the empty space is filled with dummy bytes. All signals are syn-
chronous to the clock signal. The signals are coded in NRZ form.

Clock

187 sync 1 2 186 187 sync 1 Data (0-7)

DVALID

PSYNC

Figure 6: Transmission format with 188 Byte packets

Clock

16 sync 1 2 186 187 1 2 16 sync 1 Data (0-7)

DVALID

PSYNC

Figure 7: Transmission format with 204 Byte packets

(188 data bytes and 16 valid extra bytes)

Clock

203 sync 1 2 201 202 203 sync 1 Data (0-7)

DVALID

PSYNC

Figure 8: Transmission format with RS-coded packets (204 Bytes)

as specified in ETS 300 421

Data (0-7): Transport packet data word (8 bit: Data 0 to Data 7). Data 7 is the Most
Significant Bit (MSB).

DVALID: active logic "1". Indicates valid data at the interface. It is constantly high in
the 188 byte mode. In the 204 byte mode a low logical state indicates not
to check the extra (dummy) bytes.

PSYNC: active logic "1". Indicates the beginning of a Transport Packet by

signalling the sync byte.
Page 14
EN 50083-9:1998

4.2.2 Clock signal

The clock is a square wave signal where the 0-1 transition represents the data transfer
time. The clock frequency fp depends on the transmission rate.

• The Transport Packets are transmitted without insertion of additional bytes for RS
coding or padding (packet length 188 bytes):

fp = fu / 8

• The Transport Packets are transmitted with insertion of additional bytes for RS
coding or padding (packet length 204 bytes):

fp = (204 / 188) * fu / 8

The frequency fu corresponds to the useful bitrate Ru of the MPEG-2 transport layer.
The clock frequency fp shall not exceed 13,5 MHz.

timing reference for data and clock

Data
td

Clock
t

Figure 9: Clock to data timing (at source)

1
Clock period: T=
fp
T T
Clock pulse width: t = ±
2 10
T T
Data hold time: td = ±
2 10
 Page 15
EN 50083-9:1998

4.2.3 Electrical characteristics of the interface

The interface employs eleven line drivers and eleven line receivers. Each line driver
(source) has a balanced output and the corresponding line receiver (destination) a bal-
anced input (see figure 10). The line driver and receiver shall be LVDS-compatible, i.e.
they shall permit the use of LVDS for their drivers or receivers. All digital signal time
intervals are measured between the half-amplitude points.

Logic convention

The terminal A of the line driver is positive with respect to the terminal B for a binary 1
and negative for a binary 0 (see figure 10).

Source Destination

A A'

Line Transmission Zt = Line

driver line 100 Ω
receiver
B B'

Figure 10: Line driver and line receiver interconnection

Line driver characteristics (source)

Output impedance: 100 Ω maximum

Common mode voltage: 1,125 V to 1,375 V
Signal amplitude: 247 mV to 454 mV
Rise and fall times: less than T / 7, measured between the 20% and 80%
amplitude points, with a 100 Ω resistive load. The difference
between rise and fall times shall not exceed T / 20.

Line receiver characteristics (destination)

Input impedance: 90 Ω to 132 Ω

Maximum input signal: 2,0 V peak to peak
Minimum input signal: 100 mV peak to peak
Page 16
EN 50083-9:1998

However, the line receiver shall sense correctly the binary data when a random data
signal produces the conditions represented by the eye diagramme in figure 11 at the
data detection point.
Maximum common mode signal: ± 0,5 V, comprising interference in the range of
0 to 15 kHz (both terminals to ground).

Differential delay: Data shall be correctly sensed when the clock-to-data differential
delay is in the range between ± T / 3 (see figure 11).

reference transition of clock

U
min

T T
min min

Tmin = T / 3, Umin = 100 mV

Figure 11: Idealized eye diagramme corresponding to the

minimum input signal level

4.2.4 Mechanical details of the connector

The interface uses the 25 contact type D subminiature connector specified in ISO 2110
with the contact assignment shown in table 2.

Connectors are locked together with screw lock, with male screws on the cable con-
nector and a female threaded posts on the equipment connector. The threads are of
type UNC 4-40 [3]. Cable connectors employ pin contacts and equipment connectors
employ socket contacts. Shielding of the interconnecting cable and its connectors shall
be employed.
 Page 17
EN 50083-9:1998

Table 2: Contact assignment of 25 contact

type D subminiature connector (ISO 2110)

Pin Signal line Pin Signal line

1 Clock A 14 Clock B
2 System Gnd 15 System Gnd
3 Data 7 A(MSB) 16 Data 7 B
4 Data 6 A 17 Data 6 B
5 Data 5 A 18 Data 5 B
6 Data 4 A 19 Data 4 B
7 Data 3 A 20 Data 3 B
8 Data 2 A 21 Data 2 B
9 Data 1 A 22 Data 1 B
10 Data 0 A 23 Data 0 B
11 DVALID A 24 DVALID B
12 PSYNC A 25 PSYNC B
13 Cable Shield

4.3 Synchronous Serial Interface (SSI)

The Synchronous Serial Interface (SSI) can be seen as the extension of the parallel
interface by means of an adaptation of the parallel format. SSI is synchronous to the
Transport Stream which is transmitted on the serial link.

A detailed specification of the SSI is provided in annex A and guidelines for its imple-
mentation are provided in annex D.

4.4 Asynchronous Serial Interface (ASI)

The Asynchronous Serial Interface (ASI) is a serial link operating at a fixed line clock
rate.

A detailed specification of ASI is provided in annex B and guidelines for its implemen-
tation are provided in annex E.
Page 18
EN 50083-9:1998

Annex A (normative)

Synchronous Serial Interface (SSI)

This annex describes a system for serial, encoded transmission of different data rates
with a transmission rate equal to the data rate. It is based on a layered structure of
MPEG-2 Transport Packets as a top layer (Layer-2), and a pair of bottom layers at-
tached to physical and coding aspects (Layer-0 and Layer-1).

The SSI is based on a line rate directly locked to the transport rate. The SSI is func-
tionally equivalent to the parallel interface since the Transport Packets can be trans-
mitted either contiguously or separated by 16 bytes reserved for dummy bytes or extra
bytes. Because the link and the TS are synchronous, the bit justification operation is not
needed. The system shall be designed to fulfil the high stability requirements of the
modulator clocks, even when several links are cascaded.

As an example, consider a signal which passes through several re-broadcast steps,

such as the one depicted in figure A.1. In this chain, the last clock (that of the QAM
modulator) is slaved to the encoder/mux clock via four steps of clock regeneration cir-
cuits.

M R
U E
X PDH M
SDH QAM
U
X

MUX NETWORK QPSK QPSK REMUX QAM

ADAPTER MOD DEMOD MOD

Interfaces points

Figure A.1: Example of cascaded interfaces

A.1 SSI transmission system overview

Figures A.2 and A.3 represent the primary components of this SSI method over copper
coaxial cable and fibre-optic cable, respectively.
 Page 19
EN 50083-9:1998

Layer-2 Layer-1 Layer-0

Continuous Byte- Parallel/Serial Biphase Amplifier/ Coupling/

Synchronous Impedance Connector
Conversion Coding Buffer
MPEG-2 TS Matching

Coaxial
Cable

Continuous Byte- Serial/Parallel Clock Recovery Amplifier/ Coupling/

Synchronous Conversion Biphase Impedance Connector
Buffer
MPEG-2 TS Decoding Matching

Figure A.2: Coaxial cable-based synchronous serial transmission link (SSI type)

Layer-2 Layer-1 Layer-0

Continuous Byte- Parallel/Serial Biphase Optical

Synchronous Amplifier/ Connector
Conversion Coding Emitter
MPEG-2 TS Buffer

Fibre-Optic
Cable

Continuous Byte- Serial/Parallel Clock Recovery Optical

Amplifier/ Connector
Synchronous Conversion Biphase Receiver
Buffer
MPEG-2 TS Decoding

Figure A.3: Fibre-optic-based synchronous serial transmission link (SSI type)

The main functions of the transmission system are described below.

Emission path

Data to be transmitted are presented in byte-synchronized form as MPEG-2 Transport

Packets. The Transport Stream is then passed through a parallel-to-serial converter.
The line data stream is locked to the TS data stream.

The serial signal is Biphase Mark encoded.

Page 20
EN 50083-9:1998

In the case of a coaxial cable application, the resulting signal is typically passed to a
buffer/ driver circuit and then through a coupling network, which performs impedance
matching and optionally galvanic isolation, to a coaxial connector. In the case of fibre-
optic application, the serial bit stream is passed through a driver circuit which drives an
optical transmitter (LED or LASER) which is coupled to a fibre-optic cable through a
connector.

Reception path

The incoming data stream from the coaxial cable is first coupled through a connector
and coupling network to a circuit which recovers clock and data. In case of fibre-optic
transmission, a light sensitive detector converts light levels to electrical levels which
then are passed to a clock and data recovery circuit.

Once the clock and data are recovered, the bit stream is passed to a Biphase Mark de-
coder. In order to recover byte alignment, a decoder searches in the serial stream for
the synchronization word which is necessary to achieve the serial to parallel conver-
sion.

Annex D provides further clarification of the characteristics of the SSI and implementa-
tion guidelines for clock and data recovery.

A.2 SSI configuration

A SSI interconnection physically consists of two nodes: a transmitting node and a re-
ceiving node. This unidirectional optical fibre or copper coaxial cable carrying data from
the transmitting node to the receiving node is referred to as a link. The link is used by
the interconnected ports to perform communication. Physical equipment such as video
or audio compressors, multiplexers, modulators, etc., can be interconnected through
these links. This SSI specification clause applies only to the point-to-point type link.

A.3 SSI protocol architecture description

The SSI protocol is divided into three architectural layers for purposes of development
of the standard: Layer-0, Layer-1, Layer-2.

A.3.1 Layer-0: Physical requirements

The physical layer defines the transmission media, the drivers and receivers. The
transmission uses Biphase Mark encoding.

This subclause provides specifications for SSI physical layer (Layer-0). Interfaces for
coaxial and optical fibre applications are specified. The links are unidirectional point to
point.
 Page 21
EN 50083-9:1998

A.3.1.1 Coaxial cable Physical Medium Dependent (PMD) requirement

The nominal cable impedance shall be 75 Ω.

Considering that the transmission data rate is derived from the user data rate, longer
links can be achieved for lower user data rates. The physical medium specified in this
subclause has the following characteristics:

- Provides a means of coupling the SSI Layer-1 to the coaxial cable segment
- Provides the driving of coaxial cable between a transmitter and a receiver
- Specifies the type and grade of cable and connectors to be used in a synchro-
nous serial interface link.

Electrical medium connector

The required connector shall have mechanical characteristics conforming to the BNC
type.

NOTE: Due to its higher mechanical stability a 50 Ω BNC type connector

according to IEC 169-8 is recommended.

The electrical characteristics of the connector shall permit it to be used over the fre-
quency range of the specified interface.

The following table A.1 and figures A.4 and A.5 give the requirements for the serial sig-
nal launched synchronously on the coaxial cable.
Page 22
EN 50083-9:1998

Table A.1: Transmitter output characteristics

Pulse shape Conforming to masks shown in figures A.4

and A.5.

Peak to peak voltage 1 V ± 0,1 V

Rise/fall time (10-90%) ≤ 4 ns
Transition timing tolerance (referred to Negative transition: ± 0,2 ns
the mean value of the 50% amplitude Positive transition at
points of negative transition) unit interval boundaries: ± 1 ns
Positive transition at
mid interval: ± 0,7 ns
Return loss (75 Ω) - 15 dB
over frequency range 3,5 MHz to 105 MHz
Maximum peak-to peak jitter at the output 2 ns
port

The digital signal presented at the input port shall conform to table A.2 and figures A.4
and A.5 modified by the characteristics of the interconnecting coaxial pair. The at-
tenuation of the coaxial pair shall be assumed to follow an approximate f law. The
cable shall have a maximum insertion loss of 12 dB at a frequency of 70 MHz.

Table A.2: Receiver input characteristics

Maximum attenuation at a frequency of - 12 dB

70 MHz assuming a f law
Maximum peak to peak jitter 4 ns
at the input port
Return loss (75 Ω) - 15 dB
over frequency range
3,5 MHz to 105 MHz
 Page 23
EN 50083-9:1998

T
V
0,60
(NOTE 1) (NOTE 1)
0,55
0,50
Nominal 2 ns
0,45 pulse

0,40 2 ns 1 ns
0,2 ns 0,2 ns 1 ns

0,05
Nominal
zero level
- 0,05

T /2 T /2

2,7 ns 2,7 ns 2 ns
2 ns

- 0,40
- 0,45 T /4 T /4
- 0,50
- 0,55
(NOTE 1)
- 0,60

Negative Positive
transition transition

NOTE 1: The maximum “steady state” amplitude should not exceed the 0,55 V limit. Overshoots
and other transients are permitted to fall into the dotted area, bounded by the amplitude levels
0,55 V and 0,6 V, provided that they do not exceed the steady state level by more than 0,05 V.
The possibility of relaxing the amount by which the overshoot may exceed the steady state level
is under study.

NOTE 2: For all measurements using these masks, the signal should be AC coupled, using a ca-
pacitor of not less than 0,02 µF (for data rate = 70 Mbit/s), to the input of the oscilloscope used
for measurements.
The nominal zero level for both masks should be aligned with the oscilloscope trace with no input
signal. With the signal then applied, the vertical position of the trace can be adjusted with the
objective of meeting the limits of the masks. Any such adjustment should be the same for both
masks and should not exceed ± 0,05 V. This may be checked by removing the input signal again
and verifying that the trace lies within ± 0,05 V of the nominal zero level of the masks.

NOTE 3: Each pulse in a coded pulse sequence should meet the limits of the relevant mask, ir-
respective of the state of the preceding or succeeding pulses, with both pulse masks fixed in the
same relation to a common timing reference, i.e. with their nominal start and finish edges coinci-
dent. The masks allow for HF jitter present in the timing signal associated with the source of in-
terface signal
When using an oscilloscope technique to determine pulse compliance with the mask, it is im-
portant that successive traces of the pulses overlay in order to suppress the effects of low fre-
quency jitter. This can be accomplished by several techniques [such as a) triggering the oscillo-
scope on the measured waveform or b) providing both the oscilloscope and the pulse output cir-
cuits with the same clock signal]. These techniques require further study.

NOTE 4: For the purpose of these masks, the rise time and delay time should be measured be-
tween –0,4 V and 0,4 V, and should not exceed 4 ns.

NOTE 5: The inverse pulse will have the same characteristics, noting that the timing tolerance at
the level of the negative and positive transitions are ± 0,2 ns and ± 1 ns respectively.

Figure A.4: Pulse mask for logical 0

Page 24
EN 50083-9:1998

T
V

0,60
(NOTE 1) (NOTE 1)
0,55 Nominal
pulse
0,50
T /4 T /4
0,45
2 ns 2 ns
2 ns
0,40
0,2 ns 0,2 ns
0,2 ns 0,2 ns
0,7 ns 0,7 ns

0,05
Nominal
zero level
(Note 2) 0,05

2 ns 2 ns

- 0,40
- 0,45 T /4 T /4 2 ns
- 0,50
- 0,55 Positive
(NOTE 1) transition (Note 1)
- 0,60
at mid-unit
interval
Negative
transition

NOTE 1: The maximum “steady state” amplitude should not exceed the 0,55 V limit. Overshoots
and other transients are permitted to fall into the dotted area, bounded by the amplitude levels
0,55 V and 0,6 V, provided that they do not exceed the steady state level by more than 0,05 V.
The possibility of relaxing the amount by which the overshoot may exceed the steady state level
is under study.

NOTE 2: For all measurements using these masks, the signal should be AC coupled, using a ca-
pacitor of not less than 0,02 µF (for data rate = 70 Mbit/s), to the input of the oscilloscope used
for measurements.
The nominal zero level for both masks should be aligned with the oscilloscope trace with no input
signal. With the signal then applied, the vertical position of the trace can be adjusted with the
objective of meeting the limits of the masks. Any such adjustment should be the same for both
masks and should not exceed ± 0,05 V. This may be checked by removing the input signal again
and verifying that the trace lies within ± 0,05 V of the nominal zero level of the masks.

NOTE 3: Each pulse in a coded pulse sequence should meet the limits of the relevant mask, ir-
respective of the state of the preceding or succeeding pulses, with both pulse masks fixed in the
same relation to a common timing reference, i.e. with their nominal start and finish edges coinci-
dent.
The masks allow for HF jitter caused by intersymbol interference in the output stage, but not for
jitter present in the timing signal associated with the source of the interface signal.
When using an oscilloscope technique to determine pulse compliance with the mask, it is im-
portant that successive traces of the pulses overlay in order to suppress the effects of low fre-
quency jitter. This can be accomplished by, several techniques [such as a) triggering the oscillo-
scope on the measured waveform or b) providing both the oscilloscope and the pulse output cir-
cuits with the same clock signal]. These techniques require further study.

NOTE 4: For the purpose of these masks, the rise time and delay time should be measured be-
tween -0,04 V and 0,4 V, and should not exceed 4 ns.

Figure A.5: Pulse mask for logical 1

 Page 25
EN 50083-9:1998

A.3.1.2 Fibre-optic Physical Medium Dependent (PMD) requirement

Transmission of the SSI data stream on fibre-optic medium consists of interconnecting

transmitter and receiver by a section of optical fibre which can be either multimode or
singlemode type. The type of the optical fibre will be determined by the link character-
istics, length and type of optical connectors.

The fibres to be used for the serial data interface are specified by ITU-T Recommenda-
tions or EN:

Multimode Fibre: EN 188 201

Singlemode Fibre: ITU-T Rec. G.654 or EN 188 101

The optical connector shall be of SC type, according to IEC 874-14.

The optical characteristics of the links are described in the table A.3. All parameters
shall be met over the temperature, voltage, and lifetime range of the system.

Table A.3: Optical characteristics for SSI links

Application internal trunk lines

connections
Short-haul Long-haul
Source nominal wavelength (nm) 1310 1310 1310 1550
Type of fibre EN 188201 EN 188 101 EN 188 101 EN 188 101
ITU-T Rec.
G.654
Distance (km) < 2 < 15 < 40 < 60

Transmitter
Source type LED LASER LASER Di- DFB
Diode ode LASER Di-
ode
Mean launched power (dBm)
max -8 -8 -8 0
min -15 -15 -15 -5

Receiver
minimum sensitivity (dBm) -23 -28 -34 -34
minimum overload (dBm) -8 -8 -10 -10
Maximum optical path penalty 1 1 1 1
(dB)
Page 26
EN 50083-9:1998

A.3.2 Layer-1: Data encoding

The SSI Layer-1 deals with encoding/decoding aspects which are independent of the
transmission medium characteristics. Furthermore, this first layer performs the recogni-
tion of the three different transmission formats (see figures 6, 7 and 8) in order to allow
a fully transparent serialisation / deserialisation.

Layer-1 operations consist of:

- distinguishing the three transmission formats;
- parallel to serial conversion of the 8-bit byte with the MSB transmitted first;
- Biphase Mark coding of the serial signal in the transmitter.

The inverse operations are performed in the receiver.

Distinction between the three transmission formats on the serial link is performed as
follows:
- the transmission format with 188 Byte packets (figure 6) is characterized by a
synchronization byte 47H, the periodicity of which is 188 bytes;
- the transmission format with 204 Byte packets with 16 dummy bytes (figure 7) is
characterized by a synchronization byte 47H, the periodicity of which is 204
bytes;
- the transmission format of packets of 204 bytes with valid extra bytes (figure 8) is
characterized by an inverted synchronization byte (B8H) the periodicity of which
is 204 bytes.

Line coding

A Biphase Mark Code shall be used. Figure A.6a describes the rules of Biphase Mark
coding whereas figure A.6b illustrates that the required medium bandwidth is twice the
bandwidth required by NRZ coding.

The encoding rules are as follows:

- a transition always occurs at the beginning of the bit whatever its value is
(0 or 1).
- for logical 1, a transition occurs in the middle of the bit
- for logical 0, there is no transition on the middle of the bit.
 Page 27
EN 50083-9:1998

CLOCK

NRZ
DATA

BIPHASE
DATA these 2 levels are depending on initial condition

Figure A.6a: Biphase Mark coding scheme

0
D= f (f .T)
-5
dB

-10

-15

-20

-25

-30

-35

-40
0 0,5 1 1,5 2 2,5 3 3,5 4

f .T

Figure A.6b: Spectral density of Biphase Mark Code

(T is the bit duration of NRZ data)

Figure A.6: Biphase Mark encoding

Byte synchronization

The byte synchronization process in the receiving equipment has to take into account
the two possible packet formats, i.e. the 188 Byte packet format and the 204 Byte
packet format. The packet synchronization byte (47H or B8H) is used as a byte align-
ment pattern which serves for initializing the serial to parallel conversion. The occur-
rence of the synchronization byte (188 bytes or 204 bytes) and the value of the syn-
chronization byte (47H or B8H) are used to restore the DVALID signal and the PSYNC
signal.
Page 28
EN 50083-9:1998

If the received transmission format is 204 byte packet with valid extra bytes as
indicated in figure 8 the synchronisation byte (B8H) must be inverted in order to
recover the original synchronisation byte (47H) of the TS packet format to be delivered
to layer-2.

NOTE: In order to prevent possible synchronisation errors, it is recommended that

consecutive bytes 47H do not occur within the 188 byte or 204 byte data packet.

Clock recovery

In the receiver the clock recovery circuit extracts the transport clock directly from the
encoded data stream. The clock corresponds directly to the user data rate.

Bit-Error-Rate (BER) requirement

The BER shall be less than one part in 1013, as measured where data passes from
Layer-1 to Layer-2. That is, BER shall be measured where data emerge from the Bi-
phase Mark decoder.

A.3.3 Layer-2: Transport protocol

The SSI Layer-2 uses the MPEG-2 Transport Stream as defined in EN/ISO/IEC
13818-1 as its basic message unit. The MPEG-2 Transport Packet synchronization byte
(47H) is included in this Layer-2 packet definition to allow receive equipment to achieve
synchronization.

The Transport Packets shall be presented to Layer-2 either as contiguous 188 Byte
packets, or separated by 16 dummy bytes, or contiguous Reed Solomon encoded
204 Byte packets.
 Page 29
EN 50083-9:1998

Annex B (normative)

Asynchronous Serial Interface (ASI)

This annex describes a system for a serial, encoded transmission of different data rates
with a constant transmission rate, based on a layered structure of MPEG Transport
Packets according to EN/ISO/IEC 13818-1 as a top layer (Layer-2), and a pair of bot-
tom layers (Layer- 1 and Layer-0) based upon the Fibre Channel (FC) described in the
ISO/IEC CD 14165-1 „Fibre Channel - Part 1: Physical and signalling interface (FC-
PC)“. Layer-1 and Layer-0 are based upon a subset of Fibre Channel Levels FC-1 and
FC-0 .

Transport Streams from different sources may have different data rates. The use of a
constant transmission rate permits a constant receiver clock. To restore the original
clock rate, a PLL circuit can be used. Annex E gives some proposals for how such a
circuit can be designed. The input of the required transmission facility accepts
MPEG-2 Bytes and the output delivers MPEG-2 Bytes.

While the Fibre-Channel (FC) supports single mode fibre, multi-mode fibre, coaxial ca-
ble and twisted pair media interfaces, this standard defines only two distinct forms of
interfaces: coaxial cable and multi-mode fibre-optical cable using LED emitters.

Instead of a transmission rate of 265,625 Mbit/s, as required in the ISO/IEC standard,

in this document the transmission rate is 270,000 Mbit/s.

B.1 ASI transmission system overview

Figures B.1 and B.2 represent the primary components of the ASI transmission method
over copper coaxial cable and fibre-optic cable, respectively.

Layer-2 Layer-1 Layer-0

Packet- Sync Byte Coupling/

8B/10B Parallel/Serial Amplifier/ Connector
Synchronous (FC Comma) Impedance
Coding Conversion Buffer
MPEG2 TS Insertion Matching

Coaxial
Cable

Clock/Data
Packet- 8B/10B Sync Byte Recovery & Amplifier/ Coupling/
Synchronous (FC Comma) Serial/Parallel Impedance Connector
Decoding Buffer
MPEG-2 TS Deletion Conversion Matching

Figure B.1: Coaxial cable-based asynchronous serial transmission link (ASI type)
Page 30
EN 50083-9:1998

Layer-2 Layer-1 Layer-0

Packet- Sync Byte Optical

8B/10B Parallel/Serial Amplifier/ Connector
Synchronous (FC Comma) Emitter
Coding Conversion Buffer
MPEG-2 TS Insertion

Fibre-Optic
Cable

Clock/Data
Packet- Sync Byte Recovery & Amplifier/ Optical
Synchronous 8B/10B (FC Comma) Receiver Connector
Serial/Parallel Buffer
MPEG-2 TS Decoding Deletion Conversion

Figure B.2: Fibre-optic-based asynchronous serial transmission link (ASI type)

Data to be transmitted are presented in byte-synchronized form as MPEG-2 Transport

Packets. Bytes are then 8B/10B coded which produces one 10-bit word for each 8-bit
byte presented. These 10-bit words are then passed through a parallel-to-serial con-
verter which operates at a fixed output bit-rate of 270 Mbit/s. If the parallel-to-serial
converter requests a new input word and the data source does not have one ready, a
synchronization word shall be inserted. These sync words are to be ignored by receive
equipment. In the case of coaxial cable application, the resulting serial bit stream is
typically passed to a buffer/driver circuit and then through a coupling network to a co-
axial connector. In the case of fibre-optic application, the serial bit-stream is passed to
a driver circuit which drives an LED emitter which is coupled to a fibre-optic cable
through a mechanical connector.

Receive data arriving on a coaxial cable are first coupled through a connector and
coupling network to a circuit which recovers clock and data. In the case of fibre-optic
transmission, a light-sensitive detector converts light levels to electrical levels which
are then passed to a clock and data recovery circuit.

Recovered serial data bits are passed to a decoder which converts the 10-bit transmis-
sion words back into the 8-bit bytes originally transmitted. In order to recover byte
alignment, the decoder initially searches for synchronization words; the synchronization
word is a unique 10-bit pattern which is prevented from occurring (by the 8B/10B en-
coder) with all possible input data bytes. Once found, the start of the synchronization
word marks the boundary of subsequent received data words and establishes proper
byte-alignment of decoder output bytes.
 Page 31
EN 50083-9:1998

B.2 ASI configuration

An ASI interconnect physically consists of two nodes: a transmitting node and a re-
ceiving node. This unidirectional optical fibre or copper coaxial cable carrying data from
the transmitting node to the receiving node is referred to as a link. The link is used by
the interconnected ports to perform communication. Physical equipment such as video
or audio compressors, multiplexers, modulators, etc., can be interconnected through
these links. This ASI specification applies only to the point-to-point type link.

B.3 ASI protocol architecture description

The ASI protocol is divided into three architectural layers for purposes of development
of the standard: Layer-0, Layer-1, and Layer-2.

B.3.1 Layer-0: Physical requirements

The physical layer defines the transmission media, the drivers and receivers, and the
transmission speeds. The physical interface provides for both LED-driven multimode fi-
bre and copper coaxial cable. The base speed is defined as 270 Mbit/s (transmission
channel speed). The basic unit of Layer-0 is the link. The points where conformance is
required are shown as point S and R in the figure B.3.

Connector
Plug

Transmitter Receiver
(Tx) (Rx)
Cable or
Fibre Link
S R

Figure B.3: Serial link Layer-0 reference points

In coaxial applications, jitter is specified in the traditional manner of random and data
dependent jitter and duty cycle distortion. In LED-driven fibre based applications, jitter
is specified in terms of Random Jitter (RJ) and Deterministic Jitter (DJ). Deterministic
Jitter is the sum of data dependent jitter and duty cycle distortion. The DJ is due to the
timing distortions caused by normal circuit effects in the transmission system. It com-
prises of propagation delay difference between the rising and falling edge of a signal
and interaction of limited bandwidth of the transmission components and the symbol
sequence. The RJ is due to the thermal noise in the system and usually modelled as a
Gaussian process.
Page 32
EN 50083-9:1998

Line rates and bit timing

The encoded line rate with the 8B/10B block code is 270 Mbit/s which results in a me-
dia transmission rate of 270 MBaud. At the transmitter the serialisation is done using a
fixed oscillator to establish this 270 MBaud rate from which a phase-locked byte clock
is derived and used to shift in parallel bytes.

Receivers recover the serial transmission clock generally by the use of a phase-locked-
loop (PLL) oscillator locked to bit transitions of the incoming data stream. A phase-
locked byte clock is derived from this recovered serial bit clock and is used to shift par-
allel bytes out to Layer-1 processing elements.

It is required that the encoded line rate shall be 270 MBaud ± 100 ppm.

Receiver timing acquisition

A receiver shall first acquire bit synchronization, before attempting to align received
bytes. This time is measured from receipt of a valid input to the time the receiver is
synchronized to the bit stream and delivering valid re-timed data within the BER objec-
tive of the system.

It is required that bit synchronization shall occur in not more than 1 ms.

B.3.1.1 Electrical medium characteristics

The nominal cable impedance shall be 75 Ω.

Electrical medium connector

The required connector shall have mechanical characteristics conforming to the BNC
type.

NOTE: Due to its higher mechanical stability a 50 Ω BNC type connector ac-
cording to IEC 169-8 is recommended.

The electrical characteristics of the connector shall permit it to be used over the fre-
quency range of the specified interface.

Electrical characteristics

The parameters shall be met over the temperature, voltage and lifetime range of the
system. Electrical measurements shall be made with the interface terminated with the
connector specified above into 75 Ω resistive termination. Full electrical details are
provided in table B.1.
 Page 33
EN 50083-9:1998

Table B.1: Electrical characteristic specifications for ASI link

Transmitter output characteristics Units

Output voltage (p-p) mV 800 ± 10%
Deterministic Jitter (DJ) (p-p) % 10
Random Jitter (RJ) (p-p) % 8
Return loss dB under consideration
Max. rise/fall time (20-80%) ns 1,2

Receiver input characteristics Units

Min. sensitivity (D21.5 idle pattern) mV 200
Max. input voltage (p-p) mV 880
s11 (range: 0,1 to 1,0 x bit rate) dB -17
Min. discrete connector return loss dB -15
(5 MHz - 270 MHz)

The interface shall be coupled to the coaxial system via a transformer.

As measured according to the diagramme in figure B.4, the eye opening provided by
the transmitter shall be within the mask depicted in figure B.5.

TX
Transmit +
Network 75Ω
TY _

Figure B.4: Coaxial transmitter test circuit

normalized
amplitude
1.0

0.7
0.5
0.3 normalized
time

0.15 0.35 0.65 0.85

Figure B.5: Transmitter eye diagramme for jitter

Page 34
EN 50083-9:1998

B.3.1.2 Fibre-optic medium characteristics

The fibre-optic medium consists of a single section of fibre-optic cable connecting a

transmitter and receiver. The optical medium requirements are satisfied by a fibre with
a nominal diameter of 62,5/125 µm specified by IEC 793-2, type A1b, with the excep-
tions noted below. The system can operate, subject to certain restrictions, with a variety
of optical fibres; however, performance to this specification and interoperability be-
tween vendors equipment is assured only through the use of the optical fibre specified
in this subclause. This specification was developed on the basis of an attenuation
value of less than or equal to 1,5 dB/km, when measured at a wavelength of 1300 nm.
Higher loss fibre may be used for shorter fibre cable lengths.

Each optical fibre shall have a zero dispersion wavelength in the range of 1295 nm to
1365 nm and a dispersion slope not exceeding 0,110 ps/(km*nm2). Each optical fibre
shall have a dispersion characteristic in the range shown in table B.2 below:

Table B.2: Chromatic dispersion requirements

Zero dispersion wavelength Maximum dispersion slope

λ0 (nm) S0 [ps/(km*nm2)]
1295-1300 [λ0 - 1190]/1000
1300-1348 0,110
1348-1365 [1458-λ0 ]/1000

Optical medium connector

Fibre-optic cable connectors shall be of SC type according to IEC 874-14.

Optical characteristics

The transmit interface and receive interface parameters for 270 Mbit/s multimode fibre
interface shall be as summarized below. The parameters shall be met over the tem-
perature, voltage, and lifetime range of the system. Optical measurements shall be
made with the cable terminated with the optical connector and the optical fibre speci-
fied above. Fibre length shall be sufficient to ensure equilibrium mode distribution.
Methods of measurements are given in EN 50083-6, chapter 3.

The complete specification is given in the following table B.3 and associated figure B.6.
 Page 35
EN 50083-9:1998

Table B.3: Optical characteristic specifications for ASI link

Fibre link parameters Units

Fibre core diameter µm 62,5

Transmitter parameters Units

Type LED
Spectral center wavelength nm 1280 (min)
nm 1380 (max)
Max. spectral width nm FWHM See figure B.6
Ave.launched power dBm -20 (min)
dBm -14 (max)
Min. Extinction ratio dB 9
Deterministic Jitter (DJ) (p-p) % 16
Random Jitter (RJ) (p-p) % 9
Max. Optical rise/fall time ns 2,0/2,2

Receiver parameters Units

Ave. received power dBm -26 (min)
dBm -14 (max)
Deterministic Jitter (DJ) (p-p) % 19
Random Jitter (RJ) (p-p) % 9
Max. Optical rise/fall time ns 3,0

220
LED Spectral Width
(nm FWHM) 200
Tr = 1,8 ns
180
Tr = 1,9 ns
160 Tr = 2,0 ns

Tr = 2,1ns
140

120 Tr = 2,2 ns

100

80

60
1280 1300 1320 1340 1360 1380

LED Center Wavelength (nm)

Figure B.6: Spectral width of transmitter

Page 36
EN 50083-9:1998

B.3.2 Layer-1: Data encoding

The ASI transmission protocol includes serial encoding rules, special characters, and
error control. It uses a DC balanced 8B/10B transmission code. The code maps each
8-bit data byte into a 10-bit code with the following properties: a run length of 4 bits or
less and minimal DC offset. This code provides error checking through both invalid
transmission code points and the notion of 'running' disparity.

Special characters are defined as extra code points beyond the need to encode a byte
of data. One in particular, the comma character (K28.5 in the tables of annex C) is used
to establish byte synchronization in the ASI transmission link.

Coding requirements

The ASI transmission Layer-1 deals with encoding/decoding aspects which are inde-
pendent of the transmission medium characteristics. At Layer-1, 8B/10B transmission
coding is employed which provides for both a self checking capability and byte syn-
chronization of the link. The 10B transmission code is defined in terms of "disparity",
i.e. the difference in the number of "1" bits and "0" bits in the transmitted serial data
stream. It is through the disparity characteristics of the code that DC balance is main-
tained. Each 8B code point has two entries in the 10B code point map corresponding to
the positive and negative disparity representation for that 8B code point. The transmit-
ter is required to maintain the running disparity of the transmitted serial bit stream
within +/-1 of a neutral point by selection of the appropriate positive or negative dispar-
ity representation of the 10B code to be transmitted. The receiver will check the in-
coming bit stream for proper running disparity and invalid 10B code points to ensure
byte level data integrity.

Line coding

The 8B/10B transmission code specified in the Fibre Channel document [3] shall be the
encoding method utilized in ASI interface Layer-1. Annex C is a reproduction of the
8B/10B coding table from that standard and a brief description of the coding process.

NOTE: The ASI coding is not invariant to logical inversion of the transmitted bits.
Therefore, to ensure correct operation, care must be taken that equipment interface
circuitry of the non-inverting type is used.

Byte synchronization

The byte alignment synchronization pattern shall be the K28.5 code of the 8B/10B
code. The receiver shall present a properly aligned byte stream after the receipt of two
K28.5 special characters aligned on the same byte boundary within a 5 byte window.
The first byte received after the second K28.5 shall have valid byte alignment.
 Page 37
EN 50083-9:1998

Bit-Error-Rate (BER) performance

The BER shall be less than one part in 1013, as measured where data passes from
Layer-1 to Layer-2. That is, BER shall be measured where bytes emerge from the
8B/10B decoder.

Packet synchronization

At least two synchronization code words (K28.5) shall immediately precede every
Layer-2 Transport Packet.

B.3.3 Layer-2 transport protocol

The ASI Transmission Layer-2 standard uses the MPEG-2 Transport Stream Packet as
defined in EN ISO/IEC 13818-1 (Systems) as its basic message unit. Optionally the RS
coded bytestructure as specified in ETS 300 429 is also supported. Transport packets
can be transmitted as a block of contiguous bytes (that is, with no intervening sync
bytes in the transmitted stream for a single packet) or as individual bytes with
intervening sync bytes, or any combination of contiguous bytes and sync bytes.
Additionally, the ASI Layer-2 protocol specifies that at least two synchronization words
(K28.5) precede each transport packet.

NOTE: The MPEG-2 Transport Packet Synchronization word (47H) is included in this
Layer-2 packet definition to allow receiving equipment to achieve packet
synchronization.The packet synchronization process is not a part of this ASI
Transmission protocol definition.

Transport requirements

The ASI interface Layer-2 definition employs the MPEG-2 Transport Stream packet
syntax with the additional requirement that every Transport Packet shall preceded with
at least two K28.5 synchronization characters. Although 8B/10B receivers can gener-
ally maintain synchronization (once initially synchronized) without interspersed syn-
chronization codes, this leading sync byte requirement will allow re-sync within one
Transport Packet in the event that a line disturbance causes loss of sync.

Transport packet format

Transport packet structure shall conform to the specifications of EN/ISO/IEC 13818-1

and ETS 300 429 for Transport Stream Packets. The packet length can be 188 bytes or
204 bytes.

Transport packet timing

Transport packets may be presented to Layer-2 either as a burst of contiguous bytes

as shown in figure B.7, or as individual bytes spread out in time as shown in figure B.8.
(These figures reflect the result of these types of packet delivery as seen at Layer-1).
Page 38
EN 50083-9:1998

8B/10B coded stuffing data

MPEG Transport packet special character commas K28.5
1880 bit n x 10 bit

Figure B.7: Transmission format with data packets (example for 188 Bytes)

8B/10B coded MPEG Transport packet (1880 bit)

8B/10B coded stuffing data
and stuffing data (n x 10 bit)
MPEG Byte K28.5

Figure B.8: Transmission format with data bursts (example for 188 Bytes)
 Page 39
EN 50083-9:1998

Annex C (informative)

8B/10B tables

Table C.1: Valid data characters

Data Bits Current RD - Current RD + Data Bits Current RD - Current RD +

Byte Byte
Name HGF EDCBA abcdei fghj abcdei fghj Name HGF EDCBA abcdei fghj abcdei fghj
D0.0 000 00000 100111 0100 011000 1011 D16.1 001 10000 011011 1001 100100 1001
D1.0 000 00001 011101 0100 100010 1011 D17.1 001 10001 100011 1001 100011 1001
D2.0 000 00010 101101 0100 010010 1011 D18.1 001 10010 010011 1001 010011 1001
D3.0 000 00011 110001 1011 110001 0100 D19.1 001 10011 110010 1001 110010 1001
D4.0 000 00100 110101 0100 001010 1011 D20.1 001 10100 001011 1001 001011 1001
D5.0 000 00101 101001 1011 101001 0100 D21.1 001 10101 101010 1001 101010 1001
D6.0 000 00110 011001 1011 011001 0100 D22.1 001 10110 011010 1001 011010 1001
D7.0 000 00111 111000 1011 000111 0100 D23.1 001 10111 111010 1001 000101 1001
D8.0 000 01000 111001 0100 000110 1011 D24.1 001 11000 110011 1001 001100 1001
D9.0 000 01001 100101 1011 100101 0100 D25.1 001 11001 100110 1001 100110 1001
D10.0 000 01010 010101 1011 010101 0100 D26.1 001 11010 010110 1001 010110 1001
D11.0 000 01011 110100 1011 110100 0100 D27.1 001 11011 110110 1001 001001 1001
D12.0 000 01100 001101 1011 001101 0100 D28.1 001 11100 001110 1001 001110 1001
D13.0 000 01101 101100 1011 101100 0100 D29.1 001 11101 101110 1001 010001 1001
D14.0 000 01110 011100 1011 011100 0100 D30.1 001 11110 011110 1001 100001 1001
D15.0 000 01111 010111 0100 101000 1011 D31.1 001 11111 101011 1001 010100 1001
D16.0 000 10000 011011 0100 100100 1011 D0.2 010 00000 100111 0101 011000 0101
D17.0 000 10001 100011 1011 100011 0100 D1.2 010 00001 011101 0101 100010 0101
D18.0 000 10010 010011 1011 010011 0100 D2.2 010 00010 101101 0101 010010 0101
D19.0 000 10011 110010 1011 110010 0100 D3.2 010 00011 110001 0101 110001 0101
D20.0 000 10100 001011 1011 001011 0100 D4.2 010 00100 110101 0101 001010 0101
D21.0 000 10101 101010 1011 101010 0100 D5.2 010 00101 101001 0101 101001 0101
D22.0 000 10110 011010 1011 011010 0100 D6.2 010 00110 011001 0101 011001 0101
D23.0 000 10111 111010 0100 000101 1011 D7.2 010 00111 111000 0101 000111 0101
D24.0 000 11000 110011 0100 001100 1011 D8.2 010 01000 111001 0101 000110 0101
D25.0 000 11001 100110 1011 100110 0100 D9.2 010 01001 100101 0101 100101 0101
D26.0 000 11010 010110 1011 010110 0100 D10.2 010 01010 010101 0101 010101 0101
D27.0 000 11011 110110 0100 001001 1011 D11.2 010 01011 110100 0101 110100 0101
D28.0 000 11100 001110 1011 001110 0100 D12.2 010 01100 001101 0101 001101 0101
D29.0 000 11101 101110 0100 010001 1011 D13.2 010 01101 101100 0101 101100 0101
D30.0 000 11110 011110 0100 100001 1011 D14.2 010 01110 011100 0101 011100 0101
D31.0 000 11111 101011 0100 010100 1011 D15.2 010 01111 010111 0101 101000 0101
D0.1 001 00000 100111 1001 011000 1001 D16.2 010 10000 011011 0101 100100 0101
D1.1 001 00001 011101 1001 100010 1001 D17.2 010 10001 100011 0101 100011 0101
D2.1 001 00010 101101 1001 010010 1001 D18.2 010 10010 010011 0101 010011 0101
D3.1 001 00011 110001 1001 110001 1001 D19.2 010 10011 110010 0101 110010 0101
D4.1 001 00100 110101 1001 001010 1001 D20.2 010 10100 001011 0101 001011 0101
D5.1 001 00101 101001 1001 101001 1001 D21.2 010 10101 101010 0101 101010 0101
D6.1 001 00110 011001 1001 011001 1001 D22.2 010 10110 011010 0101 011010 0101
D7.1 001 00111 111000 1001 000111 1001 D23.2 010 10111 111010 0101 000101 0101
D8.1 001 01000 111001 1001 000110 1001 D24.2 010 11000 110011 0101 001100 0101
D9.1 001 01001 100101 1001 100101 1001 D25.2 010 11001 100110 0101 100110 0101
D10.1 001 01010 010101 1001 010101 1001 D26.2 010 11010 010110 0101 010110 0101
D11.1 001 01011 110100 1001 110100 1001 D27.2 010 11011 110110 0101 001001 0101
D12.1 001 01100 001101 1001 001101 1001 D28.2 010 11100 001110 0101 001110 0101
D13.1 001 01101 101100 1001 101100 1001 D29.2 010 11101 101110 0101 010001 0101
D14.1 001 01110 011100 1001 011100 1001 D30.2 010 11110 011110 0101 100001 0101
D15.1 001 01111 010111 1001 101000 1001 D31.2 010 11111 101011 0101 010100 0101
Page 40
EN 50083-9:1998

Table C.1 (continued): Valid data characters

Data Bits Current RD - Current RD + Data Bits Current RD - Current RD +
Byte Byte
Name HGF EDCBA abcdei fghj abcdei fghj Name HGF EDCBA abcdei fghj abcdei fghj
D0.3 011 00000 100111 0011 011000 1100 D16.4 100 10000 011011 0010 100100 1101
D1.3 011 00001 011101 0011 100010 1100 D17.4 100 10001 100011 1101 100011 0010
D2.3 011 00010 101101 0011 010010 1100 D18.4 100 10010 010011 1101 010011 0010
D3.3 011 00011 110001 1100 110001 0011 D19.4 100 10011 110010 1101 110010 0010
D4.3 011 00100 110101 0011 001010 1100 D20.4 100 10100 001011 1101 001011 0010
D5.3 011 00101 101001 1100 101001 0011 D21.4 100 10101 101010 1101 101010 0010
D6.3 011 00110 011001 1100 011001 0011 D22.4 100 10110 011010 1101 011010 0010
D7.3 011 00111 111000 1100 000111 0011 D23.4 100 10111 111010 0010 000101 1101
D8.3 011 01000 111001 0011 000110 1100 D24.4 100 11000 110011 0010 001100 1101
D9.3 011 01001 100101 1100 100101 0011 D25.4 100 11001 100110 1101 100110 0010
D10.3 011 01010 010101 1100 010101 0011 D26.4 100 11010 010110 1101 010110 0010
D11.3 011 01011 110100 1100 110100 0011 D27.4 100 11011 110110 0010 001001 1101
D12.3 011 01100 001101 1100 001101 0011 D28.4 100 11100 001110 1101 001110 0010
D13.3 011 01101 101100 1100 101100 0011 D29.4 100 11101 101110 0010 010001 1101
D14.3 011 01110 011100 1100 011100 0011 D30.4 100 11110 011110 0010 100001 1101
D15.3 011 01111 010111 0011 101000 1100 D31.4 100 11111 101011 0010 010100 1101
D16.3 011 10000 011011 0011 100100 1100 D0.5 101 00000 100111 1010 011000 1010
D17.3 011 10001 100011 1100 100011 0011 D1.5 101 00001 011101 1010 100010 1010
D18.3 011 10010 010011 1100 010011 0011 D2.5 101 00010 101101 1010 010010 1010
D19.3 011 10011 110010 1100 110010 0011 D3.5 101 00011 110001 1010 110001 1010
D20.3 011 10100 001011 1100 001011 0011 D4.5 101 00100 110101 1010 001010 1010
D21.3 011 10101 101010 1100 101010 0011 D5.5 101 00101 101001 1010 101001 1010
D22.3 011 10110 011010 1100 011010 0011 D6.5 101 00110 011001 1010 011001 1010
D23.3 011 10111 111010 0011 000101 1100 D7.5 101 00111 111000 1010 000111 1010
D24.3 011 11000 110011 0011 001100 1100 D8.5 101 01000 111001 1010 000110 1010
D25.3 011 11001 100110 1100 100110 0011 D9.5 101 01001 100101 1010 100101 1010
D26.3 011 11010 010110 1100 010110 0011 D10.5 101 01010 010101 1010 010101 1010
D27.3 011 11011 110110 0011 001001 1100 D11.5 101 01011 110100 1010 110100 1010
D28.3 011 11100 001110 1100 001110 0011 D12.5 101 01100 001101 1010 001101 1010
D29.3 011 11101 101110 0011 010001 1100 D13.5 101 01101 101100 1010 101100 1010
D30.3 011 11110 011110 0011 100001 1100 D14.5 101 01110 011100 1010 011100 1010
D31.3 011 11111 101011 0011 010100 1100 D15.5 101 01111 010111 1010 101000 1010
D0.4 100 00000 100111 0010 011000 1101 D16.5 101 10000 011011 1010 100100 1010
D1.4 100 00001 011101 0010 100010 1101 D17.5 101 10001 100011 1010 100011 1010
D2.4 100 00010 101101 0010 010010 1101 D18.5 101 10010 010011 1010 010011 1010
D3.4 100 00011 110001 1101 110001 0010 D19.5 101 10011 110010 1010 110010 1010
D4.4 100 00100 110101 0010 001010 1101 D20.5 101 10100 001011 1010 001011 1010
D5.4 100 00101 101001 1101 101001 0010 D21.5 101 10101 101010 1010 101010 1010
D6.4 100 00110 011001 1101 011001 0010 D22.5 101 10110 011010 1010 011010 1010
D7.4 100 00111 111000 1101 000111 0010 D23.5 101 10111 111010 1010 000101 1010
D8.4 100 01000 111001 0010 000110 1101 D24.5 101 11000 110011 1010 001100 1010
D9.4 100 01001 100101 1101 100101 0010 D25.5 101 11001 100110 1010 100110 1010
D10.4 100 01010 010101 1101 010101 0010 D26.5 101 11010 010110 1010 010110 1010
D11.4 100 01011 110100 1101 110100 0010 D27.5 101 11011 110110 1010 001001 1010
D12.4 100 01100 001101 1101 001101 0010 D28.5 101 11100 001110 1010 001110 1010
D13.4 100 01101 101100 1101 101100 0010 D29.5 101 11101 101110 1010 010001 1010
D14.4 100 01110 011100 1101 011100 0010 D30.5 101 11110 011110 1010 100001 1010
D15.4 100 01111 010111 0010 101000 1101 D31.5 101 11111 101011 1010 010100 1010
 Page 41
EN 50083-9:1998

Table C.1 (concluded): Valid data characters

Data Bits Current RD - Current RD + Data Bits Current RD - Current RD +
Byte Byte
Name HGF EDCBA abcdei fghj abcdei fghj Name HGF EDCBA abcdei fghj abcdei fghj
D0.6 110 00000 100111 0110 011000 0110 D0.7 111 00000 100111 0001 011000 1110
D1.6 110 00001 011101 0110 100010 0110 D1.7 111 00001 011101 0001 100010 1110
D2.6 110 00010 101101 0110 010010 0110 D2.7 111 00010 101101 0001 010010 1110
D3.6 110 00011 110001 0110 110001 0110 D3.7 111 00011 110001 1110 110001 0001
D4.6 110 00100 110101 0110 001010 0110 D4.7 111 00100 110101 0001 001010 1110
D5.6 110 00101 101001 0110 101001 0110 D5.7 111 00101 101001 1110 101001 0001
D6.6 110 00110 011001 0110 011001 0110 D6.7 111 00110 011001 1110 011001 0001
D7.6 110 00111 111000 0110 000111 0110 D7.7 111 00111 111000 1110 000111 0001
D8.6 110 01000 111001 0110 000110 0110 D8.7 111 01000 111001 0001 000110 1110
D9.6 110 01001 100101 0110 100101 0110 D9.7 111 01001 100101 1110 100101 0001
D10.6 110 01010 010101 0110 010101 0110 D10.7 111 01010 010101 1110 010101 0001
D11.6 110 01011 110100 0110 110100 0110 D11.7 111 01011 110100 1110 110100 1000
D12.6 110 01100 001101 0110 001101 0110 D12.7 111 01100 001101 1110 001101 0001
D13.6 110 01101 101100 0110 101100 0110 D13.7 111 01101 101100 1110 101100 1000
D14.6 110 01110 011100 0110 011100 0110 D14.7 111 01110 011100 1110 011100 1000
D15.6 110 01111 010111 0110 101000 0110 D15.7 111 01111 010111 0001 101000 1110
D16.6 110 10000 011011 0110 100100 0110 D16.7 111 10000 011011 0001 100100 1110
D17.6 110 10001 100011 0110 100011 0110 D17.7 111 10001 100011 0111 100011 0001
D18.6 110 10010 010011 0110 010011 0110 D18.7 111 10010 010011 0111 010011 0001
D19.6 110 10011 110010 0110 110010 0110 D19.7 111 10011 110010 1110 110010 0001
D20.6 110 10100 001011 0110 001011 0110 D20.7 111 10100 001011 0111 001011 0001
D21.6 110 10101 101010 0110 101010 0110 D21.7 111 10101 101010 1110 101010 0001
D22.6 110 10110 011010 0110 011010 0110 D22.7 111 10110 011010 1110 011010 0001
D23.6 110 10111 111010 0110 000101 0110 D23.7 111 10111 111010 0001 000101 1110
D24.6 110 11000 110011 0110 001100 0110 D24.7 111 11000 110011 0001 001100 1110
D25.6 110 11001 100110 0110 100110 0110 D25.7 111 11001 100110 1110 100110 0001
D26.6 110 11010 010110 0110 010110 0110 D26.7 111 11010 010110 1110 010110 0001
D27.6 110 11011 110110 0110 001001 0110 D27.7 111 11011 110110 0001 001001 1110
D28.6 110 11100 001110 0110 001110 0110 D28.7 111 11100 001110 1110 001110 0001
D29.6 110 11101 101110 0110 010001 0110 D29.7 111 11101 101110 0001 010001 1110
D30.6 110 11110 011110 0110 100001 0110 D30.7 111 11110 011110 0001 100001 1110
D31.6 110 11111 101011 0110 010100 0110 D31.7 111 11111 101011 0001 010100 1110

Table C.2: Valid special characters

Special Current RD - Current RD +

Code
Name abcdei fghj abcdei fghj
K28.0 001111 0100 110000 1011
K28.1 001111 1001 110000 0110
K28.2 001111 0101 110000 1010
K28.3 001111 0011 110000 1100
K28.4 001111 0010 110000 1101
K28.5 001111 1010 110000 0101
K28.6 001111 1000 110000 1001
K23.7 111010 1000 000101 0111
K27.7 110110 1000 001001 0111
K29.7 101110 1000 010001 0111
K30.7 011110 1000 100001 0111
Page 42
EN 50083-9:1998

The terminology of encoding used in table C.1 is described as follows:

Data Byte d7 d6 d5 d4 d3 d2 d1 d0
8B information character H G F E D C B A
10B transmission character a b c d e i f g h j

Bit a is transmitted first. Each transmission character in the table (Valid data character)
is associated with a name Dx.y, where

x is the decimal value of the bits EDCBA

(x)dec ≡ (EDCBA)bin

y is the decimal value of the bits HGF:

(y)dec ≡ (HGF)bin

In addition there are further 10B code words named Valid Special Characters Kx.y, see
table C.2. Only the Special Character: K28.5 (Comma) is here used as stuffing data
and for byte synchronization.

Example

Encoding of the MPEG synchronous byte 47hex = 0100 0111 (Data byte name D7.2).

8B information Character 0 1 0 0 0 1 1 1
10B transmission Character RD+ 1 1 1 0 0 0 0 1 0 1
10B transmission Character RD- 0 0 0 1 1 1 0 1 0 1

Encoding depends on the parameter RD (Running Disparity). RD determines the ratio

of zeros and ones during the transmission. Switching between the code words de-
pending on the RD in the transmitter and receiver maintains the DC balance. RD is cal-
culated based on two sub-blocks: bits abcdei and bits fghj of the transmission charac-
ter. RD at the beginning of a sub-block is the calculated RD of the last sub-block. RD at
the end of any sub-block is positive, if the sub-block contains more ones than zeros, or
if the sub-block is 000111 or 0011. RD at the end of any sub-block is negative, if the
sub-block contains more zeros than ones, or if the sub-block is 111000 or 1100. Oth-
erwise the last RD is taken. Initialization of the transmitter is done with negative RD,
the transmitter may assume either the positive or the negative RD. Independent of the
validity of the transmission characters the received transmission characters shall be
used as the receiver's current RD for the next transmission character.

The redundancy of the 8B/10B transmission code can be used for error detection.
 Page 43
EN 50083-9:1998

Code violations may result from a prior error which altered the RD of the bit stream,
causing a detectable error at the current transmission character. The example in table
C.3 shows this behaviour.

Table C.3: Delayed code violation example

RD Character 1 RD Character 2 RD Character 3 RD

Transmitted character - D21.1 - D10.2 - D23.5 +
stream
Transmitted bit stream - 101010 1001 - 010101 0101 - 111010 1010 +
Bit stream after error - 101010 1011 + 010101 0101 + 111010 1010 +
Decoded character stream - D21.0 + D10.2 + Code violation +
Page 44
EN 50083-9:1998

Annex D (informative)

Implementation guidelines and clock recovery from the

Synchronous Serial Interface (SSI)

D.1 Example of implementation of the SSI interface

Hardware implementation of the proposed SSI interface was undertaken in order to

validate the serial transmission in a real MPEG-2 chain including TS multiplexer, QPSK
modulator/demodulator, QAM modulator/demodulator.

It consists of two adapter modules:

- an emitting module which transforms the parallel interface, such as described in

4.1 into the serial mode;

- a receiving module which performs the reverse function in recovering the Trans-
port Packets conforming to the parallel interface.

Clock 1 Clock 1

Data (0-7) 8 Data (0-7) 8

parallel-serial coaxial or fibre
TX serial-parallel RX
DVALID 1 adapter adapter DVALID 1
system
PSYNC 1 PSYNC 1

Figure D.1: Connection of the adapter modules

D.2 Emitting module

The main functions are:

- The parallel to serial conversion

- The generation of the serial clock by a multiplication by 8 of the parallel clock.

- Biphase-Mark encoding .
As an example, using a Manchester Biphase-Mark encoder.

- LED driver for optical transmission

- Cable driver for coaxial transmission

 Page 45
EN 50083-9:1998

1:8

progammable
serial clock
Parallel generator
Coaxial
Clock reference Coupling/ output
Amplifier
PSYNC Biphase Impedance
Parallel/Serial /Buffer
Data (0-7) matching
Conversion encoder
DVALID LED
output
PARALLEL SERIAL
INTERFACE INTERFACE

Figure D.2: Example of implementation of an emitting module

D.3 Receiving module

The byte synchronization process in the receiving equipment has to take into account
the two possible packet formats, i.e. the 188 Byte-packet format and the 204 Byte-
packet format.

An automatic byte synchronization was performed as follows:

- a first attempt of synchronization can be done on the hypothesis of 188 Byte-
packet format;
- if the first attempt is unsuccessful, the synchronization is done on the 204 Byte-
packet format.

The main functions are:

- Cable equalizer for coaxial reception

- Optical receiver for optical reception

- Clock recovering and Biphase Mark decoding .

As an example, using a Manchester Biphase Mark decoder.

- Byte synchronization and deserialisation

Page 46
EN 50083-9:1998

serial
clock
clock
VCO
reference Synchro
byte
detection

Coupling/
Amplifier sync
Impedance decoder
/equalizer
matching
DVALID
Biphase decoder serial SerialParallel Data (0-7)
data Conversion PSYNC
SERIAL Parallel Clock
INTERFACE
PARALLEL
INTERFACE

Figure D.3: Example of implementation of a receiving module

A receiving module capable of receiving a Transport Stream of any frequency within a

certain predefined frequency range can be designed according to the following princi-
ple:

- A signal which indicates if the PLL is locked or not has to be present

- If the PLL is not locked, the value of the reference clock is changed step by step
until the PLL is locked.

1:N
sampling
of the VCO LF oscillator
"locked signal"
programmable
serial clock
generator
"locked/
reference
not locked"

serial
1:40 1:5 clock
VCO
20 MHz Synchro
byte
detection

Coupling/
Amplifier sync
Impedance decoder
/equalizer
matching
DVALID
Biphase decoder serial SerialParallel Data (0-7)
data PSYNC
Conversion
SERIAL
Parallel Clock
INTERFACE
PARALLEL
INTERFACE

Figure D.4: Example of implementation of a

flexible data rate receiving module for SSI
 Page 47
EN 50083-9:1998

D.4 Physical media

Different physical media can be used :

Coaxial cable

With the requirements, given in A.3.1.1, the following typical links can be handled:

For coaxial cables equivalent to RG 59 BU: a maximum distance of 100 m

For coaxial cables equivalent to RG 216 U: a maximum distance of 220 m

Optical fibre

Multimode or Singlemode: several km, depending on configuration.

Page 48
EN 50083-9:1998

Annex E (informative)

Implementation guidelines and deriving clocks from the MPEG-2 packets

for the ASI

The ASI receiver generally is the input part of a complex device such as a modulator, a
multiplexer or an adapter for telecommunications networks. The MPEG specification
offers different possibilities for the regeneration of a valid MPEG Transport Stream.

Figure E.1 shows two applications: the Transport Stream clock either is determined by
the subsequent equipment or extracted from the transmitted signal itself.

Concerning clock generation from an ASI data stream, information on the PLL circuitry
is given in the following.

TS
8B/10B
TS ENCODE COAXIAL
RATE FILLER OR
P/S
CLOCK INSERT FIBER
FILLER COUPLER
CODEWORDS

270 MHz
OSC

10B/8B
COAXIAL BYTE FIFO TS
OR FILLER DECODE
ALIGNMENT S/P
FIBRE
RECOVERY DISCARD CLOCK FROM
COUPLER
FOLLOWING
APPLICATION

CLOCK
RECOVERY
PLL 270 MHz
BIT CLOCK TS
TS
CLOCK
RECOVERY TS
RATE
CLOCK

Figure E.1: ASI link with output clock from following application or alternative
with clock recovery.

The induced jitter from the ASI itself is only about ±40ns. Consequently, there is little
need for clock/rate recovery in most distribution systems. However, in those circum-
stances which may require transport rate recovery or smoothing, the following example
illustrates the feasibility of locking to the transport rate via the packet sync byte.

In order to ensure that the channel’s delivery rate frequency lock loop is useful for both
packets which are delivered in bursts and those which are linearly distributed, it is sug-
gested that the loop use the packet sync byte for timing. For this example it is assumed
that the MPEG-2 packets arrive at a nominal 10 kHz rate corresponding to a bit rate of
15,04 Mbit/s. By phase locking to the sync byte arrival, a packet clock and a bit clock
can be derived. The circuit to be used is a second order phase-locked loop (PLL) as
shown in figure E.2. The sync byte detector produces a time error between the de-
 Page 49
EN 50083-9:1998

tected and the hypothesized arrival times. This error drives a second order loop filter
which in turn controls a VCO or a PLL that operates near the 10 kHz rate. This clock
can be multiplied up by 1504 to generate a bit rate clock.

MPEG-2 SYNC BYTE &

PACKETS TIME ERROR SECOND ORDER
ERROR LOOP FILTER
DETECTOR

10 kHz VCO
CONTROL

15.04 MHz VCO

FIFO for
TRANSPORT
RATE CONTROL
FREQUENCY
ACQUISITION
& JITTER

Figure E.2: Phase Locked Loop for clock generation

It is also assumed in this simplified example that the transport rate shall be known in
order to set the loop multiplier due to the wide range of rates which shall be tracked.
Of course, MPEG clock timing constraints are also assumed.

A FIFO buffer is included in this example in order to

• provide a smoothing buffer for the output rate control mechanism;
• provide a clock acquisition buffer to account for the initial rate differential be-
tween input and output as the PLL adapts to the changing transport rates with
possibly different (up to 60ppm) rate clocks;
• buffer the packet jitter which may be introduced by the interface or attached
equipment (likely to be very small).

Table E.1 contains a mathematical analysis and simulation of the difference equations
comprising a digital implementation of the circuit in figure E.2.
Page 50
EN 50083-9:1998

The assumptions are that the arrival rate is 10 kHz with a ±50 µs uniform jitter (θn). The
loop constants K1 and K2 are chosen to make the damping factor 0,707 and the loop
bandwidth 52,5 Hz, assuming a 10 kHz sample rate. The variable ACCTn is the accu-
mulator in the loop filter, and it converges to the time interval between arriving sync
bytes. Consequently, its inverse is the rate at which sync bytes arrive. The first curve
shows this rate converging to 10 kHz after about 700 samples (0,07 s). The frequency
accuracy is shown by computing the mean (Amean) and standard deviation (Asd) of
this inverse. The next set of calculations show the clock accuracy in seconds with the
standard deviation being about 19 ns. The deviation, or jitter, may be traded for acqui-
sition time, as an MPEG-2 decoder suppose more than 19 ns of apparent packet jitter.

Table E.2 shows a mathematical analysis and simulation for the circuit of figure E.2 op-
erating with a delivery rate that jitters at ± 2 ms. Note that the loop still acquires syn-
chronization in about 700 samples, or 0,07 s. The accuracy of the derived clock is de-
picted by Amean and Asd for the frequency, and Tmean and Tsd for the time. The
standard deviation of the time is now 765 ns, or about 40 times the results of table E.1.
This is still very small relative to the currently suggested real time jitter constraint for
MPEG-2 decoders.
 Page 51
EN 50083-9:1998

Table E.1: Analysis of 10 kHz clock generating loop,

± 50 µs jitter

n 0 .. 20000 K1 .014 K2 .000098

T0 .0001
φ0 0
ACCT0 1.005. T0 θn 1.0. ( rnd( 1 ) .5 )
ACCP0 0

φ( n 1 ) n. 1.00 θ n . T0 ACCPn

ACCT( n 1 ) ACCTn K2. φ n

ACCP( n 1 ) ACCPn K1. φ n ACCTn

4
1 10

4
1 10

1
ACCT 9980
n

9960

9940
0 100 200 300 400 500
n

20000 20000
1 . 1 1 .
Amean Tmean ACCTn
10000 ACCTn 10000
n = 10001 n = 10001

4
Amean = 1.000005167 10 Tmean = 0.000099999487

20000 2
20000
1 . 1 1 . 2
Asd Amean Tsd ACCTn Tmean
10000 ACCTn 10000
n = 10001 n = 10001
8
Asd = 1.9119 Tsd = 1.9118 10
Page 52
EN 50083-9:1998

Table E.2: Analysis of 10 kHz clock generating loop,

± 2 ms jitter

n 0 .. 20000 K1 .014 K2 .000098

T0 .0001
φ0 0
ACCT0 1.005. T0 θn 40. ( rnd( 1 ) .5 )
ACCP0 0

φ( n 1 ) n. 1.00 θ n . T0 ACCPn

ACCT( n 1 ) ACCTn K2. φ n

ACCP( n 1 ) ACCPn K1. φ n ACCTn

4
1 10

4
1 10

1
4
ACCT 1 10
n

9800

9600
0 500 1000 1500 2000
n

20000 20000
1 . 1 1 .
Amean Tmean ACCTn
10000 ACCTn 10000
n = 10001 n = 10001
4 5
Amean = 1.000263885 10 Tmean = 9.997947721 10

20000 2
20000
1 . 1 1 . 2
Asd Amean Tsd ACCTn Tmean
10000 ACCTn 10000
n = 10001 n = 10001

7
Asd = 76.636 Tsd = 7.647 10
 Page 53
EN 50083-9:1998

Annex F (informative)

Bibliography

[1] DVB-TM 11 July 1995 Interfaces for CATV/SMATV headends and

1449 Rev 1 similar professional equipment (10th working
draft)
DVB Project Office
c/o European Broadcasting Union
17 A Ancienne Route
CH-1218 Grand Saconnex / Geneva
Switzerland

[2] EIA/TIA Dec. 1994 Electrical Characteristics of Low Voltage

SP 3357 Differential Signaling (LVS)
Interface Circuits

[3] ANSI 1982 Unified Inch Screw Threads

B1.1 (UN and UNR Thread Form)
American National Standard
(American National Standards Institute
11 W. 42nd Street, New York, New York 10036)