ANGUS ELECTRONICS CO., LTD.

Tel: (852) 2345 0540

PT2314E
Fax: (852) 2345 9948 Web Site: www.angus.com.hk

Stereo Audio Processor for Home/TV Audio

DESCRIPTION FEATURES
The PT2314E is an audio processor designed for • 4 stereo inputs with gain selection, range from 0dB
versatile application, includes 4 stereo input selector to +11.25dB in 3.75dB/step
with adjustable gain, master volume control with low • Master volume from 0 dB to -78.75dB in
frequency loudness compensation, speaker output 1.25dB/step
attenuator and tone control. It is a good solution for the • Speaker attenuator for balance, range from 0dB to
home audio signal processing. -38.75dB in 1.25dB/step
• Each channel output can be muted individually.
Due to the high reliability requirement from the audio • Low frequency loudness compensation
business, the PT2314E improves both audio • Bass and Treble control, range from -14dB to
performances and input surge current capability, these +14dB in 2dB/step
causes the PT2314E is the best solution for the
• Wide operation range (VDD=4V to 10V)
cost-effective audio systems.
• Low harmonic distortion, low noise
• Improved and replace PT2314 and PT2314A
APPLICATIONS
• Flat Panel TV
• Home Audio System
• Powered Speaker System

APPLICATION CIRCUIT

PT2314E

VDD 1 VDD REF 28

22uF
2 AGND SCL 27
MCU
3 TREB_L SDA 26
Input Surge 2.7n
Protection 4 TREB_R DGND 25
2.7n
L Front Left
2.2uF
5 RIN OUT_L 24
2.2K 2.2uF 10uF
AUDIO 4
R 6 ROUT OUT_R 23
2.2K 2.2uF 10uF
7 LOUD_R BOUT_R 22 Front Right
L 100n 100n
2.2K 2.2uF 8 RIN4 BIN_R 21 5.6K
AUDIO 3 100n Power
R 9 RIN3 BOUT_L 20 Amplifier
2.2K 2.2uF
100n
10 RIN2 BIN_L 19 5.6K
L 100n
2.2K 2.2uF
AUDIO 2 11 RIN1 LOUT 18
R 2.2uF
2.2K 2.2uF 12 LOUD_L LIN 17
100n
L 13 LIN4 LIN1 16
2.2K 2.2uF
AUDIO 1 14 LIN3 LIN2 15
R
2.2K 2.2uF
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PT2314E

BLOCK DIAGRAM
Speaker Attenuator
With Mute

OUT_L OUT_R

REF REF

TREB_L TREBLE TREBLE TREB_R

BIN_L Master BIN_R

BASS Volume BASS
BOUT_L BOUT_R

REF Loud REF

SW
LOUD_L LOUDNESS LOUDNESS LOUD_R

LIN RIN
LOUT ROUT
LIN4 Input SW and RIN4
LIN3 GAIN RIN3
LIN2 RIN2
LIN1 RIN1

REF REF
VDD SCL
INT
Ref
REF I2C
REF BIAS DECODER SDA

DGND
AGND

V1.0 2 January 2010

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PT2314E

ORDER INFORMATION
Valid Part Number Package Type Top Code
PT2314E-S 28 Pins, SOP, 300mil PT2314E

PIN CONFIGURATION

VDD 1 28 REF
AGND 2 27 SCL
TREB_L 3 26 SDA
TREB_R 4 25 DGND
RIN 5 24 OUT_L
ROUT 6 23 OUT_R
LOUD_R 7 PT2314E 22 BOUT_R
RIN4 8 21 BIN_R
RIN3 9 20 BOUT_L
RIN2 10 19 BIN_L
RIN1 11 18 LOUT
LOUD_L 12 17 LIN
LIN4 13 16 LIN1
LIN3 14 15 LIN2

V1.0 3 January 2010

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PT2314E

PIN DESCRIPTION
Pin Name I/O Description Pin No.
VDD - Supply input voltage 1
AGND - Analog ground 2
TREB_L I Left channel input for treble controller 3
TREB_R I Right channel input for treble controller 4
RIN I Right channel volume controller input 5
ROUT O Right channel Input selector output 6
LOUD_R I Right channel loudness input 7
RIN4 I Right channel input 4 8
RIN3 I Right channel input 3 9
RIN2 I Right channel input 2 10
RIN1 I Right channel input 1 11
LOUD_L I Left channel loudness input 12
LIN4 I Left channel input 4 13
LIN3 I Left channel input 3 14
LIN2 I Left channel input 2 15
LIN1 I Left channel input 1 16
LIN I Left channel volume controller input 17
LOUT O Left channel Input selector output 18
BIN_L I Left channel input for bass controller 19
BOUT_L O Left channel output for bass controller 20
BIN_R I Right channel input for bass controller 21
BOUT_R O Right channel output for bass controller 22
OUT_R O Right channel output 23
OUT_L O Left channel output 24
DGND - Digital ground 25
SDA I I2C data input 26
SCL I I2C clock input 27
REF - Analog reference voltage (1/2VDD) 28

V1.0 4 January 2010

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PT2314E

CONTROL BUS SPECIFICATION

BUS INTERFACE
All functions of the PT2314E are controlled by the I2C interface, the interface is consisting by SDA and SCL pins. Detail
protocol of the I2C bus will discuss on the next section. It should be noted that the bus level pull-up resistors connected to
the PT2314E positive supply voltage may required in some application especially the MCU output high level is no
enough.

DATA VALIDITY
A data on the SDA Line is considered valid and stable only when the SCL Signal is in HIGH State. The HIGH and LOW
State of the SDA Line can only change when the SCL signal is LOW. Please refer to the figure below.

START AND STOP CONDITIONS

A Start Condition is activated when
1) The SCL is set to HIGH and
2) SDA shifts from HIGH to LOW State.

The Stop Condition is activated when

1) SCL is set to HIGH and
2) SDA shifts from LOW to HIGH State. Please refer to the timing diagram below.

BYTE FORMAT
Every byte transmitted to the SDA Line consists of 8 bits. Each byte must be followed by an Acknowledge Bit. The MSB
is first transmitted.

V1.0 5 January 2010

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PT2314E

ACKNOWLEDGE
During the Acknowledge clock pulse (ACK), the SDA output port of the master device (μP) would be sets on Hi-Z state,
if peripheral device (ex : audio processor) recognize the I2C command the SDA line will be pull-down by slave device
during the SCL clock pulse held in HIGH state period. Please refer to the diagram below. The slave device that has been
addressed to generate an Acknowledge after receiving each byte, otherwise, the SDA Line will remain at the High level
in period of the ninth (9th) clock pulse. In this case, the host controller will generate a STOP sign in order to abort the
transfer mission.

TRANSMISSION WITHOUT ACKNOWLEDGE

If the application does not need to verify the Acknowledge signal that generated by the slave device is right or not, host
controller can just bypass the acknowledge check and transmit next data byte to the slave device. If this approach is
used, there are greater chances of faulty operation as well as decrease in noise immunity.

INTERFACE PROTOCOL
The interface protocol sequence was defined in below section:
• A Start sign.
• A Chip Address of the desire slave device. The W Bit must be “0” (written). The PT2314E will always response an
Acknowledge on the end of each byte.
• A Data Sequence (N-Bytes + Acknowledge)
• A Stop Condition

PT2314E Address

MSB First Byte LSB MSB LSB MSB LSB

START 1 0 0 0 1 0 0 W ACK DATA ACK DATA ACK STOP
Chip Address Data Transmitting (N-Bytes + Acknowledge)
ACK=Acknowledge

PT2314E CHIP ADDRESS

The PT2314E chip address is 88H AND binary table is shown on below.
MSB LSB
1 0 0 0 1 0 0 0

V1.0 6 January 2010

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PT2314E

DATA BYTES
MSB LSB Function
0 0 B2 B1 B0 A2 A1 A0 Master Volume
1 1 0 B1 B0 A2 A1 A0 Speaker ATT L
1 1 1 B1 B0 A2 A1 A0 Speaker ATT R
0 1 0 G1 G0 LD S1 S0 Input Switch and Gain
0 1 1 0 C3 C2 C1 C0 Bass Control
0 1 1 1 C3 C2 C1 C0 Treble Control

DATA RATE
The PT2314E support Standard-Mode (100kbit/s) I2C data rate In all operation condition, in specified condition it also
support Fast-Mode (400kbit/s) I2C data rate, please refer to the follow table:
PT2314E VDD Voltage
MCU Level
4V 5V 6V 7V 8V 9V 10V
2.5V F F x x x x x
3.3V F F F F S S x
5V x F F F F F F
Notes:
1. x=Not allow in this combination; S=Standard Mode Supported; F=Fast Mode Supported.
2. Data rate specification is design guarantee only, not fully tested in every combination.

I2C BUS INITIAL TIME

The PT2314E is controlled by the I2C bus command; each time the supply voltage applied to chip it needs an initial time
to reset all of the internal decoder register, in this period access the I2C bus is prohibited. The initial time is determinate
by capacitance it attached on REF pin (CREF) and Td. For proper operation USER must check the I2C starts timing is fit
this requirement and recommended Td timing shown on next page is 50mS.

V1.0 7 January 2010

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PT2314E

FUNCTION DESCRIPTION
MASTER VOLUME
The table below gives a detailed description of the Master Volume Data Bytes. For example, a volume of -37.5dB is
given by 0 0 0 1 1 1 1 0.
MSB LSB Function
0 0 B2 B1 B0 A2 A1 A0 1.25dB step
0 0 0 0
0 0 1 -1.25
0 1 0 -2.5
0 1 1 -3.75
1 0 0 -5
1 0 1 -6.25
1 1 0 -7.5
1 1 1 -8.75
0 0 B2 B1 B0 A2 A1 A0 10dB step
0 0 0 0
0 0 1 -10
0 1 0 -20
0 1 1 -30
1 0 0 -40
1 0 1 -50
1 1 0 -60
1 1 1 -70

SPEAKER ATTENUATORS
The speaker attenuator in most audio system is as channel balance function, the table below gives a detailed description
of the speaker attenuators data bytes. Total control range of the speaker attenuator is from 0dB to -37.5dB.

Example 1, an attenuation gain of -6.25dB on the Speaker Right channel is combined 0dB and -6.25dB, therefore it
should given by : 1 1 1 0 0 1 0 1.

Example 2, an attenuation gain of -32.5dB on the Speaker Left channel is combined -30dB and -2.5dB, therefore it
should given by : 1 1 0 1 1 0 1 0.
MSB LSB Function
1 1 0 B1 B0 A2 A1 A0 Speaker L
1 1 1 B1 B0 A2 A1 A0 Speaker R
0 0 0 0
0 0 1 -1.25
0 1 0 -2.5
0 1 1 -3.75
1 0 0 -5
1 0 1 -6.25
1 1 0 -7.5
1 1 1 -8.75
0 0 0
0 1 -10
1 0 -20
1 1 -30
1 1 1 1 1 Mute

V1.0 8 January 2010

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PT2314E

INPUT SELECTOR
The PT2314E provides 4 stereo input selector and following table shows the definition of the correspond register. The
LD register is determinate the loudness function is ON or OFF, and G0 and G1 determinate the input gain of the selector
output, this function is use to matching level of different sources to avoid overall volume difference.
MSB LSB Function
0 1 0 G1 G0 LD S1 S0 Audio switch
0 0 Stereo 1
0 1 Stereo 2
1 0 Stereo 3
1 1 Stereo 4
0 Loudness ON
1 Loudness OFF
0 0 +11.25 dB
0 1 +7.5 dB
1 0 +3.75dB
1 1 0 dB

BASS AND TREBLE DATA BYTES

The following table shows a detailed description of the Bass and Treble Data Byte. For example a Treble at -12dB is
given by: 0 1 1 1 0 0 0 1 (0x71).
MSB LSB Function
0 1 1 0 C3 C2 C1 C0 Bass
0 1 1 1 C3 C2 C1 C0 Treble
0 0 0 0 -14 dB
0 0 0 1 -12 dB
0 0 1 0 -10 dB
0 0 1 1 -8 dB
0 1 0 0 -6 dB
0 1 0 1 -4 dB
0 1 1 0 -2 dB
0 1 1 1 0 dB
1 1 1 1 0 dB
1 1 1 0 +2 dB
1 1 0 1 +4 dB
1 1 0 0 +6 dB
1 0 1 1 +8 dB
1 0 1 0 +10 dB
1 0 0 1 +12 dB
1 0 0 0 +14 dB

V1.0 9 January 2010

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PT2314E

TUNNING TONE CURVE CHARACTERISTCS

The tone control response character is possible tuned to match user’s wishes, please refer to following chart to realize
the characteristics between the different component values.

For the reasons to achieve low distortion and precision response gain, using high quality low tolerance X7R SMD
capacitor on tone circuit is recommended.

The loudness boost gain is adaptive with the master volume attenuation setting, more attenuation means more low
frequency boost, in the maximum volume the loudness boost will return to flat response.

+16 +16

+14 +14
68nF +12 2.7nF
+12
+10
+10
100nF 1.5nF
d +8
d +8
B B +6
+6 150nF g 1nF
g +4
+4
A +2
A +2
+0
+0
-2
-2
-4
-4
-6
-6 10 20 50 100 200 500 1k 2k 5k 10k 20k 50k
10 20 50 100 200 500 1k 2k 5k 20k
Hz
Hz
PT2314E Bass Response VS CAP PT2314E Treble Response VS CAP

-10

-15
+0
56nF
-20 -10

-20
-25 100nF
d d
-30
-30 B
B
g
V 220nF -40
-35 A -50

-40 -60

-70
-45
OPEN
-80
-50 20 50 100 200 500 1k 2k 5k 10k 20k
10 20 50 100 200 500 1k 2k 5k 20k Hz
Hz

PT2314E Loudness Response VS CAP PT2314E Loudness Response VS Master Volume

(Volume=-40dB)

V1.0 10 January 2010

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PT2314E

ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Min. Max. Unit
Operating supply voltage VDD - 10 V
Input latch up current Iin -100 +100 mA
Human body model HBM -2 +2 KV
ESD grade
Machine model MM -0.2 +0.2 KV
Input voltage Vin -0.3 VDD+0.3 V
Operating temperature Topr -40 +85 ℃
Storage temperature Tstg -65 +150 ℃

QUICK REFERENCE DATA

Parameter Symbol Min. Typ. Max. Unit
Supply voltage VDD 4 9 10 V
Max. input signal handling VCL 2.3 2.6 - Vrms
Total harmonic distortion (1Vrms,1KHz) THD - 0.03 0.07 %
Signal to noise ratio S/N - 100 - dBV
Channel separation (f=1KHz) Sc - 100 - dB
Volume control 1.25dB step - -78.75 - 0 dB
Bass & treble control 2dB step - -14 - +14 dB
Balance control 1.25dB step - -37.5 - 0 dB
Input gain 3.75dB step - 0 - 11.25 dB
Mute attenuation - - 100 - dB

V1.0 11 January 2010

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PT2314E

ELECTRICAL CHARACTERISTICS
Unless otherwise specified: Ta=25℃, VDD=9V, RL=10KΩ, Rg=20Ω, all controls flat, F=1KHz, and all of peripheral
components according to standard application circuit.
Parameter Symbol Test Condition Min. Typ. Max. Unit
Power Supply
Supply voltage VDD - 5 9 10 V
VDD=9V - 30 40
Supply current Is mA
VDD=5V - 25 32
Input Selectors
Input resistance RIN Input 1, 2, 3, 4 35 50 70 KΩ
Max. input level Vimax All Gain=0dB; THD=1% 2.3 2.6 - Vrms
Input separation ISIN F=20~20KHz 90 100 - dB
Min. input gain GINmin - -1 0 1 dB
Max. input gain GINmax - 10.5 11.25 12 dB
Step resolution GINst - - 3.75 - dB
Gain set error EA - -1 0 1 dB
Minimum load RL Vo=2Vrms, LOUT, ROUT 5 - - KΩ
DC offset VDCO 0dB to +11.25dB 3 10 mV
Volume Control
Input resistance RIN VOL=0dB 13 20 27 KΩ
Min. attenuation AVMIN - -1 0 1 dB
Max. attenuation AVMAX - -75 -78.75 -82 dB
Step resolution ASTEP - 1.15 1.25 1.3 dB
Attenuation set error EA VOL=0~-70dB -1 0 1 dB
Speaker Attenuators
Max. gain AVMIN - -1 0 +1 dB
Max. attenuation AVMAX - -36 -37.5 -39 dB
Step resolution SSTEP - 1.15 1.25 1.35 dB
Attenuation set error EA - -1 0 1 dB
Output mute attenuation AMUTE - - 100 - dB
DC offset VDCO 0dB to MUTE - 5 10 mV
Bass Control
Control range Gb Max. Boost/Cut ±12 ±14 ±16 dB
Step resolution BSTEP - 1.7 2 2.3 dB
Feedback resistance RB - 34 44 58 KΩ
Treble Control
Control range Gt Max. Boost/Cut ±12 ±14 ±16 dB
Step resolution TSTEP - 1.7 2 2.3 dB
Loudness Control
Boost gain GLD Volume=-40dB, F=20Hz 18 20 22 dB
Audio Outputs
Max. output level VOMAX THD=1% 2.3 2.6 - Vrms
DC voltage level VOUT - 0.49 0.5 0.51 VDD
Minimum load RL - 5 - - KΩ
General
All Gain=0dB, A-weighted - 100 -
Signal to noise ratio SNR dBV
All Gains=0dB, Muted - 100 -
All Gain=0, Vin=1Vrms - 0.03 0.07
Distortion THD %
All Gain=0, Vin=100Vrms - 0.01 0.03
Channel separation Cs L to R or R to L channel 90 100 - dB
I2C crosstalk Ct I2C to audio output - 90 - dB
Ripple rejection PSRR CREF=22µF, F=100Hz - 75 - dB
I2C Bus
Input low voltage VIL VDD=9V - - 1 V
Input high voltage VIH VDD=9V 3 - - V
Input current IIN - -5 - +5 µA
SDA pull down voltage Vack Rpull up=3K, ACK=Active - 0.4 - V

V1.0 12 January 2010

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PT2314E

+16 +16

+12 +12

+8 +8

d +4 d +4
B B
g +0 g +0

A -4 A -4

-8 -8

-12 -12

-16 -16
20 50 100 200 500 1k 2k 5k 10k 30k 20 50 100 200 500 1k 2k 5k 10k 30k
Hz Hz
Bass Response Treble Response
-70 -20

-80
-40
-90 Cref=22µF
d
B -60
d -100
B r
-80
-110 A

-120 -100

-130 -120
20 50 100 200 500 1k 2k 5k 10k 30k 20 50 100 200 500 1k 2k 5k 20k
Hz
Hz
2 Channel Crosstalk PSRR
20
-50
10 4V
5 5V
8V
-60
2 9V
1 10V -70
(RL=10KΩ) d L1 to L2
0.5
B -80
% 0.2
V
0.1 -90
0.05

0.02
-100
0.01
-110
20 50 100 200 500 1k 2k 5k 20k
0.003
1m 2m 5m 10m 20m 50m 200m 500m 1 2 4 Hz
V
Output THD VS VDD Voltage Input Selector Separation

V1.0 13 January 2010

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PT2314E

45
4.5
Maximum output voltage (V)

O peration C urrent (m A )
4 40
3.5 35
3
2.5 30
2 25
1.5
20
1
0.5 15
0 10
3 4 5 6 7 8 9 10 11 12
3 4 5 6 7 8 9 10 11 12
Supply Voltage (V)
Supply Voltage (V)
Maximum Output Level (RL=100KΩ) Supply Current VS VDD
Maximum output voltage 16
3.5
14
3 80KHz LPF
Output Noise (uV)
Output voltage (V)

12
2.5
20-20KHz
2 10
1.5 8 A-weighted
1
6
0.5
0 4
1 10 100 3 4 5 6 7 8 9 10 11 12
Load (Kohm) Supply Voltage (V)
Maximum Output Level VS RLOAD Residual Noise

0 0
-10
-10
-20
Measurement (dB)

Measurement (dB)

-20 -30
-30 -40
-50
-40 -60
-50 -70
-80
-60
-90
-70 -100
-110
-80
0 -10 -20 -30 -40
0 -10 -20 -30 -40 -50 -60 -70 -80
Speaker attenuate level (dB)
Volume attenuate level (dB)
Volume Attenuation Speaker Attenuation

V1.0 14 January 2010

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PT2314E

PACKAGE INFORMATION
28-PIN, SOP, 300MIL

Symbol Min. Nom. Max.

A - - 2.65
A1 0.10 - 0.30
b 0.31 - 0.51
c 0.20 - 0.33
D 17.90 BSC
E 10.30 BSC
E1 7.50 BSC
e 1.27 BSC
L 0.38 - 1.27
θ 0° - 8°
Notes:
1. Refer to JEDEC MS-013 AE
2. All dimensions are in millimeter.

V1.0 15 January 2010