Ex - Press 4 Is So Easy
Ex - Press 4 Is So Easy
Operating Instructions
EX_PRESS 4 is so easy!
A programming course for the PLC language
Structured Text according to IEC 61131-3
This short programming guide provides a quick and easy entry to the
programming of the ZANDER controllers EX16 and SPEEDY with the help of
many practical and easy comprehensible examples. It teaches the essential
knowledge of the PLC programming language „Structured Text“.
Further information provides the online help of the programming software
EX_PRESS 4.
© 1999, 2012, 2017 by H. ZANDER GmbH & Co. KG, Am Gut Wolf 15, 52070 Aachen
No part of this manual may be copied, in any way, without written approval from ZANDER GmbH
& Co. KG. The contents has been drawn up with the greatest possible care, but no guarantee
can be assumed of it being free from mistakes or for damages which arise from the use of this
documentation.
Issue: J2
English Translation.
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EX_PRESS 4 is so easy
Content
1. Installation ...................................................................................4
2. Program Structure .......................................................................4
3. The first Program with EX_PRESS 4..........................................6
3.1 Select PLC-Type.........................................................................10
3.2 Compilation and Fitting ............................................................10
3.3 Download the Program into the PLC .......................................12
4. Logical Operators NOT, AND, OR, XOR ...................................14
5. Self-retaining ................................................................................15
6. Register ........................................................................................16
7. Timer ............................................................................................17
8. Internal Variables .........................................................................19
9. IF Instruction ................................................................................20
10. Arrays .........................................................................................21
11. Relational Operators..................................................................21
12. CASE Instruction .......................................................................22
13. Online Help, Sample Programs ................................................23
Annex 1. Commands and Keywords of the EX_PRESS 4 ...........24
Annex 2. Program Capacity of the CPLD .....................................25
Annex 3. FAQ ..................................................................................26
Annex 4. EX_PRESS 4 Troubleshooting ......................................27
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1. Installation
EX_PRESS 4 is designed for the operating systems Windows XP, 7, 8.1,10
(32 or 64 bit).
For the EX_PRESS installation please connect the USB stick with your
computer. Start the setup program (EX_PRESS_Setup_en2.exe - english
language, EX_PRESS_Setup_de1.exe - german language) with the
Windows Explorer or with the Function „Run“ in the start menu (Task Bar).
Please follow the instructions.
2. Program Structure
Each EX_PRESS 4 program has the following general structure (see Fig. 1):
As a first step open EX_PRESS 4 with the start menu/task bar. You see an
empty text editor, in which you can realize your first program. Open the editor
by using the menu “File“, „New“ (see Fig. 2).
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0
Start Motor
1
A1
Stop Alarm
STOP E1 A2
E2
Fault
Störmelde- E3
indication
einrichtung A3
Comments Section
This program part is optional, but highly recommended. Here you have the
possibility to describe the function, document the version, document the date
of preparation or any other hints are possible.
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Program Name
Next step is to give the program a name. This is carried out with the
command "PROGRAM". This is also the sign for the compiler that the
comment section is finished and the „real“ source code starts. After a blank
space you can choose your individual program name (maximum of 12
characters).
IDENTITY CARD
VAR_INPUT
NAME: Start
Start AT E1;
Stop AT E2; ADDRESS: E1
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VAR_OUTPUT
Motor AT A1;
Alarm AT A2;
A3 AT A3;
END_VAR;
Statement Part
Regarding the first program. After all input and output variables have been
declared the next step is the statement part of the program. In this part, the
functions of the PLC will be realized. A logical state has to be assigned to
each output variable. This is carried out by the following equation:
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The first EX_PRESS 4 program is finished. Last step is the command that
the program is finished.
END_PROGRAM;
For the next steps, your program has to be saved on a harddisk. Press the
menu item “File“ (Fig. 5) followed by “Save“. You will see a new window in
which you can choose the program name. Our choice is “Example.s16“.
By pressing the menu „File“ followed by „Open ...“ you will find further
application examples in Structured Text, which are sorted according to the
Zander PLC types (EX16 / SPEEDY ZX4T, ZX4TE, ZX8T). The programs
counter, conveyer, etc. are stored in the installation path.
The default installation path is:
C:\Zander\EX_PRESS4e\ExamplesEX_PRESS.
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These two steps are carried out by choosing „Compile“ in the menu bar and
after that “Compile and Fit“ (see Fig. 7).
After the successful operation, the newly opened "LOG"-window shows the
message „Compiler finished, Error: 0, Warnings 0. Fitter successfull“.
If the compiler detects any errors (see Fig. 8), detailed information about the
errors can be found in the menu “View“ and „Error Messages“ (see Fig. 9).
Typically after the first „Error“ EX_PRESS will detect some subsequent
errors.
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The user should correct the first error in the list. After that the whole program
should be compiled and fitted again.
In the menu “ Options“ the “Interface configuration“ can be selected (Fig. 10).
Please check the Log Window if the USB cable has been detected. This
might take a few seconds (see Fig. 11).
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NOT
1 E1 A1
E1 A1
0 1 A1 := NOT E1;
1 0
AND
E1 E2 A1
0 0 0
&
E1 A1 0 1 0 A1 := E1 AND E2
E2 1 0 0
1 1 1
OR
E1 E2 A1
>1
E1 A1
0 0 0 A1 := E1 OR E2;
E2 0 1 1
1 0 1
1 1 1
XOR
E1 E2 A1
=1
E1 A1
0 0 0 A1 := E1 XOR E2;
E2 0 1 1
1 0 1
1 1 0
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&
E1
1 >1
E2
& >1
E3 A1
E4
1
E5
5. Self-retaining
In the example program a motor was switched on by activating the input
„Start“. As soon as the signal is no longer present, the motor switches off. It
would be more convenient to switch on the motor by pressing a button
„Start“, and to switch it off by pressing a button „Stop“. To achieve this, the
following changes are necessary in the example program:
The input variable POR (=Power-On-Reset) is added to the declaration:
VAR_INPUT
...
POR AT POR;
END_VAR;
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This is required to assure that the output „Motor“ does not inadvertently goes
into self-retaining, because the signal level is briefly undefined during the
power-on.
For obtaining the self-retaining, the assignment for „Motor“ has to be
extended with the following program line:
Motor := Start AND NOT Stop AND NOT Alarm
OR Motor AND NOT Stop AND NOT Alarm AND NOT POR;
If the start button is switched on, the part before the OR is true, so the motor
switches on. As soon as this happens, the part behind the OR will become
true too, so that the motor continues to run, even if the start button is
released. Only pressing the Stop button or the activation of the output
„Alarm“ cause the part behind the OR to become logically 0 and the motor
switches off. The self-retaining can only be activated by inserting „AND NOT
POR" if the power-on reset signal falls to 0.
6. Register
In addition to the described AND-, OR- and XOR-gates the programmable
logic module of the EX16 or SPEEDY has additional registers, which can
store logical conditions. This function is easily recognized in the following
diagram (Fig. 15):
Clock
Takt
E A
E
Clock
Takt
Reset
Reset A
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The logic value at the input of the register is then stored at the output at any
positive edge (transition from 0 to 1) of the clock signal. If required, registers
can be reset asynchronously by a signal connected to the reset input.
Asynchronously means that the reset to 0 is spontaneously done without any
edge at the clock signal.
The following example generates exactly the output signal which is shown in
the diagramm:
VAR_INPUT
E AT E1;
Clock AT T1;
Reset AT E2;
END_VAR;
VAR_OUTPUT
A AT A1;
END_VAR;
7. Timer
In the program "Register" the timer T1 was used as a clock generator.
Unless otherwise specified, the time laps begin when the operating voltage is
applied, however there is also the possibility to start and stop it by the
program: Via the reset inputs (see picture) the timer can be started (Low) or
stopped (High).
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For the EX16 the DIL-switches are used for selection of the time ranges
whereas for the SPEEDY the time ranges can be changed by reserved
outputs of the logic module (see schematic below - Fig. 16).
ProgrammableLogikbaustein
Programmierbarer Logic Module Programmable
ProgrammierbarerLogic Module
Logikbaustein
Reset
Reset
Reset
Reset
Reset
Out
Out
Out
Out
Out
Out
T1.3 T1 T2.3 T2 T3.3 T3 T4.3 T4 T1 T2
Zeit-
Time Zeit- Zeit-
Time Zeit- Zeit- Zeit-
Time
Time Time Time
bereich
Range bereich bereich
Range
bereich bereich bereich
Range
Range Range Range
T1.4 T2.4 T3.4 T4.4
A chart of the time ranges and the associated switch position or conditions of
the reserved outputs are shown in the online help under the heading of
„Timer“.
This means that the function „on-delayed output“ will be added to the
program „Register“ as follows. Output A switches on after a defined time T1.
The following example was written for the PLC SPEEDY, for EX16 see the
inserted comments.
PROGRAM Register
VAR_INPUT
E AT E1;
Clock AT T1;
Reset AT E2;
END_VAR;
VAR_OUTPUT
A AT A1;
T1Reset AT T1R;
(* EX16: T1Reset AT A13; *)
T1A AT T1A; (* time range, not for EX16 *)
T1B AT T1B; (* time range, not for EX16 *)
END_VAR;
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8. Internal Variables
The programmable logic modules of the PLC´s EX16 and SPEEDY have 44
1-bit registers, which are not connected to any input or output. This can be
used to buffer logical status signals, e.g. if a short pulse is present at an
input.
Internal variables are defined in the declaration part "VAR_INTERN" and
contain just a name, not a location. They behave like output variables, so
they can be defined asynchronously (output of a logical gate) or with
the .CLK-extension as a register.
In the above shown example an internal variable can be used to bridge the
gap between applying the input signal „E“ and the output „A“ switches, so
that only a short impulse at the input „E“ is necessary. Since a self-retaining
should be programmed the input variable „POR“ (Power-On-Reset) must be
defined.
VAR_INPUT
...
POR AT POR;
END_VAR;
VAR_INTERN
M;
END_VAR;
M := E (* switch-on condition *)
OR M AND NOT A AND NOT POR; (* self-retaining with
Switch-off condition *)
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T1Reset := NOT M;
9. IF Instruction
The program language "Structured Text" features some program constructs
which provides a good program oversight and makes it easier to read the
program.
One of them ist the IF instruction which separates visually logical conditions
and instructions and which has a greater functionality than the before
introduced logical equations. The form of the IF instruction is as follows:
IF ( <condition> ) THEN
<assignment(s);>
ELSIF ( <condition> ) THEN
<assignment(s);>
ELSE
<assignment(s);>
ENDIF;
The assignment "ELSIF" and "ELSE" are opional and therefore not printed in
bold characters.
Example:
PROGRAM IF_Anw
VAR_INPUT
E1 AT E1;
E2 AT E2;
E3 AT E3;
E4 AT E4;
END_VAR;
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VAR_OUTPUT
A1 AT A1;
A2 AT A2;
A3 AT A3;
A4 AT A4;
A5 AT A5;
A6 AT A6;
END_VAR;
END_PROGRAM;
10. Arrays
EX_PRESS 4 offers the possibility to combine several 1-bit variables into one
multi-bit (max. 8 Bit). This is done in the declaration part by:
VAR_ARRAY
<NAME> [<Var1>, <Var2, ... ];
END_VAR;
<Var1>, <Var2> etc. must be previously declared as variables. <VAR1> is
the most significant bit.
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CASE <Variable> of
<Value1>: <assignment(s)>;
<Value2>: <assignment(s)>;
...
ELSE
<assignment(s);>
END_CASE;
PROGRAM CASE_Anw
VAR_INPUT
E1 AT E1;
E2 AT E2;
END_VAR;
VAR_OUTPUT
A1 AT A1;
A2 AT A2;
A3 AT A3;
A4 AT A4;
A5 AT A5;
A6 AT A6;
END_VAR;
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1: A3 := 1;
A4 := 1;
2: A2 := 1;
A5 := 1;
3: A6 := 1;
END_CASE;
END_PROGRAM;
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AND, & ___________Logical AND operation _______________ Allocation and logical operators
CASE...OF... _______Multiple branching, -case distinction _____ Program constructs
ELSE_____________Alternative for CASE or IF_____________ Program constructs
ELSIF...THEN______Alternative condition for IF ____________ Program constructs
ENDIF ____________End of IF-query _____________________ Program constructs
END_CASE _______End of CASE-branching ______________ Program constructs
END_PROGRAM ___End of programm source code _________ General Structured Text
END_VAR_________End of variable declaration ____________ Variables– and name conventions
IF...THEN...________Branching, case distinction ____________ Program constructs
NOT, -____________Logical negation ____________________ Allocations and logical operators
OR ______________Logical OR-combination ______________ Allocations and logical operators
PROGRAM ________Start of the programm source code______ General Structured Text
VAR_ARRAY ______Declaration of multibit-variables ________ Variables– and name conventions
VAR_INPUT...AT...__Declaration of input variables __________ Variables– and name conventions
VAR_INTERN______Declaration of registers and flags _______ Variables– and name conventions
VAR_OUTPUT...AT... Declaration of output variables _________ Variables– and name conventions
XOR _____________Logical anticoincidence-linking _________ Allocations and logical operators
.CLK _____________Definition of a register variable _________ Properties of variables
.CRIT ____________Definition of a time sensitive Signal _____ Properties of variables
.OE ______________Deactivating of a output variable________ Properties of variables
.RE ______________Reset input for register variable ________ Properties of variables
:=________________Assignment operator_________________ Allocations and logical operators
= ________________Relational operator: equal _____________ Allocations and logical operators
<> _______________Relational operator: different___________ Allocations and logical operators
< ________________Relational operator: less than __________ Allocations and logical operators
<= _______________Relational operator: less than or equal ___ Allocations and logical operators
> ________________Relational operator: more than _________ Allocations and logical operators
>= _______________Relational operator: more than or equal __ Allocations and logical operators
(...) ______________Change of evaluation priorisation _______ Allocations and logical operators
(*...*) _____________Comment__________________________ General Structured Text
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Within the CPLD 300 OR and 5000 AND gates are available. Each signal
can individually be inverted. These variables are arranged as logic blocks in
and can be connected by a connection matrix.
Practice shows that the limiting factor of the program capacity is not the
amount of available logic modules but the amount of inputs and outputs per
logic block. The fitter software takes care of the assignment of the logic
function to the logic modules as well as the wiring of the modules
to each other or the inputs and outputs and optimises as far as possible.
To estimate the required resources within the CPLD for a particular program
it is noted that besides the directly programmed logic and registry functions
additonal logic might be required as linking help; so there will be some
“ glue logic - waste “. Thereby: The more complex the equations are, the
higher the waste; 20% can be assumed as an average value.
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