8251A Status Word:

In the data communication systems it is often necessary to examine the “status” of the transmitter and receiver. It
is also necessary for CPU to know if any error has occurred during communication. The Block Diagram of 8251
Microcontroller allow the programmer to read above mentioned information from the status register any time
during the functional operation. Fig. 14.40 shows the format of status register.

Error Definitions:

Parity Error : At the time of transmission of data an even or odd parity bit is inserted in the data stream. At the
receiver end, if parity of the character does not match with the pre-defined parity, parity error occurs.

Overrun Error : In the receiver section received character is stored in the receiver buffer. The CPU is supposed to
read this character before reception of the next character. But if CPU fails in reading the character loaded in the
receiver buffer, the next the received character replaces the previous one and the OVERRRUN Error occurs.

Framing Error : If valid stop bit is not detected at the end each character framing error occurs.

All these errors, when occur, set the corrosponding bits in the status register. These error bits are reset by setting
ER bit in the command instruction.

INTERFACING ANALOG TO DIGITAL DATA CONVERTERS:

converters with
microprocessor.

section. This section

we will only emphasize the interfacing techniques of analog to digital converters with 8255.
 analog to digital converters is treated as an input device by the microprocessor that sends an
initializing signal to the ADC to start the analogy to digital data conversation process. The start of
conversation signal is a pulse of a specific duration.

over. After the

conversion is over, the ADC sends end of conversion EOC signal to inform the microprocessor that the
conversion is over and the result is ready at the output buffer of the ADC. The set asks of issuing an
SOC pulse to ADC, reading EOC signal from the ADC and reading the digital output of the ADC are
carried out by the CPU using 8255 I/O ports.

EOC signal is
called as the conversion delay of the ADC.

hundred
milliseconds in case of slow ADCs.

r conversion of analog signal

to digitals. Successive approximation techniques and dual slope integration techniques are the most popular
techniques used in the integrated ADC chip.

General algorithm for ADC interfacing contains the following steps:

utput.

conversion till
the end of the conversion to get correct results. This may be ensured by as ample and hold circuit which
samples the analog signal and holds it constant for specific time duration. The microprocessor may issue a
hold signal to the sample and hold circuit.

, the digital equivalent of the

analog input calculated by the ADC may not be correct.

ADC 0808/0809:

-bit CMOS, successive approximation

converters. This technique is one of the fast techniques for analog to digital conversion. The conversion
delay is 100µs at a clock frequency of 640 KHz, which is quite low as compared to other converters.
These converters do not need any external zero or full scale adjustments as they are already taken care of by
internal circuits.
 eight different analog
conversion by using address lines - ADD A, ADD B, ADD C, as shown. Using these address inputs,
multichannel data acquisition system can be designed using a single ADC. The CPU may drive these lines
using output port lines in case of multichannel applications. In case of single input applications, these may
be hardwired to select the proper input.

only positive analog input

voltage to their digital equivalent. These chips do not contain any internal sample and hold circuit.

into equivalent digital

quantities, it has to be externally connected at each of the analog inputs.
Example :Interface ADC 0808 with 8086 using 8255 ports. Use Port A of 8255 for transferring digital data output
of ADC to the CPU and Port C for control signals. Assume that an analog input is present at I/P2 of the ADC and a
clock input of suitable frequency is available for ADC. Draw the schematic and write required ALP
INTERFACING DIGITAL TO ANALOG CONVERTERS:

The digital to analog converters convert binary numbers into their analog equivalent voltages. The DAC
find applications in areas like digitally controlled gains, motor speed controls, programmable gain amplifiers,
etc.

DAC0800 8-bit Digital to Analog Converter

-bit DAC manufactured by National Semiconductor.

i.e. from 4.5V to +18V. Usually the supply V+ is 5V or +12V.

-pin can be kept at a minimum of -12V.

AD7523 8BIT MULTIPLYING DAC

between -10V to +10V.

The maximum analog output voltage will be +10V, when all the digital inputs are at logic high state.
Usually a Zener is connected between OUT1 and OUT2 to save the DAC from negative transients.
 t to voltage converter at the output of AD 7523 to convert
the current output of AD7523 to a proportional output voltage.

resistor acts to
control the gain. One may not connect any external feedback resistor, if no gain control is required.
STEPPER MOTOR INTERFACING:

shafts. It employs
rotation of its shaft in terms of steps, rather than continuous rotation as in case of AC or DC motors.
To rotate the shaft of the stepper motor, a sequence of pulses is needed to be applied to the windings of
the stepper motor, in a proper sequence.

motor is equal to
its number of internal teeth on its rotor. The stator teeth and the rotor teeth lock with each other to fix a
position of the shaft.

angle x. The angle

x may be calculated as:

X=3600/no. of rotor teeth

of the shaft through angel x, the rotor

locks itself with the next tooth in the sequence on the internal
surface of stator.

four windings is shown in fig.1.

r motors have been designed to work with

digital circuits. Binary level pulses of 0-5V are required at its
winding inputs to obtain the rotation of shafts. The sequence
of the pulses can be decided, depending upon the required
motion of the shaft.

Fig.2 shows a typical winding arrangement of the stepper motor.

six teeth rotor.

 A simple schematic for rotating the shaft of a stepper motor is called a wave scheme. In this
scheme, the windings Wa, Wb, Wc and Wd are applied with the required voltages pulses, in a cyclic
fashion. By reversing the sequence of excitation, the direction of rotation of the stepper motor shaft may be
reversed.

Another popular
scheme for rotation of a stepper motor shaft applies pulses to two successive windings at a time but
these are shifted only by one position at a time. This scheme for rotation of stepper motor shaft is shown in
table2.
EXAMPLE : Design a stepper motor controller and write an ALP to rotate shaft of a 4 phase stepper motor in
clockwise 5 rotation and in anticlockwise 5 rotation