Designing Compensators for the Control of

Switching Power Supplies

Presented by Christophe Basso

Senior Scientist
IEEE Senior Member

1 • Chris Basso – APEC 2010

Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

2 • Chris Basso – APEC 2010

1
 Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

3 • Chris Basso – APEC 2010

What is a regulated power supply?

Vout is permanently compared to a reference voltage Vref.

The reference voltage Vref is precise and stable over temperature.

The error,ε = Vref − αVout, is amplified and sent to the control input.

The power stage reacts to reduce ε as much as it can.
Power stage - H
Vout

Control
variable d
Error amplifier - G

Rupper
+
-

Vin
α
-

+
Vp

Modulator - GPWM Vref Rlower

4 • Chris Basso – APEC 2010

2
 How to build an oscillator?

How to keep self-sustained oscillations?
The plant

Vin ( s ) + ε
H(s) Vout ( s )
−

G(s)
Vout ( s ) H (s)
=
Vin ( s ) 1+ H (s)G (s) Open-loop gain T(s)

 H (s) 
Vout ( s ) = lim  Vin ( s )
To sustain self-oscillations, as Vin(s)
Vin ( s )→ 0 1 + G ( s ) H ( s ) goes to zero, quotient must go infinite
 
G ( s ) H ( s ) = 1 = 0 dB
1+ G (s) H (s) = 0
Nyquist

∠G ( s ) H ( s ) = −180° −1, j 0

5 • Chris Basso – APEC 2010

Where is the point -1,j0?

In a Bode plot, we deal with both magnitude and argument:
 when |T(s)| crosses the 0-dB axis, this is the "1" point
 when arg T(s) crosses the -180°axis, this is the "-" sign
° dB
180 40.0 T (s) 4.00

2.00
90.0 20.0
−1, j 0
T ( s ) = 0 dB

0 0 0

∠T ( s )
ℑm T ( s )
-90.0 -20.0 -2.00
ω→∞

ℜe T ( s )
-180 -40.0 -4.00
∠T ( s ) = −180°
10 100 1k 10k 100k 1Meg 10Meg -4.00 -2.00 0 2.00 4.00

In a Nyquist plot, we deal with the argument and real part of T(s)
 the point -1,j0 represents the 0-dB gain and the sign reversal

6 • Chris Basso – APEC 2010

3
If you fear oscillations, build phase margin!

The frequency at which |T(s)| = 0 dB is the crossover frequency, fc

The distance between arg T(fc) and the -180°limit is called:
 the phase margin, noted ϕm

T (s)

fc = 6.5 kHz

0° - 0 dB

∠T ( s )
Gain margin
67 dB
ϕm = 92°
-180°

10 100 1k 10k 100k 1Meg

7 • Chris Basso – APEC 2010

In the literature, Vout must follow Vin

Text books cover loop control theory assuming Vout follows Vin:
 If Vin imposes a ramp, Vout must follow with the least error

The loop is then open to check Vout over Vin

V
Vin ( s ) + ε
H(s) Vout ( s )
error −
Vin(t)
T (s)
Vout(t)
t G(s)

In our converters, Vin is Vref /α and is fixed!

If the loop gain is high enough, we should have: Vout = Vref α

The perturbations are Vin and Iout
 The model must be updated

8 • Chris Basso – APEC 2010

4
How does this translate to our converter?

The loop gain T(s) includes H(s), G(s) and GPWM
In Vin ( s ) GVin ( s )
+ I out ( s ) Z out ( s )
Vref α Vout ( s )
+ ε d(s) -
GPWM H(s) +
− T (s)
= 0 in ac Out
G(s)

T ( s ) = GPWM H ( s ) G ( s )

In the literature, T(s) is considered without the phase reversal
brought by the negative feedback:

∠T ( s ) = −180° brings instability

9 • Chris Basso – APEC 2010

How does this translate to our converter?

In real life, we include the phase reversal!
Out
Vin ( s ) GVin ( s )
+ I out ( s ) Z out ( s )
Vref α Vout ( s )
+ ε d(s) -
GPWM H(s) +
− T (s)
= 0 in ac In
G(s)
A B
VB
T ( s ) = −GPWM H ( s ) G ( s )
20 log10
VA

In the real life, T(s) includes the phase reversal brought by

the negative feedback:

∠T ( s ) = −360° brings instability

10 • Chris Basso – APEC 2010

5
 These plots are identical

all these plots read the same phase margin!
80.0 180 gain 0°: modulo 360°(or modulo 2 π) reading
40.0 90.0 SPICE
0 0
phase ϕm 4
Network
0°
-40.0 -90.0 analyzer
6

-80.0 -180

80.0 360 -180°: power stage H(s), comp. G(s)

40.0 270 gain
Literature
0 0
-40.0 -90
-80.0 -180
phase
-180° ϕm 6
4

80.0 360 -360°: power stage H(s),comp. G(s) and op amp inversion -360° is a
40.0 180 gain complete
0 0 turn!
-40.0 -180
ϕm
6

-80.0 -360 phase -360° 7

1 10 100 1k 10k 100k

11 • Chris Basso – APEC 2010

Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

12 • Chris Basso – APEC 2010

6
 Hey, where is the divider network?

In some text books, the divider network enters the picture

α(s)
Vout ( s )

Rupper
Vc ( s ) Rlower
=− G (s) Vc ( s ) G (s) -
α(s)
Vout ( s ) Rlower + Rupper +
Vref Rlower

R. Erickson, D. Masksimovic, “Fundamentals of Power Electronics”, Kluwers, 2001

13 • Chris Basso – APEC 2010

The virtual ground excludes Rlower

In reality, the feedback is often made with an op amp
Zf Vout ( s )

Rupper

≈ 0 in ac
Vc ( s )

Rlower No role
in ac!
Vc ( s )
Vref
Z
=− f
Vout ( s ) Rupper

Because of the local feedback via Zf, we have a virtual ground

14 • Chris Basso – APEC 2010

7
 Looks like the divider in back…

In a type 1, 2 or 3, the local feedback is lost for s = 0
Vout ( s )

Rupper

≠ 0 in dc
Vc ( s ) Av
Rlower
Vref
Vc ( 0 ) Rlower
=− Av
Vout ( 0 ) Rlower + Rupper

The 0-Hz gain is indeed changed but not fc!

15 • Chris Basso – APEC 2010

Looks like the divider in back…

With an op amp, only the dc gain is affected

6 dB Vc ( 0 ) Rlower
α = 0.5
60.0
=− Av
Vout ( 0 ) Rlower + Rupper
α = 0.2
40.0

20.0

Un-changed!
0

Av = 60 dB
-20.0

1 10 100 1k 10k 100k

16 • Chris Basso – APEC 2010

8
You don’t have a virtual ground in an OTA!

Rlower enters the picture in all equations

Vout ( s )
Rupper + Rlower
Requ = gm
gm = 200 µA V Rupper Rlower
Vc ( s )
1
f po =
C1
2π C1 Requ
Vref Rlower

Unless an OTA is used, the divider plays no role in ac!

17 • Chris Basso – APEC 2010

Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

18 • Chris Basso – APEC 2010

9
 How much phase margin to chose?

a Q factor of 0.5 (critical response) implies a ϕm of 76°

a 45° ϕm corresponds to a Q of 1.2: oscillatory response!

10
Q < 0.5 over damping
1.80 Q=5
Q = 0.5 critical damping
Q=1 Q > 0.5 under damping 7.5 Q
1.40
Q = 0.707
Asymptotically stable
1.00 5 ϕm

600m
Q = 0.5 Fast response 2.5 76°
and no overshoot!
200m Q = 0.5
Q = 0.1 0
5.00u 15.0u 25.0u 35.0u 45.0u 0 25 50 75 100

phase margin depends on the needed response: fast, no overshoot…

good practice is to shoot for 60°and make sure ϕm always > 45°

19 • Chris Basso – APEC 2010

Which crossover frequency to select?

crossover frequency selection depends on several factors:
 switching frequency: theoretical limit is Fsw 2
 in practice, stay below 1/5 of Fsw for noise concerns
 output ripple: if ripple pollutes feedback, «tail chasing» can occur.
 crossover frequency rolloff is mandatory, e.g. in PFC circuits
 presence of a Right-Half Plane Zero (RHPZ):
 you cannot cross over beyond 30% of the lowest RHPZ position
 output undershoot specification:
 select crossover frequency based on undershoot specs
∆I out
Vp ≈
Don’t push the crossover 2π f c Cout
frequency too far!!

20 • Chris Basso – APEC 2010

10
 How to force crossover and phase margin?

The converter we want to compensate exhibits a transfer function
 This is the power stage open-loop transfer function noted H(s)

On this plot, a crossover frequency is identified, fc

The designer reads the gain deficiency and the phase rotation at fc
 it can sometimes be a gain excess, in PFC stages for instance

A compensator transfer function G(s) is inserted so that it:
 provides gain/attenuation at the crossover frequency: H ( f c ) G ( f c ) = 1
 boosts the phase at the crossover: arg H ( f c ) + arg G ( f c ) = −360° + ϕ m

T (s)

G(s)
∠T ( s )
H(s) ? 10 100 1k 10k 100k

21 • Chris Basso – APEC 2010

What do we mean by “phase boost”?

Control theory instructs to keep T(s) away from the point -1,j0

At the frequency where |T(s)| = 1, arg T(s) should be less than -360°

To generate phase margin, we need to improve arg T(s) at crossover

The compensator G is tailored to provide phase correction at fc

The amount of needed phase correction is called the phase boost

G (s) G (s)
60.0 40.0

40.0 30.0

20.0 20.0

G ( f c ) = 20 dB G ( f c ) = 20 dB
0 10.0

-20.0 0
10 100 1k 10k 100k 10 100 1k 10k 100k

170 Type 1 170 153° Type 2

130 130

90.0 90.0

∠G ( s ) ∠G ( s )
50.0 50.0

10.0 boost = 0° 10.0 boost = 153 − 90 = 63°

10 100 1k 10k 100k 10 100 1k 10k 100k

22 • Chris Basso – APEC 2010

11
 How to force crossover and phase margin?

Here, we want a 4-kHz crossover point and a 60°phase m argin

Build G(s) so that |G(4kHz)| = +21 dB and arg G(4kHz) = -125°

arg H ( f c ) + arg G ( f c ) = −360° + ϕ m

arg G ( f c ) = −360° + ϕ m − arg H ( f c )
arg G ( f c ) = −125°
Push the
gain up. 0 dB@fc
arg T ( f c ) = −175 − 125 = −300°
Gain

0 dB, 0°
Phase Tailor G(s) to
exhibit a gain ϕm = 60°
|H(s)|= -21 dB of +21 dB@ fc.
Arg H(s)= -175°

10 100 1k 10k 100k

4 kHz

23 • Chris Basso – APEC 2010

Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

24 • Chris Basso – APEC 2010

12
 Poles, zeros and RHPZ

A loop gain can be put under the following form:
N (s)
H (s) =
numerator

D (s) denominator

solving for N(s) = 0, the roots are called the zeros

solving for D(s) = 0, the roots are called the poles

5k
Numerator roots
f z1 = = 796 Hz
sz1 = −5k 2π
H (s) =
( s + 5k )( s + 30k ) sz2 = −30k f z2 =
30k
= 4.77 kHz
s + 1k 2π
s p1 = −1k 1k
f p1 = = 159 Hz
Denominator root 2π

25 • Chris Basso – APEC 2010

The pole

A pole creates a phase lag of -45°at its cutoff frequency
Vin Vout 0

R2 20.0 Cutoff
1k frequency
- 3 dB
0

-20.0
V1 C1
AC = 1 10nF -40.0 -1 slope
-20 dB decade 1
-60.0

0
Vout ( s ) 1
=
Vin ( s ) 1 + sRC
-20.0
-45° at
-40.0 cutoff

We can write the equation -60.0

in different forms: -80.0

10 100 1k 10k 100k 1Meg 10Meg

Vout ( s ) 1 1
= = where ω0 = s p1 =
1
Vin ( s ) 1 + s 1 + s RC
ω0 s p1

26 • Chris Basso – APEC 2010

13
 The Pole

Its magnitude at the cutoff frequency is -3 dB

Its asymptotic phase, when in the LHP, at f = ∞ is -90°

The pole "lags" the phase

Vout ( s ) 1 1
= =
Vin ( s ) 1 + sRC 1 + s
ω0
Vout ( s p1 ) 1 1
20 log10 = 20 log10 = 20 log10 = −3 dB At f = fp1
Vin ( s p1 ) s p1 2
1+
s p1

Vout ( s p1 )  sp  π
arg = arg (1) − arg 1 + 1  = − arctan (1) = − At f = fp1
Vin ( s p1 )  sp  4
 1 

Vout (∞)  ∞  π
arg = arg (1) − arg 1 +  = − arctan ( ∞ ) = − At f = ∞
Vin (∞)  sp  2
 1 

27 • Chris Basso – APEC 2010

The Zero

A zero boosts the phase by +45°at its cutoff frequency
0 0

40.0 20.0
+1 slope
30.0 20 dB decade 0

20.0 -20.0
Cutoff
10.0 -40.0 frequency
+1 slope -3 dB
0
Cutoff -60.0 20 dB decade
frequency
10 100 1k 10k 100k 1Meg 10Meg
90.0
90.0
70.0
70.0
50.0 + 45° at 50.0 45° at
cutoff cutoff
30.0 30.0
10.0 10.0
10 100 1k 10k 100k 10 100 1k 10k 100k 1Meg 10Meg

The general form of a zero: Vin Vout

C1 s
10nF
s ω0
G( s) = 1 + Vout ( s)
=
sRC
=
ω0 V1 R2 Vin ( s ) 1 + sRC 1 + s
AC = 1 1k
ω0
1
ω0 =
RC

28 • Chris Basso – APEC 2010

14
 The zero

Its magnitude at the cuttoff frequency is +3 dB

Its asymptotic phase, when in LHP, at f = ∞ is +90°

The zero "boosts" the phase

Vout ( s ) s
= 1+
Vin ( s ) ω0

Vout ( sz1 ) s z1
20 log10 = 20 log10 1 + = 20 log10 2 = +3 dB At f = fz1
Vin ( s z1 ) s z1

Vout ( s p1 )  sz  π
arg = arg 1 + 1  = arctan (1) = + At f = fz1
Vin ( s p1 )  sz  4
 1 

Vout (∞)  ∞  π
arg = arg 1 +  = arctan ( ∞ ) = + At f = ∞
Vin (∞)  sp  2
 1 

29 • Chris Basso – APEC 2010

Poles and zeros at the origin

Poles and zeros can sometimes appear "at the origin"
s
Vout ( s ) ω0 As f increases the gain increases
= Zero for s = 0: zero at the origin
Vin ( s ) D ( s )
with a +1 slope (+20 dB/decade)

 s 
Vout ( s ) s  π
arg = arg  zo  = arctan ( ∞ ) = + For f > fzo
Vin ( s )  0  2
 
 
Vout ( s ) N ( s ) As f increases the gain decreases
= Pole for s = 0: pole at the origin
with a -1 slope (-20 dB/decade)
Vin ( s ) s
ω0
 s 
s 
arg
Vout ( s )
= arg (1) − arg 
po
 = − arctan ( ∞ ) = − π For f > fpo
Vin ( s )  0  2
 
 
A pole at the origin introduces a fixed phase lag of -90°

30 • Chris Basso – APEC 2010

15
 Poles and zeros at the origin

The intregration time constant changes the 0-dB crossover frequency

G (s) G (s)
if ω po
dB dB

S = -1
if ω po
S = -1
0 log10 f 0 log10 f
ω po ω po

1 1 s = 0 is the origin pole

G ( s) = =
sRC s ω po ω po =
1
is the 0-dB crossover pole frequency
RC

31 • Chris Basso – APEC 2010

The Right-Half-Plane Zero

In a CCM boost, Iout is delivered during the off time: I out = I d = I L (1 − D )
Id(t) Id(t)
IL0 IL1

Vin Vin
L L

IL(t) Id0 IL(t)

Id1
d̂

t t
D0Tsw D1Tsw
Tsw Tsw

If D brutally increases, D' reduces and Iout drops!
d VL ( t )

What matters is the inductor current slew-rate dt

32 • Chris Basso – APEC 2010

16
 The Right-Half-Plane Zero

If IL(t) can rapidly change, Iout increases when D goes up

200 µs
59%
d(t) Vout(t)

58.3%

IL(t)

Iout(t)

100u 300u 500u 700u 900u

33 • Chris Basso – APEC 2010

The Right-Half-Plane Zero

If IL(t) is limited because of a big L, Iout drops when D increases

2
10 µs
59%
d(t) Vout(t)

58.3% Vout drops!

IL(t)

Iout(t)

Iout drops!
100u 300u 500u 700u 900u

34 • Chris Basso – APEC 2010

17
 The Right-Half-Plane Zero

To limit the effects of the RHPZ, limit the duty ratio slew-rate

Chose a crossover frequency equal to 20-30% of RHPZ position
 A simple RHPZ can be easily simulated:
R1
10k
K1
C1
10n
SUM2
4 Vout(s)
Vin(s)
Vin 3 2 1
K2

X1
SUM2
K1 = 1
K2 = 1
E1
10k

R1  s 
Vout ( s ) = Vin ( s ) − Vin ( s ) = Vin ( s ) 1 − 
1  ω0 
sC1
The neg. sign confirms for
the RHPZ presence

35 • Chris Basso – APEC 2010

The Right-Half-Plane Zero

With a RHPZ we have a boost in gain but a lag in phase!

40.0
|G(s)|
20.0 +1
0
LHPZ
-20.0
s
G( s) = 1 +
-40.0
ω0

180 RHPZ
arg G(s)
90.0

s
G( s) = 1 −
0

-90.0 -90° 2
ω0
-180

1 10 100 1k 10k 100k 1Meg

36 • Chris Basso – APEC 2010

18
 Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

37 • Chris Basso – APEC 2010

Combining poles and zeros

We know that a pole lags the signal phase by -90°

A zero boosts the signal phase by +90°
 if we combine both in G(s), we can control the phase from:
 0°if the pole and the zero are coincident
 +90°if the pole and the zero are split far away from e ach other

up to 180° with S+A

double pole/zero 1 2
Vout
S+B
pair!
V1 X2 parameters
PoleZero
FP = Fp
k is swept from
FO = Fz k=1 1 to 10
Fz=1000
Fp=1000*k

38 • Chris Basso – APEC 2010

19
 Combining poles and zeros

When the pole and zero are coincident (k = 1), no boost

The farther they are, the greater the boost

As the pole/zero split appart, f at which the boost peaks, changes
5
40.0

4
20.0 3 boost
2
0
k=1
°
-20.0
arg G(s)

-40.0

10 100 1k 10k 100k

39 • Chris Basso – APEC 2010

Combining poles and zeros

The equation where a pole and a zero are combined is:
 s 
1 + 
sz  N
G (s) =  = 1

 s  D
1 + 
 sp  1

The argument of a quotient is: arg N – arg D

 f   f 
arg G ( f ) = arctan   − arctan  
 fz   fp 
 1  1

Where does the phase peak (the boost) occur?
  f   f  Max boost
d  arctan   − arctan   
  fz    occurs at:
  1  f p1   f =
=0 f z1 f p1
df

40 • Chris Basso – APEC 2010

20
 Do not forget the op amp

In reality, poles and zeros are combined with an op amp

To reduce the static error, we need a high dc gain
 A pole at the origin is almost always part of G(s) integrator
 An origin pole permanently lags the phase by -90°
 With the op amp, the minimum phase lag is: -90-180 = -270°
°
160
SPICE shows a +90°
140
phase rotation rather than
120 a -270° value. Why?
100
90° Because of the modulo 2π
80.0 Similar
representation:
angles
°
-190
arg G ( f c ) 3π
Same
angle -210 θ =− ± k 2π
-230
2 k =1
Boost −3π + k 4π π
θ=
-250
-270
=
2 2
10 100 1k 10k 100k

41 • Chris Basso – APEC 2010

How to calculate the necessary boost?

We know that arg G(s) lags by -270°for s = 0

The arguments sum of G(fc) and H(fc) must stay away from -360°
 ϕm is the distance between [arg G(fc) + arg H(fc)] and -360°
arg H ( fc ) − 270° + BOOST − ϕm = −360°
BOOST = ϕm − arg H ( f c ) − 90°

Assume a 4-kHz crossover frequency is wanted

arg H(4k) = -68°, how much boost for a 70°phase margin?
BOOST = 70 + 68 − 90 = 48° arg G ( 4k ) = −270 + 48 = −222°

Combining the previous equations, we have:

f p =  tan ( boost ) + tan 2 ( boost ) + 1  fc = 2.6 × 4k = 10.4 kHz

 
fc 2 16k
fz = = ≈ 1.54 kHz
f p 10.4k

42 • Chris Basso – APEC 2010

21
 How to calculate the necessary boost?

The pole has been placed at 10.4 kHz and the zero at 1.5 kHz
-5.00

-25.0 arg H ( f c ) = −68°

-45.0 arg H ( s )
-65.0

-85.0 arg H ( s )
°
arg G ( f c ) = −222° +
arg G ( s )
-220

-230

-240 arg G ( s )
-250 boost = 48°
-260-270°

80.0

40.0
ϕ m = 70°
0

arg T ( s )
-40.0

-80.0
f c = 4 kHz
100 200 500 1k 2k 5k 10k 20k 50k 100k

43 • Chris Basso – APEC 2010

How to crossover at fc then?

We know how to create the boost by placing 1 pole and 1 zero

How do we now create the right gain at crossover?

The final formula for G(s) must include the 0-dB crossover pole:
 s  s  sz1   sz1 
 1 +  1 +  1+ 
sz1  sz1 s  s po  s 
G (s) =  = =
s  s  s  s  sz1  s 
1 +  1 +   1 + 
s po  s p1  s po  s p1   s p1 

The ratio s p sz can be expressed as G0:
o 1

 sz1 
1 +  By adjusting the 0-dB crossover
s 
G ( s ) = G0  pole frequency fpo, you can tailor
 s 
 1 +  the gain at crossover.
 s p1 

44 • Chris Basso – APEC 2010

22
 Shift spo to adjust the crossover gain

The zero is fixed to get the proper phase boost

By adjusting the 0-dB crossover pole position, you adjust the gain at fc
G ( s) G ( s)

Shift fpo
down
fc
fc
G0
G0
log10 f log10 f
fz f po f p fz f po fp

This so-called mid-band gain makes T(s) crossover at fc

Always write compensator transfer function with G0: G ( s ) = G0 A ( s )

45 • Chris Basso – APEC 2010

Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

46 • Chris Basso – APEC 2010

23
 What is a type 1 amplifier?

In some cases, you do not need phase boost at all
 If arg H(s) is smaller than -45°within the band of interest:
arg H ( f c ) − 270° ≤ −315° ϕ m ≥ 45°
 A 45°phase margin is guaranteed

There is an origin pole at s = 0
1 sp ωp f po
G (s) = − =− o G ( jω ) = j o
G( f ) =
s s ω f
 s s po  3π
s po arg G ( s ) = arg ( −1) − arg   = −π − arctan ( ∞ ) = −
 0  2

Select fpo depending on the wanted gain at crossover:
G (1kHz ) = 20 dB G (1kHz ) = 10 G 20
= 101 = 10

f po = 10 f c = 10 kHz

47 • Chris Basso – APEC 2010

What Bode plot for the type 1?

The type 1 does not provide phase boost at all

60.0
G (1kHz ) = +20 dB
30.0

-30.0 f po = 10 kHz
-60.0 G (s)

90.0
arg G ( s )
0

-90.0

arg G ( s ) = −270°
-180

-270

10 100 1k 10k 100k

48 • Chris Basso – APEC 2010

24
 What is a type 2 amplifier?

In the vast majority of cases, phase boost is needed

If the needed phase boost is less than 90°, a type 2 can do the job
 an origin pole plus a zero and a pole:
 s  factor
 sz1 
 1 +  s sz1
1 + 
sz1  s 
G (s) = −  = −G0 
s po
with G0 =
s  s   s  sz1
1 +  1 + 
s po  s p1   s p1 

The magnitude is derived as:
The argument is found to be:
 fz   f 
arg G ( f ) = arctan  −  − π − arctan 
2
 fz   1

1+   1
 f   fp 
 
boost = arctan ( f f z ) − arctan ( f f p )
1
 f 
G ( f ) = G0 1 1
2
 f 
1+ 
The 0-dB crossover pole
 f p 
  frequency is placed at: f po = G0 f z
1
1

49 • Chris Basso – APEC 2010

Where to place the poles and zero?

First, place the pole and zero for the needed phase boost

Then adjust the origin pole 0-dB frequency at the right value
 5-kHz crossover gain deficiency is -18 dB, required boost is +68°

f p1 =  tan ( boost ) + tan 2 ( boost ) + 1  f c = 5.14 × 5k = 25.7 kHz

 
fc2 25k
f z1 = = ≈ 970 Hz
f p1 25.7k

A +18-dB gain is necessary at 5 kHz:

G ( 5kHz ) = 18 dB G ( 5kHz ) = 10 G
single
≈8 |G(s)|
20
pole

-1 25.7 kHz
18 dB
f po = 8 f z1 = 7.8 kHz
0

-1
0 dB
970 Hz
single
zero 7.8 kHz

50 • Chris Basso – APEC 2010

25
 What Bode plot for a type 2?

The type 2 provides phase boost up to +90°

50.0 G ( 5 kHz ) = +20 dB

34.0

18.0

2.00

-14.0
G (s)

170 arg G ( s ) arg G ( s ) = 158°or − 202°

150

130

110
boost = 68°

90 or − 270°
90.0

10 100 1k 10k 100k

51 • Chris Basso – APEC 2010

What is a type 3 amplifier?

Sometimes, a phase boost greater than 90°is needed

By doubling the pole and zero, we can boost up to 180°

 s  s   sz1  s 
1 +  1+
 sz  1 +   1 + 
sz1  s po  s   sz2 
G (s) = −  2 
=−
s  s   s  sz1  s  s 
 1 +   1 +  1 + 

1+ 
s po  s p1   s p2   s p1  s p2 

The magnitude is derived as:
The argument is found to be:

 fz 
2
 f 
2
arg G ( f ) = arg N − arg D
1+  1  1+ 
f po  f   f z   fz   f 
 2 arg N = arctan  − 1  − π + arctan 
G( f ) =  f z 
f z1  f 
2
 f 
2  f   2
1+  1+   f   f 
 f p   
arg D = arctan   + arctan  
 1  f p2   fp   fp 
 1  2
52 • Chris Basso – APEC 2010

26
 Where to place the poles and zeros?

Poles and zeros can be coincident (k factor) or split

Place the double pole and the double zero to get the boost

Then adjust the origin pole 0-dB frequency at the right value
 5-kHz crossover gain deficiency is +10 dB, required boost is +158°

If we consider coincident poles and zeros:
  f   f 
Boost = 2  arctan  p  − arctan  c   f c = 5 kHz = fz f p
  f p 
 fc   
fc 5k f c 2 25k
f p1,2 = = ≈ 52 kHz f z1,2 = = ≈ 480 Hz
 Boost  96.3m f p1,2 52k
tan  45 − 
 4  |G(s)| 52 kHz

A +10-dB gain is necessary at 5 kHz: -1
10 dB
double
pole

G ( 5kHz ) = 10 dB G ( 5kHz ) = 10 G
+1
≈ 3.2
20
-1
0 dB
480 Hz
( )
Gf 2
f po = c f z1,2 ≈ 147 Hz double
zero 147 Hz
fc

53 • Chris Basso – APEC 2010

What Bode plot for a type 3?

The type 3 provides phase boost up to +180°

30.0
G ( 5kHz ) = +10 dB
20.0

10.0

-10.0
G (s)

260 arg G ( s ) arg G ( s ) = 248°or − 112°

220

180
boost = 158°
140
90 or − 270°
100

10 100 1k 10k 100k

54 • Chris Basso – APEC 2010

27
 When to use these compensators?

Type 1 is used where no phase boost is necessary at crossover

If a 45° ϕm is ok, a type 1 can be used where arg H(fc) < 45°:
 Power Factor Correction circuits
 Current mode power supplies in CCM, DCM or CrM (BCM)
 Voltage-mode power supplies in DCM
 Pure integrator, brings output overshoot

Type 2 is targetting applications where a phase boost is necessary

In the above examples where a ϕm larger than 45°is requested
 Most popular choice for current mode converters

Type 3 is selected where a large phase boost is mandatory

This is the case for CCM voltage-mode converters

Generally, 2nd order and beyond types of transfer functions

55 • Chris Basso – APEC 2010

How to implement these compensators?

Operational Amplifier: most documented architecture
 virtual ground arrangement excludes the resistive divider ratio
 high open-loop gain for reduced static error
 best flexibility for poles/zeros arrangement

Transconductance Amplifier: mainly used in PFC circuits

 offers a means to sense the output voltage on the feedback pin
 less flexibility for type 3 arrangement
 transconductance value appears in the poles/zeros equations

TL431: the most popular architecture

 combines an op amp and a reference voltage: cheapest approach
 easy interface with an optocoupler
 low open-loop gain
 biasing requirements hamper its flexibility

56 • Chris Basso – APEC 2010

28
 Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

57 • Chris Basso – APEC 2010

Designing the divider network

The design starts with the divider network ratio

Make sure enough current circulates in the bridge:
 it improves noise immunity
 it shields you against offset current in the op amp
 it degrades the no-load consumption…
Vout Vlower = Vref = ( I bridge − I bias ) Rlower
2.5
Rlower =
I bridge I bridge = (Vout − Vref ) R1
±500 nA NCP1608

V − 2.5 R1 6.5 µA for a TL431

Rupper = out  R 
I bridge Vout = Vref  1 + 1 + R1 I bias
I bias I bridge  Rlower  Watch out
with PFC!
Verr I bridge − I bias If Ibias << Ibridge:

 R 
Rlower Vout ≈ Vref  1 + 1
V ref  Rlower 
If Ibridge = 250 µA  Rlower = 2.5 250u = 10 k Ω

58 • Chris Basso – APEC 2010

29
 Type 1 with an op amp

Type 1 is an inverting integrator providing one pole at the origin
C1 Zf 1
10n
Zf
sC1 1
1 2 G ( s) = = =
Zi Zi R1 sC1 R1
E1
R1 10k
1 1
10k ω po = G (s) = −
4 VVout
err R1C1 s
ω po
V1
AC = 1
ω ω  ω
2

G ( jω ) = j po =  po  = po
ω  ω  ω

If you need a +21-dB gain to crossover at 4 kHz,

where to place the 0-dB crossover pole?

f po = G fc fc = 1021 20 × 4k = 44.8 kHz

Type 1 – op amp

59 • Chris Basso – APEC 2010

Type 1 with an op amp – Bode plot

° dB

G (s)
360 60.0

-1
180 30.0

Adjust fpo to
get G at fc
21 dB
0 0
dB 28
fc fpo = 44.8 kHz

log f
-180 -30.0

-270°
27

-360 -60.0
arg G ( s )
10 100 1k 10k 100k
frequency in hertz 4 kHz
Type 1 – op amp

60 • Chris Basso – APEC 2010

30
 Type 2 with an op amp (full analysis)

Type 2 keeps the origin pole but adds one zero and one extra pole
Zf C2
 1  1  1  1
62pF
 + R2   + R2  +
Zf sC  sC2 sC  sC2
C1 R2 = 1  1
2nF 116k Zi R1
1 2 4
Re-arrange
Zi E1
R1 10k
1 + sR2C1
G ( s) = −
10k
V
Vout

3 err
 C C 
sR1 ( C1 + C2 ) 1 + sR2  1 2  
 C1 + C2  
V1
AC = 1 

R2 C1 1 sR2C1 + 1 1 + sz s Factor sR2C1

G ( s) = − = −G0
R1 C1 + C2   C1C2   1+ s sp
1 + sR2   
 C
 1 + C 2  Type 2 – op amp

61 • Chris Basso – APEC 2010

Type 2 with an op amp (full analysis)

In the gain expression, we have:
R2 C1 1 1
G0 = ωz = ωp =
R1 C1 + C2 R2C1 C1C2
R2
C1 + C2

As ωz, ωp, G0 and R1 are given (boost, Vout etc.) how to get R2?
2
 f 
2
 fc 
1+  z    + 1
 fc  G fc R1 f p  fp 
G ( f c ) = G0 R2 =
 f 
2 f p − fz  fz 
2

1+  c 
 f    +1
 p  fc 

Other component values are then extracted:

1 C1
C1 = C2 =
2π R2 f z 2π f p C1R2 − 1 Type 2 – op amp

62 • Chris Basso – APEC 2010

31
Type 2 with an op amp (simplified analysis)

In most cases, C2 is much smaller than C1. Therefore:

R2 1 sR2C1 + 1 1 + sz s
G ( s) ≈ − = −G0
R1 (1 + sR2C2 ) 1+ s sp

R2 1 1
G0 ≈ ωz = ωp ≈
R1 R2C1 R2C2

2
f 
2
 f 
1+  z   c  + 1
R2  fc   fp 
G ( fc ) = R2 = G fc R1
R1  f 
2
 fz 
2

1+  c 
 f    +1
 p  fc 

Type 2 – op amp

63 • Chris Basso – APEC 2010

Type 2 with an op amp – design example

You need to provide a 15-dB gain at 5 kHz with a 50°boo st

How to calculate the component values?

f p =  tan ( boost ) + tan 2 ( boost ) + 1  fc = 2.74 × 5k = 13.7 kHz

 
2
 fc 
  + 1
fc2 25k G fc R1 f p  fp 
fz = = ≈ 1.8 kHz R2 = = 64.8 k Ω
f p 13.7k f p − fz 2
 fz 
  +1
 fc 
1 C1
C1 = = 1.3 nF C2 = = 206 pF
2π R2 f z 2π f p C1 R2 − 1

You can use the simplified formula in the general case

For PFCs, C2 is not small compared to C1, use full formulas
Type 2 – op amp

64 • Chris Basso – APEC 2010

32
 Type 2 with an op amp – Bode plot
° dB
G (s)
-110 60.0

-150 30.0

dB
fc 15 dB
-190 0

log f
-220°

-230 -30.0

-270° boost = 50°

-270 -60.0
arg G ( s )
10 100 1k 10k 100k
frequency in hertz 5 kHz

Type 2 – op amp

65 • Chris Basso – APEC 2010

Type 2 with an op amp – start-up issue

For low bandwidth systems, capacitor values can be large

For a PFC circuit, crossover can be as low as 20 Hz

For a zero at 10 Hz and a pole at 40 Hz, we have:
C2 R2
56 kΩ Vout
At power up, Vout = 0 and R1 >> Rlower
70 nF

Verr should go to the op amp Vcc
C1 I3
Big caps are in the compensation path
285 nF R1
I1 is limited by R1 and Rlower
I1  op amp output slowly rises
Verr I1 I2  delays the full power delivery
Vref Vref − Vout
I 2 = I1 − I 3 = I3 =
Vref Rlower Rlower R1
Vref Vref − Vout ( t ) Vref
I1 ( t ) = + ≈
Rlower R1 Rlower
Vout = 0, Rupper >> Rlower Type 2 – op amp

66 • Chris Basso – APEC 2010

33
 Type 2 with an op amp – start-up issue

The capacitor charging acts as an inexpensive soft-start

If too small, Vout rises too quickly and an overshoot appears
V
14.0
Full power
10.0

6.00

Verr ( t )
2.00
1.2 ms
-2.00

I1 ( t )
600u
500 µA
500u

400u

300u

200u

200u 600u 1.00m 1.40m 1.80m

Type 2 – op amp

67 • Chris Basso – APEC 2010

Type 2 with op amp – a different arrangement

In the compensator, all the current flows in C2, the smallest value

Why not placing it differently then?
1
Vout Zf sC2
=
Zi  1   1 
C2 R1  + R2  R1  + R2  + R1
R2
 sC1   sC1 

C1 1
+1
( R1 + R2 ) C2 s ( R1 + R2 ) C2
Verr
G ( s) = −
R1C1 1 + sR2C2
Vref Rlower

R1 + R2 C2 1 1 R1ω z
G0 = C2 = C1 = R2 =
R1 C1 ω z ( R1 + R2 ) G0 R1ωz ω p − ωz
Type 2 – op amp

68 • Chris Basso – APEC 2010

34
 Type 2 with op amp – automated calculation
C2
{C2} out
IC = 0
parameters
4.99V
R2
2.50V {R2}
R1=10k I1
2 1 3
R1
C1 2.50V
10k
fc=20 {C1}
IOP IC = 0 2.50V
Gfc=-10 6
2.50V
k=2 7
Vout
2.50V 4.995
AC = 1
G=10^(-Gfc/20) Verr1
4

pi=3.14159 X1 V1
AMPSIMP R3
2.5
A simple macro can be 10k
fp=fc*k
written to calculate all fz=fc/k
the elements around the Wp=fp*2*pi
compensator for both Wz=fz*2*pi C4
{C20}
options. R20=R1*Wz/(Wp-Wz) IC = 0
2.50V 4.99V
C10=1/(Wz*(R1+R20)) 10 9
2.50V
C20=1/(G*R1*Wz) 16
R4
I2
{R20}
R5
a=sqrt((fc^2/fp^2)+1) 10k
b=sqrt((fz^2/fc^2)+1) IV8
11
C3
12
2.50V {C10}
R2=((a/b)*G*R1*fp)/(fp-fz) 14 2.50V B1
Voltage
C2=C1/(C1*R2*2*pi*fp-1)
13
C1=1/(2*pi*R2*fz) Verr2 V(out)
X2 V5
AMPSIMP R6
2.5 10k

Type 2 – op amp

69 • Chris Basso – APEC 2010

Type 2, Bode plot for both solutions

Both curves perfectly superimpose on each other
° dB
G (s)
130 50.0

120 30.0

110 10.0

10 dB
100 -10.0 at 20 Hz
arg G ( s )

90.0 -30.0

100m 1 10 100 1k Type 2 – op amp

70 • Chris Basso – APEC 2010

35
 Type 2 in a PFC circuit

An average model is used to test both structures

Start-up and transient response is studied in each case
Iin
X1 Vrect
parameters KBU4J L1 R6 X4
{L} 100m PSW1
+
R1=1.6Meg 8 16 23 Vout Vout RON = Vout^2/Pout
3
Cin ROFF = (Vout^2/Pout)*2
Vin Vin

c
∆

IN
fc=20 1u

p
{VRMS}

Fsw (kHz)
4

PWM switch BCM

Gfc=28 - R1 X2
6 Vfsw
pfc=-84 1.6Meg 26 PWMBCMCM2
L=L R10 27
pm=60
10 Ri = Ri 50m
Vton V12

ton
5

vc
G=10^(-Gfc/20)

a
pi=3.14159 C5
9
R4
150u 1.6Meg
R2 IC = {Vrms*1.414}
boost=pm-(pfc)-90 12k C3
pi=3.14159 10n
K=tan((boost/2+45)*pi/180)
K = 0.6 Vmul
fp=fc*k A
C2
fz=fc/k K*A*B

24
B
2 {C2}
IC = 0 Opt 1
Wp=fp*2*pi B4 R5
B1 3 0 V = V(1) * V(2) * {K}>1.3 ?
Wz=fz*2*pi Voltage {R2}
1.3 : V(1) * V(2) * {K} 12
V(err)-2.05 < 0 ? 0 : V(err)-2.05 C1
R20=R1*Wz/(Wp-Wz) {C1}
C10=1/(Wz*(R1+R20)) Verr R9 IC = 0
parameter err 100m 14
C20=1/(G*R1*Wz)
op3
Vrms=100 17

Pout=150 B5
a=sqrt((fc^2/fp^2)+1) Voltage
Vout=400 Vopamp
b=sqrt((fz^2/fc^2)+1) 13
R3
Ri=0.22 V(op3)>6.4 ? 6.4 : V4
V(op3) <1.7 ? 1.7 : V(op3) 10k
L=850u 2.5
R2=((a/b)*G*R1*fp)/(fp-fz)
C2=C1/(C1*R2*2*pi*fp-1)
C1=1/(2*pi*R2*fz)
Replaced by the second type (opt 2)
Type 2 – op amp

71 • Chris Basso – APEC 2010

Type 2 in a PFC circuit – transient response

The small-signal response is similar (fc = 20 Hz, ϕm = 60°)

Overshoot is reduced by 5% in the second option

430 440 V, opt 1

390

350
420 V, opt 2

Vout ( t )
310

270
Start-up sequence
51.0m 151m 251m 351m 451m
time in seconds

420
Transient response
410

400

Vout ( t )
390

380

401m 601m 801m 1.00 1.20

Type 2 – op amp

72 • Chris Basso – APEC 2010

36
 Type 3 with an op amp (full analysis)

Type 3 keeps the origin pole but add a zero/pole pair
C2 Zf
Zi {C2}  1  1  1  1
1 Zf = + R2   + R2  +
R3
sC
 1  sC2 sC
 1  sC2
C1 R2
{R3} {C1} {R2}
R1  1   1 
5 {R1}
4
Zi =  + R3  R1  + R3  + R1
C3  sC3   sC3 
{C3}
2

3 Verr
ref
V1 Rlower
AC = 1 10k
factor sR2C1

 1  1  1  1 1
 + R2   + R2  + +1
sC  sC2 sC sC sC3 ( R1 + R3 ) + 1
G ( s) = −  1  1  R C sR2C1
2
=− 2 1
 1   1  R1 ( C1 + C2 ) 1 + sR C1C2 sR3C3 + 1
 + R3  R1  + R3  + R1
+
2
sC sC C C
 3   3  1 2
Type 3 – op amp

73 • Chris Basso – APEC 2010

Type 3 with an op amp (full analysis)

Re-write the expression in a more familiar form:
 sz1  s  ωz =
1
ω p1 =
1
1 +  1 +  R C 1
C C
 s   sz2  R C1 2 1
R2 1 2
G ( s ) = −G0 G0 = 2 C1 + C2
 s  s  R1 C1 + C2
 1 +  1 +  1
ω p2 =
1
ωz =
 s p1  s p 2 
( R1 + R3 ) C3 2
R3C3

As ωz12, ωp12, G0 and R1 are given (boost, Vout etc.) how to get R2?

2 2 2
 f   f 
2
 fz   f 
1+  1  1+  c  1+  c  1+  c 
 fz   fp   fp 
 fc   2 G fc R1 f p1  1  2
G ( f c ) = G0 R2 =
 f 
2
 f 
2 f p1 − f z1 2
 f 
2
 fz 
1+  c  1+  c  1+  1  1+  c 
 fp     fc   fz 
 1  f p2   2
Type 3 – op amp

74 • Chris Basso – APEC 2010

37
 Type 3 with an op amp (simplified analysis)

Extract the rest of the elements:
1 C1 f p2 − f z 2 R1 f z2
C1 = C2 = C3 = R3 =
2π f z1 R2 2π f p1 C1 R2 − 1 2π Rupper f p2 f z2 f p2 − f z 2

In most cases, C2 << C1 and R3 << R1. Therefore:

1
+1
R sR C sC3 R1 + 1 C = 1 1 1 1
G ( s) ≈ − 2 2 1 C2 = C3 = R3 =
2π f z1 R2 2π f p1 R2 2π f z2 R1 2π f p2 C3
1
R1 1 + sR2C2 sR3C3 + 1

2 2
 f 
2 2
 fz   f   f 
1+  1  1+  c  1+  c  1+  c 
 fc   fz   fp   fp 
R2  2  1  2
G ( fc ) = R2 = G fc R1
2 2
R1  f 
2
 f 
2
 fz   f 
1+  c  1+  c  1+  1  1+  c 
 fp     fc   fz 
 1  f p2   2
Type 3 – op amp

75 • Chris Basso – APEC 2010

Type 3 with an op amp – design example

You need to provide a -10-dB gain at 5 kHz with a 145°b oost

How to calculate the component values?
fc 5k fc 2 25k
f p1,2 = = ≈ 32.5 kHz f z1,2 = = ≈ 769 Hz
 Boost  154m f p1,2 32.5k
tan  45 − 
 4 
2 2
 f   f 
1+  c  1+  c 
G fc R1 f p1  fp   fp 
 1  2
R2 = = 498 Ω
f p1 − f z1 2
 f 
2
 fz 
1+  1  1+  c 
 fc   fz 
 2

C1 = 415 pF C2 = 10 nF C3 = 20 nF R3 = 242 Ω
Type 3 – op amp

76 • Chris Basso – APEC 2010

38
 Type 3 with an op amp – Bode plot
dB °
G (s)
10.0 90.0

0 0
dB G ( 5k ) = −10 dB

fc
log f
-10.0 -90.0

-20.0 -180

-270°
boost = 145°

arg G ( s )
-30.0 -270

10 100 1k 10k 100k

5 kHz Type 3 – op amp

77 • Chris Basso – APEC 2010

Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

78 • Chris Basso – APEC 2010

39
 Type 1 with an OTA

A type 1 with an OTA involves the transconductance value gm
gm
R1 Rlower
Vout Verr I out = −gmVin
Rlower + R1
2

Rlower 4 C1
Rlower 1
Vref G ( s ) = −gm
Rlower + R1 sC1

1 1 1 Rlower + R1
G (s) = − =− =− with Req =
R + R1 sReq C1 s gmRlower
s lower C1
gmRlower ω po

ω po ω po
G (s) =
1
= f po = G f c f c C1 =
jω ω Rlower + R1
2π f po
gmRlower
Type 1 – OTA The divider network now enters the picture!

79 • Chris Basso – APEC 2010

Type 1 with an OTA – design example

A Borderline PFC with a MC33262 controller: open-loop gain test
L1 R6
141V {L} 100m
16 23 Vout
c

p
Fsw (kHz)

4
PWM switch BCM

402V
R1 50.1V X2
1.6Meg Vfsw 26 PWMBCMCM2
1.05V L=L R10
12.9V Ri = Ri 50m
VinAVG 10
Vton Rload
ton

5
{Vrms*1.414} {Vout*Vout/Pout}
vc
a

parameter C5
9
R4
150u {Rupper}
R2 IC = {Vrms*1.414}
Vrms=100 12k C3
Pout=175 10n

Vout=400
Ri=0.2 K = 0.6

L=850u A
400mV
Parameter
K*A*B
1
634mV
24
B Rupper=1.6Meg
B4 B1 3 0 V = V(1) * V(2) * {K}>1.3 ? 1.3 : V(1) * V(2) * {K} Rlower=10k
Voltage
G1
V(err)-2.05 < 0 ? 0 : V(err)-2.05 Verr {gm} gm=50u
err VOTA fc=7
0V 2.50V
22 17
Gfc=38
LoL
G=10^(-Gfc/20)
CoL D1 D2 2.68V
1kF 1k N = 0.01 N = 0.01 13
fpo=G*fc
6.40V 1.70V R5 C1 B1
a=Rlower+Rupper
28 2 15 14 1G {C1} Current V11 R3 b=gm*Rlower
B5 V4
V7 V3 V5 {Rlower} Req=a/b
Voltage 2.5
AC = 1 6.4 1.7
V(VOTA) C1=1/(6.28*fpo*Req)

I(V11) > 10u ? 10u : I(V11)

Type 1 – OTA

80 • Chris Basso – APEC 2010

40
 Type 1 with an OTA – design example

A type 1 as examplified in the data-sheet give a weak ϕm!

° dB dB °
| H ( f )| argT ( f )
G f c = 38 dB
180 44.0 40.0 80.0

90.0 32.0 20.0 40.0

|T ( f )| ϕ m = 20°
0 20.0 0 0

arg H ( f ) f c = 7 Hz
-90.0 8.00 -20.0 -40.0

-180 -4.00
ϕ = −71° -40.0 -80.0

100m 1 7 10 100 1k 100m 1 7 10 100 1k

G f c = 12.6m f po = 12.6m × 7 ≈ 88 mHz C1 = 560 nF

Type 1 – OTA

81 • Chris Basso – APEC 2010

Type 2 with an OTA

A type 2 with an OTA requires the addition of a resistor and a cap.
Vout Verr
R1 R2
Rlower C2
Vref gm
Zf C1

 1  1
 R2 + 
R2C1 gmRlower 1 + ( f z f )
2
Rlower gm  sC1  sC2
G (s) = − G (s) = −
R1 + Rlower  C1 + C2 Rlower + R1 1 + f f 2
 R2 +
1  1
+ ( p)
 sC1  sC2
Ratio 2
 f 
dependent 1+  
G fc f p Rlower + R1  fp 
ωz =
1 1  
ωp = R2 =
R2C1  CC  f p − fz gmR1  f 
2
R2  1 2  1+  z 
 C1 + C2   f  Type 2 – OTA

82 • Chris Basso – APEC 2010

41
 Type 2 with an OTA – design example

You need to provide a 15-dB gain at 5 kHz with a 50°boo st

The poles and zero position are that of the op amp design
R2 = 260 k Ω C1 = 340 pF C2 = 52 pF gm = 50 µS R1 = Rlower = 10 k Ω
dB °
55.0 -190 dB

G (s)
35.0 -210 log f

15.0 -230

-5.00 -250

arg G ( s ) boost = 50°

-25.0 -270
-270°
10 100 1k 5k 10k 100k Type 2 – OTA

83 • Chris Basso – APEC 2010

PFC response: OTA versus op amp

The poles/zero are placed at the same location as in the op amp case
6

Op amp Vpeak = 438 V

460
Vpeak = 430 V

380

300

OTA
220

140

35.9m 108m 179m 251m 323m Type 2 – OTA

84 • Chris Basso – APEC 2010

42
 Type 3 with an OTA

A type 3 with an OTA lets you boost the phase up to 180°. In theory…
R3 C3
gm
Vout Verr
R1 R2
Rlower
Vref C2
C1
1
+1
R gm R2C1 sC3 ( R3 + R1 ) + 1 sR2C1
G ( s ) = − lower If C2 << C1
Rlower + R1 C1 + C2  Rlower R1   C1C2 
sC3  + R3  + 1 1 + sR2 
 Rlower + R1   C1 + C2 
1
+1
Rlower gmR2 sC3 ( R3 + R1 ) + 1 sR2C1
G (s) ≈ −
Rlower + R1  R R  1 + sR2C2
sC3  lower 1 + R3  + 1
R
 lower + R1  Type 3 – OTA

85 • Chris Basso – APEC 2010

Type 3 with an OTA

The extraction of the component values leads to complicated equations
1 1 1 1
ωz = ωz = ωp = ωp =
1
R2C1 2
C3 ( R3 + R1 ) 1
R2C2 2
 Rlower R1 
C3  + R3 

First calculate R3 but Rlower plays a role:  Rlower + R1 
 No virtual ground as with the op amp!
f z Vout − f p Vref
R3 = 2
Rlower (Vout − Vref )
2

Vref Vout ( f p − f z ) 2 2

Then calculate R2 to crossover at the right frequency

R2 =
(f p1
2
+ fc2 )( f z1
2
+ fc2 )( f p2
2
+ fc 2 )( f z2
2
+ fc2 ) f c f z2 ( Rlower + R1 ) G fc
f z2 f c + f c + + f z1 f c + f z1 f z2
2 2 4 2 2 2 2
gmf p2 f p1 Rlower

1 1 1
C1 = C2 = C3 =
2π R2 f z 1 2π R2 f p 1 f z2 ( R3 + R1 ) Type 3 – OTA

86 • Chris Basso – APEC 2010

43
 Type 3 with an OTA

If we look at R3 definition, its numerator can be null:

f z2Vout − f p2Vref = 0

Vref
f z2 > f p2
Vout

If Vout = 12 V and Vref = 2.5 V If Vout = 400 V and Vref = 2.5 V

f p2 f p2 = 10 kHz f p2 f p2 = 10 kHz
f z2 > f z2 >
4 f z2 > 2.5 kHz 160 f z2 > 63 Hz

Less freedom to place the second pole and zero: limited boost!
Type 3 – OTA

87 • Chris Basso – APEC 2010

Type 3 with an OTA – a design example

parameters
vin

Vout=12
Vref=2.5 R8 R2
{R30} {Rupper} G1
Rlower=10k {gm}
Rupper=Rlower*(Vout-Vref)/Vref 5
Vota
fc=2k C6 4

V1 {C30}
Gfc=-20 AC = 1
1
C1
G=10^(-Gfc/20) {C10}

pi=3.14159 3 C2
{C20}
fz1=300 R3
{Rlower}
R1
{R20}
fz2=900
fp1=26k
fp2=4.3k
C3=1/(2*pi*fz1*Rupper)
R3 =1/(2*pi*fp2*C3)
C1=1/(2*pi*fz2*R2)
C2=1/(2*pi*(fp1)*R2)
a=fc^4+fc^2*fz1^2+fc^2*fz2^2+fz1^2*fz2^2 C4
{C2}
c=fp2^2*fp1^2+fc^2*fp2^2+fc^2*fp1^2+fc^4 vin
R2=sqrt(c/a)*G*fc*R3/fp1 R7 C3 R6
{R3}
gm=200u {C1} {R2}
Rupper2
d=(fp1^2+fc^2)*(fc^2+fz1^2) * (fp2^2+fc^2)*(fc^2+fz2^2) 10 {Rupper}
8

e=fz1^2*fz2^2+fz1^2*fc^2+fc^2*fz2^2+fc^4 C5 E1
2
{C3} 10k
f=(Rlower+Rupper)*G*fz2*fc/(gm*Rlower*fp2*fp1)
R20=(sqrt(d)/e)*f 6 VOPAMP
R30=((fz2*Vout-fp2*Vref)/(Vref*Vout*(fp2-fz2)))*Rlower*(Vout-Vref)
Rlower2
C30=1/(2*pi*fz2*(R30+Rupper)) {Rlower}
C20=1/(2*pi*R20*fp1)
C10=1/(2*pi*R20*fz1)
Type 3 – OTA

88 • Chris Basso – APEC 2010

44
 Type 3 with an OTA – a design example

The op amp and the OTA designs perfectly match!
dB
45.0

35.0
G (s)
25.0
20 dB
15.0

5.00

°
240
arg G ( s )
200

160

120

80.0

10 100 1k 2 kHz 10k 100k Type 3 – OTA

89 • Chris Basso – APEC 2010

Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

90 • Chris Basso – APEC 2010

45
 The TL431 programmable zener

The TL431 is the most popular choice in nowadays designs

It associates an open-collector op amp and a reference voltage

The internal circuitry is self-supplied from the cathode current

When the R node exceeds 2.5 V, it sinks current from its cathode

K
R
K

TL431A R

A
2.5V
R
A
K
A

The TL431 is a shunt regulator TL431

91 • Chris Basso – APEC 2010

The TL431 programmable zener

The TL431 lends itself very well to optocoupler control

Vdd Fast lane Slow lane

Vout ( s )
R pullup RLED R1
Vout ( s ) − VTL431 ( s )
I LED ( s ) =
VFB ( s ) RLED

Rbias Vout ( s ) VTL431 ( s )

I LED ( s ) = −
VTL431 ( s ) RLED RLED
C2 C1

TL431 Rlower Fast lane Slow lane

RLED connected to Vout offers a direct path to the LED: fast lane! TL431

92 • Chris Basso – APEC 2010

46
 The TL431 programmable zener

At high frequencies, the TL431 ac output is zero, C1 is a short-circuit

RLED alone fixes the fast lane gain

Vout ( s )
RLED R1
Vdd VFB ( s ) = −CTR ⋅ R pullup ⋅ I1
I1
Vout ( s )
R pullup I1 =
0V RLED
IC in ac
VFB ( s )
VFB ( s ) R pullup
Rlower = −CTR
Vout ( s ) RLED

RLED must also leave enough headroom to the TL431: upper limit!
TL431

93 • Chris Basso – APEC 2010

The TL431 programmable zener

RLED cannot exceed a certain value because of bias limits

VFB must swing between VCE,sat and Vcc V out
Vdd
Vcc − VCE , sat RLED
I C ,max =
R pullup
R pullup I1
Vdd − VCE , sat 1V
I1,max = + I bias I LED I bias =
VFB IC Rbias
R pullup CTR min
Rbias
VCE , sat V f ≈ 1V
≈ 300 mV I1
Vout − V f − VTL431,min Vmin = 2.5 V
I1,max =
RLED
dc representation
Vout − V f − VTL 431,min
RLED ,max ≤ R pullup CTR min
Vdd − VCE , sat + I bias CTR min R pullup

94 • Chris Basso – APEC 2010

47
 The TL431 – the static gain limit

Let us assume the following design:
5 − 1 − 2.5
Vout = 5 V RLED ,max ≤ × 20k × 0.3
4.8 − 0.3 + 1m × 0.3 × 20k
Vf = 1V
VTL 431,min = 2.5 V
Vdd = 4.8 V
VCE , sat = 300 mV RLED ,max ≤ 857 Ω
I bias = 1 mA
CTR min = 0.3
R pullup = 20 k Ω
R pullup 20
G0 > CTR > 0.3 > 7 or ≈ 17 dB
RLED 0.857

In designs where RLED fixes the gain, G0 cannot be below 17 dB

You cannot “amplify” by less than 17 dB TL431

95 • Chris Basso – APEC 2010

The TL431 – the static gain limit

You must identify the areas where compensation is possible
dB °
40.0 180
Not ok
Requires
f c > 500 Hz
H (s)
20.0 90.0
less
than 17 dB
of gain

0 0

-17 dB

arg H ( s )
-20.0 -90.0

Requires
-40.0 -180
ok 17 dB
or more
10 100 500 1k 10k 100k

96 • Chris Basso – APEC 2010

48
 TL431 – injecting bias current

Make sure enough current always biases the TL431: Ibias > 1 mA

If not, its open-loop suffers – a 10-dB difference can be observed!

> 10-dB difference

Ibias
Easy
Ibias = 1.3 mA solution
Rbias

Ibias = 300 µA

1
Rbias = = 1 kΩ
1m
TL431

97 • Chris Basso – APEC 2010

TL431 – small-signal analysis

The TL431 is an open-collector op amp with a reference voltage

Neglecting the LED dynamic resistance, we have:

Vout ( s ) Vout ( s ) − Vop ( s )

I1 ( s ) =
RLED
1
RLED R1 sC1 1
Vop ( s ) = −Vout ( s ) = −Vout ( s )
R1 sR1C1
C1
I1
1  1 
I1 ( s ) = Vout ( s ) 1 + 
≈0 RLED  sR1C1 

We know that: VFB ( s ) = −CTR ⋅ R pullup ⋅ I1

Rlower
Vop ( s ) VFB ( s ) R pullup CTR 1 + sR1C1 
=−  
Vout ( s ) RLED  sR1C1 
TL431

98 • Chris Basso – APEC 2010

49
 TL431 – small-signal analysis

In the previous equation we have:
R pullup
 a static gain G0 = CTR
RLED
1
 a 0-dB crossover pole frequency ω po =
R1C1
1
 a zero ωz = 1
R1C1

We are missing a pole for the type 2!
Vdd
Type 2 transfer function
R pullup
Add a cap. from
VFB ( s ) collector to ground
VFB ( s ) R pullup CTR  1 + sR1C1 
=−  
C2 Vout ( s ) RLED  sR1C1 (1 + sR pullupC2 ) 
TL431

99 • Chris Basso – APEC 2010

TL431 – small-signal analysis

The optocoupler also features a parasitic capacitor
 it comes in parallel with C2 and must be accounted for
Vout(s)

Vdd

Rpullup

VFB(s) FB
c

C
Copto

C2 = C || Copto e optocoupler

TL431

100 • Chris Basso – APEC 2010

50
 TL431 – small-signal analysis

The optocoupler must be characterized to know where its pole is

Cdc Rled
Ic 10uF 20k
2 5

Rpullup ∠O ( s )
20k
Rbias
VFB 1 3
Vdd
5
O ( s)
X1 4 6
SFH615A-4
Vbias Vac

IF
-3 dB

4k

Adjust Vbias to have VFB at 2-3 V to be in linear region, then ac sweep

The pole in this example is found at 4 kHz
1 1 Another design
Copto = = ≈ 2 nF
2π R pullup f pole 6.28 × 20k × 4k constraint!
TL431

101 • Chris Basso – APEC 2010

The TL431 in a type 1 compensator

To make a type 1 (origin pole only) neutralize the zero and the pole

VFB ( s ) R pullup CTR  1 + sR1C1  1

=−   ω po =
 sR1C1 (1 + sR pullup C2 ) 
Vout ( s ) RLED R1RLED
C1
R pullup CTR
R pullup CTR
C1 =
ω po R1 RLED
R1 CTR
sR1C1 = sR pullup C2 C2 = C1 C2 =
R pullup 2π f po RLED

Once neutralized, you are left with an integrator

1 f po CTR
G (s) = − | G ( f c ) |= f po = G fc fc C2 =
s fc 2π G fc f c RLED
ω po
TL431

102 • Chris Basso – APEC 2010

51
 TL431 type 1 design example

We want a 5-dB gain at 5 kHz to stabilize the 5-V converter
Vout = 5 V
Vf = 1V
VTL 431,min = 2.5 V Apply 15%
margin
Vdd = 4.8 V
RLED ,max ≤ 857 Ω RLED = 728 Ω
VCE , sat = 300 mV
I bias = 1 mA
CTR min = 0.3
R pullup = 20 k Ω
5
G fc = 10 20 = 1.77 CTR 0.3
C2 = = ≈ 7.4 nF
f c = 5 kHz 2π G fc f c RLED 6.28 ×1.77 × 5k × 728
R1 = 10 k Ω
Copto = 2 nF
R pullup
C = 7.4n − 2n = 5.4 nF C1 = C2 ≈ 14.7 nF
R1 TL431

103 • Chris Basso – APEC 2010

TL431 type 1 design example

SPICE can simulate the design – automate elements calculations…

parameters
Vout=5
Vf=1
Vref=2.5
VCEsat=300m
Vdd=4.8
Ibias=1m E1
Vdd -1k
A=Vout-Vf-Vref {Vdd} L1
B=Vdd-VCEsat+Ibias*CTR*Rpullup 4.80V 4.99V 1k 4.99V 4.99V
Rmax=(A/B)*Rpullup*CTR err
6 5 7

Rupper=(Vout-2.5)/250u Rpullup RLED R2 R5 2.50V

fc=5k {Rpullup} {RLED} {Rupper} 100m
Gfc=-5 9

2.50V 2.50V 4.99V

G=10^(-Gfc/20) 3.97V 2 10
pi=3.14159 VFB 4 3 B1
C3
1k Voltage
Fpo=G*fc R6 V2
0V V(err)<0 ? 2.5
1k 0 : V(err)
Rpullup=20k C1
{C1} V3
RLED=Rmax*0.85 Cpole 2.96V AC = 1
{Cpole} 1
C1=Cpole1*Rpullup/Rupper
Cpole1=CTR/(2*pi*Fpo*RLED)
Cpole=Cpole1-Copto X2
Optocoupler
Fopto=4k Cpole = Copto
Copto=1/(2*pi*Fopto*Rpullup) X1
R3
10k
Automatic bias
CTR = CTR TL431_G
CTR = 0.3 point selection

TL431

104 • Chris Basso – APEC 2010

52
 TL431 type 1 design example

We have a type 1 but 1.3 dB of gain is missing?
dB
20.0
G (s)
10.0
3.7 dB
0

-10.0

-20.0

°
270 arg G ( s )
180

90.0

-90.0

100 200 500 1k 2k 5k 10k 20k 50k 100k

TL431

105 • Chris Basso – APEC 2010

TL431 type 1 design example

The 1-kΩ resistor in parallel with the LED is an easy bias

However, as it appears in the loop, does it affect the gain?
Vout(s)
VFB = I c R pullup = I L R pullup CTR
Rbias
RLED I L = I1
ac representation
Rbias + Rd
I1
Vout Rbias
IL =
VFB(s) IL Ib RLED + Rbias || Rd Rbias + Rd
Ic Rd
Rbias R pullup CTR
VFB Rbias
s =0 =
Rpullup
Vf Vout RLED + Rbias || Rd Rbias + Rd
CTR

Both bias and dynamic resistances have a role in the gain expression TL431

106 • Chris Basso – APEC 2010

53
 TL431 type 1 design example

A low operating current increases the dynamic resistor Rd

SFH615A-2 -FORWARD CHARACTERISTICS

0.002000
Rpullup = 20 kΩ, IF = 300 µA (CTR = 0.3)
Rd = 158 Ω
0.001800

0.001600
Rpullup = 1 kΩ, IF = 1 mA (CTR = 1)
Rd = 38 Ω
IF Forward Current(A)

0.001400

0.001200
IF = 1 mA IF @ 110°C
0.001000
IF @ 70°C
0.000800 IF @ 25°C
0.000600 IF @ -20°C
IF @ -40°C
0.000400
IF = 300 µA
0.000200

0.000000
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
VF Forward Voltage (Volts)

Make sure you have enough LED current to keep Rd small

TL431

107 • Chris Basso – APEC 2010

TL431 type 1 design example

The pullup resistor is 1 kΩ and the target now reaches 5 dB
dB
20.0
G (s)
10.0
5 dB
0

-10.0

-20.0

°
arg G ( s )
270

180

90.0

-90.0
100 200 500 1k 2k 5k 10k 20k 50k 100k
TL431

108 • Chris Basso – APEC 2010

54
 The TL431 in a type 2 compensator

Our first equation was already a type 2 definition, we are all set!

Vdd
Vout R pullup
R pullup RLED G0 = CTR
R1 RLED
1
VFB ω po =
R1C1
Rbias 1
ω z1 =
R1C1
C2 C1 1
ωp =
TL431 Rlower
1
R pullup C2

TL431

109 • Chris Basso – APEC 2010

TL431 type 2 design example

You need to provide a 15-dB gain at 5 kHz with a 50°boo st

The output voltage is 12 V

The poles and zero position are that of the op amp design
R pullup
G0 = CTR = 1015 20 = 5.62 f p = 13.7 kHz f z = 1.8 kHz
RLED

With a 250-µA bridge current, the divider resistor is made of:
Rlower = 2.5 250u = 10 k Ω R1 = (12 − 2.5 ) 250u = 38 k Ω

The pole and zero respectively depend on Rpullup and R1:

C2 = 1 2π f p R pullup = 581 pF C1 = 1 2π f z R1 = 2.3 nF

The LED resistor depends on the needed mid-band gain:

R pullup CTR ok
RLED = = 1.06 k Ω RLED ,max ≤ 4.85 k Ω
G0 TL431

110 • Chris Basso – APEC 2010

55
 TL431 type 2 design example

The optocoupler is still at a 4-kHz frequency:
C pole ≈ 2 nF Already above!

Type 2 pole capacitor calculation requires a 581-pF cap.!

The bandwidth cannot be reached, reduce fc!

For noise purposes, we want a minimum of 100 pF for C

With a total capacitance of 2.1 nF, the highest pole can be:
1 1
f pole = = = 3.8 kHz
2π R pullup C 6.28 × 20k × 2.1n

For a 50°phase boost and a 3.8-kHz pole, the crossov er must be:
fp
fc = ≈ 1.4 kHz
tan ( boost ) + tan 2 ( boost ) + 1
TL431

111 • Chris Basso – APEC 2010

TL431 type 2 design example

The zero is then simply obtained:
fc2
fz = = 516 Hz
fp

We can re-derive the component values and check they are ok
C2 = 1 2π f p R pullup = 2.1 nF C1 = 1 2π f z R1 = 8.1 nF

Given the 2-nF optocoupler capacitor, we just add 100 pF

In this example, RLED,max is 4.85 kΩ

R pullup 20
G0 > CTR > 0.3 > 1.2 or ≈ 1.8 dB
RLED 4.85

You cannot use this type 2 if an attenuation is required at fc!

TL431

112 • Chris Basso – APEC 2010

56
 TL431 type 2 design example

The 1-dB gain difference is linked to Rd and the bias current
dB
30.0
G (s)
20.0

10.0

0
14 dB @ 1.4 kHz
-10.0

°
140 arg G ( s )
130

120
50°
110

100
10 100 1k 10k 100k TL431

113 • Chris Basso – APEC 2010

TL431 – suppressing the fast lane

The gain problem comes from the fast lane presence

Its connection to Vout creates a parallel input
 The solution is to hook the LED resistor to a fixed bias
Vdd Vout Vdd Vout
Vbias Vz
Rz
R pullup RLED R1 R pullup RLED R1
Comp. network
VFB changes! VFB
Rbias Rbias
R2
C2 C2
C1 C1

TL431 Rlower TL431

Rlower

TL431

114 • Chris Basso – APEC 2010

57
 TL431 – suppressing the fast lane

The equivalent schematic becomes an open-collector op amp
Vout
Vout ( s )
Vdd Vz

RLED R1
R pullup

G1 ( s )
VFB

C1 R2 G (s)
C2

O (s)
Transmission Rlower
chain – O(s) Vref

Compensaton VFB ( s )
chain – G1(s)
TL431

115 • Chris Basso – APEC 2010

TL431 – suppressing the fast lane

The small-signal ac representation puts all sources to 0
Vout
R pullup 1
O(s) = CTR
RLED 1+ sR pullup C pole R1

G (s)

O (s) VFB C1 R2
G1 ( s ) =
1+ R 2 C1
sR1C1
− IC
C2 IL
RLED Rlower
CTR

R pullup TL431

116 • Chris Basso – APEC 2010

58
 TL431 – suppressing the fast lane

The op amp can now be wired in any configuration!

Just keep in mind the optocoupler transmission chain
R pullup 1
O(s) = CTR
RLED 1+ sR pullup C pole

Wire the op amp in type 2A version (no high frequency pole)
1+ R 2 C1
G1 ( s ) =
sR1C1

When cascaded, you obtain a type 2 with an extra gain term

R pullup 1+ R2C1
G ( s) = − CTR
RLED sR1C1 (1+ sR pullup C pole )
G2 TL431

117 • Chris Basso – APEC 2010

TL431 type 2 design example – no fast lane

We still have a constraint on RLED but only for dc bias purposes
Vz − V f − VTL 431,min
RLED ,max ≤ R pullup CTR min
Vdd − VCE , sat + I bias CTR min R pullup

You need to attenuate by -10-dB at 1.4 kHz with a 50°boost

The poles and zero position are that of the previous design
Vz = 6.2 V
Vf = 1V
VTL 431,min = 2.5 V Apply 15%
margin
Vdd = 4.8 V
RLED ,max ≤ 1.5 k Ω RLED = 1.27 k Ω
VCE , sat = 300 mV
I bias = 1 mA
CTR min = 0.3
R pullup = 20 k Ω f z = 516 Hz f p = 3.8 kHz TL431

118 • Chris Basso – APEC 2010

59
 TL431 type 2 design example – no fast lane

We need to account for the extra gain term:
R pullup 20k
G2 = CTR = 0.3 = 4.72
RLED 1.27k

The required total mid-band attenuation at 1.4 kHz is -10 dB
G fc = 10 −10 20 = 0.316

The mid-band gain from the type 2A is therefore:

G0 0.316
G1 = = = 0.067 or − 23.5 dB 2
G2 4.72  fc 
  + 1
 fp 

Calculate R2 for this attenuation: R2 = G1 R1 = 2.6 k Ω
2
 fz 
  +1
 fc 
TL431

119 • Chris Basso – APEC 2010

TL431 type 2 design example – no fast lane

An automated simulation helps to test the calculation results
parameters

Vout=12
Rupper=(Vout-2.5)/250u
fc=1.4k
Gfc=10
Vf=1 Zener D1
Ibias=1m 1N827A C4
Vref=2.5 value Vdd 0.1u
E1
-1k
VCEsat=300m {Vdd} R5
Vdd=5 5.00V 6.17V 1k 12.0V
6 5
Err
Vz=6.2
12.0V CoL
Rpullup=20k R4 R1 1kF LoL 2.50V
12
Fopto=4k {Rpullup} {RLED} 0V 1kH 9
Rupper 14
Copto=1/(2*pi*Rpullup*Fopto) 12.0V
2.51V 4.32V {Rupper} Vref
CTR=0.3 Vout
13
B1
4 2
2.50V 2.5
G1=Rpullup*CTR/RLED X2 Vac Voltage
11
G2=10^(-Gfc/20) Optocoupler V(err)
Cpole = Copto Rbias
G=G2/G1 1k
CTR = CTR
pi=3.14159 3.31V 2.50V
C2
fz=516 {C2} 1 10
fp=3.8k C1 R2
{C1} {R2}
C1=1/(2*pi*fz*R2)
Cpole2=1/(2*pi*fp*Rpullup)
C2=Cpole2-Copto X1
Rlower
a=(fz^2+fc^2)*(fp^2+fc^2) 10k
TL431_G
c=(fz^2+fc^2)
R2=(sqrt(a)/c)*G*fc*Rupper/fp
Rmax1=(Vz-Vf-Vref)
Rmax2=(Vdd-VCEsat+Ibias*(Rpullup*CTR))
RLED=(Rmax1/Rmax2)*Rpullup*CTR*0.85 TL431

120 • Chris Basso – APEC 2010

60
TL431 type 2 design example – no fast lane

The simulation results confirm the calculations are ok
dB
10.0
G (s)
0

-10.0

-20.0

-30.0 -10 dB @ 1.4 kHz

°
150 arg G ( s )
130

110 50°
90.0

70.0

10 100 1k 10k 100k TL431

121 • Chris Basso – APEC 2010

The TL431 in a type 3 compensator

The type 3 with a TL431 is difficult to put in practice
Vdd Vout
1 1
fz1 = f z2 =
R pullup RLED R pz R1 2π R1C1 2π ( RLED + R pz ) C pz

1 1
f p1 = f p2 =
C pz 2π R pz C pz 2π R pullup ( C2 || Copto )

R pullup
G= CTR
Rbias RLED

C2
C1 RLED fixes the gain and
a zero position
Rlower

Suppress the fast lane for an easier implementation! TL431

122 • Chris Basso – APEC 2010

61
 The TL431 in a type 3 compensator

Once the fast lane is removed, you have a classical configuration
Vdd Vout
Vz
1
fz1 =
Rz 2π R2C1
R pullup RLED R1 R3
1
f z2 =
2π R1C3

C3 1
Rbias f p1 =
2π R3C3

1
C2 f p2 =
C1 R2 2π R pullup ( C2 || Copto )

R pullup
Rlower G= CTR
RLED

TL431

123 • Chris Basso – APEC 2010

TL431 type 3 design example – no fast lane

We want to provide a 10-dB attenuation at 1 kHz

The phase boost needs to be of 120°
 place the double pole at 3.7 kHz and the double zero at 268 Hz

Calculate the maximum LED resistor you can accept, apply margin
Vz − V f − VTL 431,min X 0.85
RLED ,max ≤ R pullup CTR min ≤ 1.5 k Ω 1.3 kΩ
Vdd − VCE , sat + I bias CTR min R pullup

We need to account for the extra gain term:

R pullup 20k
G2 = CTR = 0.3 = 4.6
RLED 1.3k

The required total mid-band attenuation at 1 kHz is -10 dB

G fc = 10 −10 20 = 0.316
TL431

124 • Chris Basso – APEC 2010

62
TL431 type 3 design example – no fast lane

The mid-band gain from the type 3 is therefore:
G0 0.316
G1 = = = 0.068 or − 23.3 dB
G2 4.6

Calculate R2 for this attenuation:
2 2
 f   f 
1+  c  1+  c 
 fp   
G1 R1 f p1  1  f p2 
R2 = = 744 Ω
f p1 − f z1 2
 f 
2
 fz 
1+  1  1+  c 
 fc   fz 
 2
C1 = 800 nF C2 = 148 pF C3 = 14.5 nF Copto = 2 nF

The optocoupler pole limits the upper double pole position

The maximum boost therefore depends on the crossover frequency

125 • Chris Basso – APEC 2010

TL431 type 3 design example – no fast lane

The decoupling between Vout and Vbias affects the curves
dB
10.0
G (s) -9.3 dB @ 1 kHz
0

-10.0

-20.0
Isolated 12-V
dc source
-30.0
-10 dB @ 1 kHz

°
240 arg G ( s )
200

160

135°
120

80.0

1 10 100 1k 10k 100k TL431

126 • Chris Basso – APEC 2010

63
 Pushing the opto pole with the cascode

The optocoupler pole is clearly a limiting factor

A possibility exists to push its position to a higher region
The cascode fixes the optocoupler collector potential
It neutralizes the Miller capacitance of the optocoupler
Vdd

R3 With cascode
20k
R5
20k
FB -3 dB
3
fp = 4.5 kHz
Q1
6 2N3904
fp = 23 kHz
1
R6
20k

SFH615A-2

127 • Chris Basso – APEC 2010

Testing the TL431 fast lane structures

Simulations are a good indication, but lab. results are better

The TL431 needs to be exactly biased at Vout to ac sweep it

A simple low-bandwidth op amp can do the job!
15 V

1000 µF
6.2 V 9 kΩ
0.1 µF Vout
5V
22 Ω
12 V
VEE

1 kΩ
VCC
2.5 V
22 kΩ RLED R3 15 V LM358
1.8 kΩ
VFB 2.5 V 38 kΩ 0.1 µF
U2 1 kΩ C3
SFH615-2
C2
C1 R2 Network 12-V bias point
analyzer automation
U1 10 kΩ
TL431

128 • Chris Basso – APEC 2010

64
 Testing the TL431 fast lane structures

The results confirm the calculation procedures: a type 2

|G(s)| boost = 50°

arg|G(s)|

Gain = 0 dB
fc = 1 kHz

129 • Chris Basso – APEC 2010

Testing the TL431 fast lane structures

The results confirm the calculation procedures: a type 3

|G(s)|
boost = 116°

arg|G(s)| Gain = 17 dB
fc = 1 kHz

130 • Chris Basso – APEC 2010

65
 Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

131 • Chris Basso – APEC 2010

Design Example 1 – a single-stage PFC

The single-stage PFC is often used in LED applications

It combines isolation, current-regulation and power factor correction

Here, a constant on-time BCM controler, the NCP1608, is used
141V
1 19 1 V = 1 µs
PWM switch BCM
duty-cycle

598mV
vc
a

Dc 2

68.4V X2 Vout
Fsw (kHz)

XFMR
Fsw 5

3.09V -210V
RATIO = -250m
52.5V
Iout = 2.4 A
8.74V
7 8
Ip
p

V1
Ip

6
c

{Vrms*1.414} 154mV
3
R2 R7
X1
GAIN

R1 X5 50m 65k
PWMBCMVM 100m K = Gpwm D4
L=L GAIN 52.5V 26.9V
50 V
1N965
0V
9 11 2 A string
4
1.57V
22 C1 C5
B1
L1 2.2mF 0.1uF
Voltage Rsense
{L}
V(errac)-0.6 0.5 1.24V
Vsense
23

parameters Vdd
{Vdd}15.1V 1.25 V ILED
1.24V
Vrms=100
5.00V
14
R5
{RLED}
10

R4
Ac out
L=400u {Rupper}
18

VFB R6
Ct=1.5n
LoL {Rpullup}
Icharge=270u errac
1k 2.17V 2.17V 12.2V
Gpwm=(Ct/Icharge)*1Meg 2.17V 29 17 16
X4
Optocoupler

On-time CoL
1k C2 11.1V
Cpole = Copto
CTR = CTR
C4
{C1}
R9
{R2}
0V
selection 20

AC = 1
{C2} 13
1.24V
28

ac in V3
15
X3
TLV431
1.24V

Average simulation

132 • Chris Basso – APEC 2010

66
 Design Example 1 – a single-stage PFC

Once the converter elements are known, ac-sweep the circuit

Select a crossover low enough to reject the ripple, e.g. 20 Hz
dB 0

H (s)
8.00
-2.5 dB
4.00
20 Hz
0

-4.00

-8.00

°
80.0

40.0
arg H ( s ) -11°
0

-40.0

-80.0

1 2 5 10 20 50 100 200 500 1k

133 • Chris Basso – APEC 2010

Design Example 1 – a single-stage PFC

Given the low phase lag, a type 1 can be chosen
 Use the type 2 with fast lane removal where fp and fz are coincident
dB
2
20.0
1

10.0

13
fc = 19 Hz
0

15 V 0.5 Ω -10.0

T (s)
3

-20.0
5V 10

°
11
6.1 kΩ 10 kΩ 180
ton
generation 20 kΩ 90.0
7 6 ϕm = 90°
0
586 nF 13.6 kΩ
395 nF 4 12 -90.0

arg T ( s )
5

-180
G (s) 1 2 5 10 20 50 100 200 500 1k

134 • Chris Basso – APEC 2010

67
 Design Example 1 – a single-stage PFC

A transient simulation helps to test the system stability
6.00

4.00

2.00
2.2 A

I LED ( t )
0

-2.00

VFB ( t )
5.00

4.60

4.20

3.80

3.40

4.00

2.00

I in ( t )
-2.00

-4.00

20.0m 60.0m 100m 140m 180m Vin = 100 V rms

135 • Chris Basso – APEC 2010

Design Example 2 – a 300-W PFC

A CCM PFC is delivering 300 W in universal mains

Use an average model to plot it transfer function
int VL L1
Rupper=(Vout-2.5)/100u 141V 141V {L}141V
Rlower=2.5/100u 9 5 Vout
out1
gm=200u
c

fc=20 400V
PWM switch VM

R15
Gfc=36 {RBOU}
X1
boost=50 Vin 1.74V
PWMVM
R10
{Vrms*1.414} BO 150m
gm=200u L=L Rload
a

Fs = 65k
d

VBO 400V
G=10^(-Gfc/20) 1 {Vout^2/Pout}
C5
pi=3.14159 R16 C7 180u
fp=(tan(boost*pi/180)+sqrt((tan(boost*pi/180))^2+1))*fc R7
{RBOL} 0.47uF

fz=fc^2/fp -212mV {Rsense}

a=sqrt((fc^2/fp^2)+1) parameter
b=sqrt((fz^2/fc^2)+1)
R2=(G*fp*(Rupper+Rlower)/((Rlower*gm)*(fp-fz)))*(a/b) D4
Vrms=100
Rs
C1=1/(2*pi*fz*R2) 1N5406 Vout=400V
C2=C1/(2*pi*fp*C1*R2-1) d(s) Pout=300W
L=650u

out1 OTA V1
RBOL=82.5k
RBOU=6.6Meg
3.7V

R1
3.70V
7
Control law ROCP=3.8k
Vp=2.5
{Rupper} G1 D1 Vctrl Vpin5 Rsense=100m
{gm} I(V4)>28u ? 28u :
N = 10m R18 R19
I(V4)<-28u ? -28u : I(V4) pin5
2.50V 0V 1.85V 1.85V 1 1.85V 1 1.85V 647mV
31 err 34 35 ctrl
D2 C1 CoL
2.50V LoL
N = 10m0V {C1} 1k
1k 0V 884mV 6
BOTA 13
C2 1.85V 36
600mV BPWM
Rlower V4 Current 14 {C2} 37 B6
{Rlower} Vref R17 C8 Voltage
R2 B1 Current 47k 1nF
V7 AC = 1
2.5
600m {R2} Voltage
V(err)
V12
1-(V(pin5)/{Vp}) > 0.99 ?
0.99 : 1-(V(pin5)/{Vp})
NCP1654
((-V(Rs)/{ROCP})*V(BO))/(4*(V(CTRL)-0.55))

136 • Chris Basso – APEC 2010

68
 Design Example 2 – a 300-W PFC

Select the bandwidth at high line: 20 Hz
dB
H (s)
40.0

20.0

0
36 dB
20 Hz
-20.0

-40.0 Vin = 265 V rms

°
arg H ( s )
180

90.0
-76°
0

-90.0

-180

1 2 5 10 20 50 100 200 500 1k

137 • Chris Basso – APEC 2010

Design Example 2 – a 300-W PFC

Use a type 2 configuration and boost by 50°
dB °
40.0 180

ϕm = 65°
20.0 90.0

arg T ( s )
0 0

-20.0 -90.0
20 Hz

-40.0 -180 Vin = 265 V rms T (s)

° dB
180 40.0

ϕm = 71°
arg T ( s )
90.0 20.0

0 0

8.2 Hz
-90.0 -20.0

-180 -40.0 Vin = 90 V rms T (s)

1 2 5 10 20 50 100 200 500 1k

138 • Chris Basso – APEC 2010

69
 Design Example 2 – a 300-W PFC

Test the transient response and see dynamic enhancer effects
448
With
424
dynamic enhancer

400 9
5

376
370 V
Without
352
dynamic enhancer 347 V Vout ( t )

3.60

2.90

2.20
With 10
8

1.50 dynamic enhancer

Without
800m dynamic enhancer Vctrl ( t )
50.0m 150m 250m 350m 450m

139 • Chris Basso – APEC 2010

Design example 3: a DCM flyback converter

We want to stabilize a 20-W DCM adapter

Vin = 85 to 265 V rms, Vout = 12 V/1.7 A

Fsw = 65 kHz, Rpullup = 20 kΩ

Optocoupler is SFH-615A, pole is at 6 kHz

Cross over target is 1 kHz

Selected controller: NCP1216
1. Obtain a power stage open-loop Bode plot, H(s)
2. Look for gain and phase values at cross over
3. Compensate gain and build phase at crossover, G(s)
4. Run a loop gain analysis to check for margins, T(s)
5. Test transient responses in various conditions

140 • Chris Basso – APEC 2010

70
Design example 3: a DCM flyback converter

Capture a SPICE schematic with an averaged model

839mV

vc
a

PWM switch CM
389mV

duty-cycle
DC 6
X2x
XFMR D1A
RATIO = -166m mbr20200ctp vout
12.0V
90.0V
vout
2 3 4

p
Vin -76.1V 12.6V
c

90
AC = 0 R10
0V
13 20m
X9
Rload
PWMCM L1 12.0V
V(errP)/3 > 1 ? 1 7.2
L = Lp {Lp}
Fs = 65k 1 : V(errP)/3 C5
8
Ri = 0.7 3mF
Se = Se B1
Voltage

Coming from FB

Look for the bias points values: Vout = 12 V, ok

141 • Chris Basso – APEC 2010

Design example 3: a DCM flyback converter

Observe the open-loop Bode plot and select fc: 1 kHz
H (s)
dB °
40.0 180

20.0 90.0

Phase at 1 kHz
-70 °
0 0

arg H ( s )
-20.0 -90.0

-40.0 -180
Magnitude at 1 kHz
-23 dB
10 100 1k 10k 100k

142 • Chris Basso – APEC 2010

71
Design example 3: a DCM flyback converter

Apply k factor or other method, get fz and fp
 fz = 3.5 kHz fp = 4.5 kHz
Vout(s)

Vdd 2 kΩ 38 kΩ

20 kΩ

VFB(s) 10 nF
k factor FB
gave

2.5 nF
C = 3.8 nF 10 kΩ
install Copto = 1.3 nF
C2 = 3.8n − 1.3n ≈ 2.5 nF

143 • Chris Basso – APEC 2010

Design example 3: a DCM flyback converter

Check loop gain and watch phase margin at fc
4

° dB
180 80.0 T (s)

90.0 40.0 arg T ( s )

ϕm = 60°
0 0

-90.0 -40.0
Crossover
1 kHz
-180 -80.0

10 100 1k 10k 100k

144 • Chris Basso – APEC 2010

72
Design example 3: a DCM flyback converter

Sweep ESR values and check margins again

12.04 Vout(t)
Hi
12.00 line

11.96

11.92 100 Low

mV
line
11.88

200 mA to 2 A in 1 A/µs
3.00m 9.00m 15.0m 21.0m 27.0m

145 • Chris Basso – APEC 2010

Design example 4: a CCM forward converter

We have designed a 5-V/20-A telecom input converter

We use the NCP1252, fixed-frequency current-mode
Rsnub1 Csnub1
16 L4
5uH
36-72 V
14 13 17 5 V/20 A
1:1:0.5 D1
D2 C2 C3 C4
MBR40L60CT 470uF 470uF 470uF
Lp=10 mH MBR40L60CT
2
1
R2
300k D3
MUR160
U1 R3 R4 R1
230 C1 1.8k 10k
NCP1252
2.3nF
SS
12
1 8 9 21
C5
12 V U3
47uF 5
7
2 7 11 R6
15
M1 VCC 19
8
3 6 10 6 U2A
BUZ32 18

4 5 R7 VEE
3 15
C8 D4 100k 4
1N4148 C12
100pF
0.1uF
TL431 R12
R10
U4 10k
100
C7 R8 C9 R9 C11 R11
10n 14.3k 100p 22k 100nF 0.075 C13
0.1uF

U2B
C10
100nF

We need high dc gain, an op amp is adopted, fc = 10 kHz

146 • Chris Basso – APEC 2010

73
Design example 4: a CCM forward converter

Despite the op amp, we still have a fast lane issue!
Vout
Vdd
RLED R1
R pullup I LED ( s ) Same
C1
transfer
function as
FB with a TL431!

C2 Vopamp ( s ) Rlower

Vout ( s ) − Vopamp ( s ) VFB ( s ) R pullup CTR  1 + sR1C1 

I LED ( s ) = =−  
RLED Vout ( s ) RLED  sR1C1 (1 + sR pullupC2 ) 

147 • Chris Basso – APEC 2010

Design example 4: a CCM forward converter

The LED resistor still limits the gain you can get:
Vout − V f − Vopamp ,min
RLED ,max ≤ R pullup CTR min
Vdd − VCE , sat
Vout = 5 V
Vf = 1V
Vopamp ,min = 150 mV
Vdd = 4.8 V RLED ,max ≤ 1.4 k Ω
VCE , sat = 300 mV
CTR min = 0.5
R pullup = 3.3 k Ω

In this case, we cannot provide less than:

R pullup CTR 3.3k × 0.5
G0 = = = 1.17 = 1.4 dB
RLED 1.4k

148 • Chris Basso – APEC 2010

74
Design example 4: a CCM forward converter

Build an average model to extract H(s)
X5x dc
PW MCM2
L = Lout/N^2
Fs = Fs 309mV
D2
parameters
Ri = Rsense RL2
Se = Se MBR40L60CT vout
duty-cycle 5.01V 1m 4.99V
a c
Vc
3 18 Vout2 Vout=5
11.1V 5.54V Lout
8 5
5.01V
{Lout} Lout=5u
792mV
vc X6
36.0V 15
p XFMR
R1 Lmag=10mH
10 PWM switch CM 10m
V6
RATIO = N 4.99V Rload1 Fs=200k
{Vin} 7 {Rload}
C1
N=0.5
(V(err)-0.6)/3 >1 ?
1410uF Rsense=70m
1 : (V(err)-0.6)/3 Rload=250m
Vin=36
Vdd
{Vdd}
Vinmin=36
5.00V 21
vout
D=0.31
R7 Smag=(Vinmin/Lmag)*Rsense
{Rpullup}
Verr RLED
Sn=(((N*Vinmin-Vout)/Lout)*N)*Rsense
err
{RLED} Q=1/(pi*((1-D)-0.5))
4.91V Czero
6 {Czero} 2.50V {Rupper} mc=((1/pi)+0.5)/(1-D)
LoL 3.89V
X3 Rupper Se=(mc-1)*Sn-Smag
2.98V 1G 9
Optocoupler
Cpole = Copto
13
CoL
1G
CTR = 1.6
Ramp compensation
0V
14
Cpole 2.50V calculations
Vstim {Cpole} 11
AC = 1 X2
AMPSIMP
Rlower
VLOW = 150m Vref
10k
VHIGH = 5 2.5

149 • Chris Basso – APEC 2010

Design example 4: a CCM forward converter

From the power stage Bode plot, extract the data at fc
° dB
180 20.0
f z = 6.8 kHz
Place: f = 14.5 kHz
p
90.0 10.0 H (s )

0 0
∠H (s) ∠ H (10 k ) = − 51 °

-90.0 -10.0

H (10 k ) = − 17.2 dB
-180 -20.0
V in = 36 V

10 100 1k 10k 100k

150 • Chris Basso – APEC 2010

75
Design example 4: a CCM forward converter

Check the impact on parameters such CTR, ESR etc.
° dB
180 80.0 T ( s ) , CTR = 160%
90.0 40.0
∠T ( s )
0 0
T ( s ) ,CTR = 50% CTR = 0.5
CTR = 1.6
-90.0 -40.0
ϕm = 58°
ϕm = 66°
-180 -80.0 Vin = 36 V f c = 9.3 kHz
f c = 23.7 kHz

CTR = 1.6
° dB
180 80.0 T ( s ) , CTR = 160% ϕm = 63°
f c = 23.1 kHz
90.0 40.0
∠T ( s )
0 0
T ( s ) ,CTR = 50% CTR = 0.5
-90.0 -40.0
ϕm = 56°
-180 -80.0 Vin = 72 V f c = 9.3 kHz
10 100 1k 10k 100k

151 • Chris Basso – APEC 2010

Design example 4: a CCM forward converter

The CTR variation induces an upper crossover of 23 kHz

This is an aggressive target, prone to collecting noise

Better reduce the initial crossover to limit fc to ≈15 kHz
5.20

5.10 CTR = 1.6 CTR = 0.5

5.00

4.90

4.80 Vin = 36 V Vout ( t )

5.20

5.10 CTR = 1.6 CTR = 0.5

5.00

4.90

4.80 Vin = 72 V Vout ( t )

2.80m 2.96m 3.12m 3.28m 3.45m

152 • Chris Basso – APEC 2010

76
Design example 4: a CCM forward converter

The opto wired to the ground, the fast lane goes away
Vout(s)
G(s) Remove this cap. and use the
Rpullup/Copto combination instead
C2
Rupper
Vdd
O(s)
R2 C1
Rpullup RLED
VFB(s) O(s) G(s) Vout(s)
VFB(s)

Type 2

VFB ( s ) Rpullup CTR 1 1 + sR2C1

=
Vout ( s ) RLED 1 + sRpullup C pole   C C 
sRupper ( C1 + C2 ) 1 + sR2  1 2  
Optocoupler   C1 + C2  
contribution Opto equivalent
capacitor Suppress C2

The control phase is reversed, watch for the right polarity!
153 • Chris Basso – APEC 2010

Agenda

Feedback generalities

The divider and the virtual ground

Phase margin and crossover

Poles and zeros

Boosting the phase at crossover

Various compensator types

Practical implementations: the op amp

Practical implementations: the OTA

Practical implementations: the TL431

Design examples

A real case study

Conclusion

154 • Chris Basso – APEC 2010

77
 A real-case example with a UC384X

A 19-V/3-A converter is built around an UC3843
T1
86H-6232
0.18 : 1 : 0.25
HV-bulk

R19 R3 R13
47k 47k 47k C2
10n D5
400V MBR20100 L2
2.2u
+

. . C5a C5b C7
IC4 Vout
KBU4K
D2 . 1.2mF
25V
1.2mF
25V
220uF
25V
MUR160
C11 R6
100p
Vref C13
6k Gnd
R17 2.2nF
IN

47k Type = Y1

1 CMP Ref 8 R1 D8 R8 R14

R7 330 1N4937 1k 4.7k
C4 10k
2 x 10mH 100uF
2 FB Vcc 7
L1

Schaffner RN122-1.5/02 400V 3 CS DRV 6

M1
R12
SPP11N60S5 10k
Vref R16
R11 4 Rt GND 5 10 R18
10k 47k
C10 U1
470n X2
UC3843
U3B R10
56k
R23 R24
1Meg 1Meg
U3A C6
R5 100n
1k
R15 R6a R6b
85-260 Vac 4.7k 1 1

C12 C16 C15 C3 IC2 R9

220p 4.7nF 10nF 220uF TL431 10k

Gnd

The converter operates in CCM at full load low line

155 • Chris Basso – APEC 2010

A real-case example with a UC384X

Use an auto-toggling current-mode average model
PWM switch CM
vc
a
duty-cycle

DC 6
X2x
XFMR D1A
mbr20200ctp vint L1 R1
RATIO = -250m vout
2.2u 20m
vout
2 3 4 5
p

Vin
c

150
AC = 0 R10 R15
8 15m 85m
X9
Rload
PWMCM Lp
1 10 6.3
L = Lp {Lp} (V(errXX)-1.2)/3 > 1 ?
Fs = Fs 1 : (V(errXX)-1.2)/3 C5 C1
9
Ri = Rsense 2m 220u
B3
Se = Se
Voltage

R2
47k
1 V maximum voltage
and divider by 3 CCM operation
X3
OP384X1 R3 Low line voltage
47k
13 15

errXX UC384X
gnd
2V5

Internal V3
1.08
AC = 1
op amp section Dc + ac modulation

156 • Chris Basso – APEC 2010

78
 A real-case example with a UC384X

H(s) alone can be measured without loop opening
R19 R3 R13
47k 47k 47k C2
10n D5
400V MBR20100 L2
2.2u
Vout(s)
. . C5a C5b C7
220uF Vout
D2 . 1.2mF
25V
1.2mF
25V 25V
MUR160
C11 R6
100p
Vref C13
6k
R17 2.2nF
Gnd
47k Type = Y1

1 CMP Ref 8 R1 D8 R8 R14 B

C4
R7
10k
330 1N4937 1k 4.7k
B
100uF
2 FB Vcc 7 20 log10  
400V M1
R12  A
3 CS DRV 6
Vref R16
SPP11N60S5 10k A
R11 4 Rt GND 5 10 R18
10k 47k
U1
UC3843
U3B R10
56k
Vc(s)
U3A C6 C10
R5 100n 10uF
1k

R15 R6a R6b

4.7k 1 1

C12 C16 C3 IC2 R9

220p 4.7nF 220uF TL431 10k

C15
10nF Gnd

Watch out for capacitor connection (short-circuit to GND when discharged)

157 • Chris Basso – APEC 2010

A real-case example with a UC384X

For closed-loop measurements, a transformer is the solution
Gain decreases
Vout
1 8

5 mV / div
0 dB 2 7

Vin = Vout Vin 3 6

Vref
1.5 kHz / V
4 5
constant
R2
Zin 20 Zout

R20
4.7k

High
gain
Vsource A B

ac
source

VB
2.13 6.38 10.6 14.9 19.1
T ( s ) = 20 log10
v3 in volts
VA

Make sure Zout<<Zin to avoid gain errors

158 • Chris Basso – APEC 2010

79
 A real-case example with a UC384X

arg H ( s )

H (s)

21

simulated

22
10 100 1k 10k 100k

CCM operation, Rload = 6.3 Ω

159 • Chris Basso – APEC 2010

A real-case example with a UC384X

arg H ( s )

H (s)

simulated

10 100 1k 10k 100k

DCM operation, Rload = 20 Ω

160 • Chris Basso – APEC 2010

80
 A real-case example with a UC384X

Select the crossover point on the open-loop Bode plot
dB °
arg H ( s )
40.0 180
arg H(fc) = -90°

20.0 90.0

H (s)
0 0

-20.0 -90.0
|H(fc)| = -18 dB

-40.0 -180

10 100 1k 10k 100k

161 • Chris Basso – APEC 2010

A real-case example with a UC384X

The TL431 is tailored to pass a 1-kHz bandwidth

Vref Vout Calculate mid-band gain: +18 dB

R1 R pullup CTR 4.7 k × 0.45

RLed RLED = 18
= = 266 Ω
66 kΩ 7.94
20
10
1 kΩ We place a zero at 300 Hz:
CTR
= 45% Czero 1 1
C zero = = = 8 nF
2π f zero R1 6.28 × 300 × 66k
Cpole Rpulldown
Rlower We place a pole at 3.3 kHz:
10 kΩ
1 1
C pole = = = 10 nF
2π f pole R pulldown 6.28 × 3.3k × 4.7 k

k factor method

“Switch-Mode Power Supplies: SPICE Simulations and Practical Designs”, McGraw-Hill

162 • Chris Basso – APEC 2010

81
 A real-case example with a UC384X

Sweep extreme voltages and loads as well!

T (s)

arg T ( s )

Simulated

CCM operation, Rload = 6.3 Ω, Vin = 150 Vdc

163 • Chris Basso – APEC 2010

A real-case example with a UC384X

T (s)

arg T ( s )

Simulated
10 100 1k 10k 100k

CCM operation, Rload = 6.3 Ω, Vin = 330 Vdc

164 • Chris Basso – APEC 2010

82
 A real-case example with a UC384X

T (s)

arg T ( s )

Simulated

DCM operation, Rload = 20 Ω, Vin = 330 Vdc

165 • Chris Basso – APEC 2010

A real-case example with a UC384X

Good agreement between curves!

26

Vin = 150 V
Simulated CCM
2 to 3 A
1 A/µs

166 • Chris Basso – APEC 2010

83
 A real-case example with a UC384X

DCM operation at high line is also stable

Vin = 330 V
Simulated DCM
0.5 to 1 A
1 A/µs

167 • Chris Basso – APEC 2010

Conclusion

We have seen how to apply loop theory to a switching converter

Classical type 1, 2 and 3 compensators have been covered

Their implementation with op amps, OTAs and TL431 studied

Op amps are the most flexible, OTAs and TL431 have limits

In isolated supplies, the optocoupler affects the transmission chain

Design examples showed the power of averaged models

Use them to extensively test the loop stability (sweep ESRs etc.)

Applying these recipes is key to design success!
Merci !
Thank you!
Xiè-xie!

168 • Chris Basso – APEC 2010

84