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Solution CH 02 Part 3

Computer Organization and Design Chapter-2

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21 views6 pages

Solution CH 02 Part 3

Computer Organization and Design Chapter-2

Uploaded by

Hanan Ali
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Chapter 2: Boolean Algebra & Logic Gates

Solutions to Problems: [1, 4, 5, 8, 10, 15]

Problem: 2-1
Demonstrate by means of truth tables the validity of the following identities:
(a) DeMorgan’s theorem for three variables: (x+y+z)’ = x’y’z’ and
(xyz)’=x’+y’+z’
(b) The distributive law: x+yz = (x+y)(x+z)

Solution:

(a)
x y z x+y+z (x+y+z)’ x’ y’ z’ x’y’z’
0 0 0 0 1 1 1 1 1
0 0 1 1 0 1 1 0 0
0 1 0 1 0 1 0 1 0
0 1 1 1 0 1 0 0 0
1 0 0 1 0 0 1 1 0
1 0 1 1 0 0 1 0 0
1 1 0 1 0 0 0 1 0
1 1 1 1 0 0 0 0 0

x y z xyz (xyz)’ x’ y’ z’ x’+y’+z’


0 0 0 0 1 1 1 1 1
0 0 1 0 1 1 1 0 1
0 1 0 0 1 1 0 1 1
0 1 1 0 1 1 0 0 1
1 0 0 0 1 0 1 1 1
1 0 1 0 1 0 1 0 1
1 1 0 0 1 0 0 1 1
1 1 1 1 0 0 0 0 0

(b)

x y z yz x+yz x+y x+z (x+y)(x+z)


0 0 0 0 0 0 0 0
0 0 1 0 0 0 1 0
0 1 0 0 0 1 0 0
0 1 1 1 1 1 1 1
1 0 0 0 1 1 1 1
1 0 1 0 1 1 1 1
1 1 0 0 1 1 1 1
1 1 1 1 1 1 1 1

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Problem: 2-4
Reduce the following Boolean expressions to the indicated number of literals:
(a) A’C’ + ABC + AC’ to three literals
(b) (x’y’+z)’ + z + xy + wz to three literals
(c) A’B(D’+C’D) + B(A+A’CD) to one literal
(d) (A’+C)(A’+C’)(A+B+C’D) to four literals

Solution:

(a) A’C’ + ABC + AC’ = A’C’ + AC’ + ABC


= C’(A’+ A) + ABC
= C’∙1 + ABC
= C’ + ABC
= (C’+ AB)(C’+C) [distributive]
= AB + C’

(b) (x’y’+z)’ + z + xy + wz = (x’y’+z)’ + z + wz + xy


= (x’y’+z)’ + z(1+ w) + xy
= (x’y’+z)’ + z + xy
= (x + y)z’ + z + xy [DeMorgan]
= (z + (x + y)) ∙ (z + z’) + xy
[distributive]
= (z + (x + y)) ∙ 1 + xy
= x + y + z + xy
=x+y+z [absorption]

(c) A’B(D’ + C’D) + B(A+A’CD) = A’BD’ + A’BC’D + AB+ A’BCD


= A’BD(C+C’)+ A’BD’+ AB
= A’BD+ A’BD’+ AB
= A’B(D+D’)+ AB
= A’B+ AB
= B(A’+ A)
= B

(d) (A’+C)(A’+C’)(A+B+C’D) = (A’+C)(A’+C’)(A+B+C’D)


= (A’ + CC’)(A + B + C’D)
= A’(A + B + C’D)
= A’A + A’B + A’C’D
= A’B + A’C’D
= A’(B + C’D)

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Problem 2-5:
Find the complement of F = x + yz ; then show that FF ′ = 0 and F + F′ = 1
Solution:
F = x + yz
The dual of F is: x • ( y + z )

Complement each literal: x • ( y + z ) = F


′ ′ ′ ′

FF ′ = ( x + yz) • ( x′ • ( y ′ + z ′ ) ) = ( xx′ + x′yz) • ( y ′ + z ′ ) = x′yz • ( y ′ + z ′ ) = x′yy ′z + x′yzz ′ = 0


F + F ′ = ( x + yz ) + ( x′ • ( y ′ + z ′ ) ) = ( x + yz + x′ ) + ( x + yz + y ′ + z ′ ) = (1 + yz ) + ( x + yz + y ′ + z ′ )
= 1 + ( x + yz + y ′ + z ′ ) = 1

Problem 2-8:

List the truth table of the function:


F = xy + xy ′ + y ′z

Solution:
The truth table is:

x y Z F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1

Page 3 of 6
Problem 2-10:
Draw the logical diagrams for the following Boolean expressions:
(a)Y=A’B’+B(A+C).

(b)Y=BC+AC’.

(c) Y=A+CD.

(d)Y=(A+B)(C’+D).

Page 4 of 6
Problem 2-15
Given the Boolean function F=xy’z+x’y’z+w’xy+wx’y+wxy.
(a)Obtain the truth table of the function.
(b)Draw the logical diagram using the original Boolean expression.
(c) Simplify the function to a minimum number of literals using Boolean algebra.
(d)Obtain the truth table of the function using the simplified expression.
(e) Draw the logical diagram from the simplified expression and compare the total
number of gates with the diagram of part (b).

Solutions:
(a) The truth table of the function:
X Y z w F F(simplified)
0 0 0 0 0 0
0 0 0 1 0 0
0 0 1 0 1 1
0 0 1 1 1 1
0 1 0 0 0 0
0 1 0 1 1 1
0 1 1 0 0 0
0 1 1 1 1 1
1 0 0 0 0 0
1 0 0 1 0 0
1 0 1 0 1 1
1 0 1 1 1 1
1 1 0 0 1 1
1 1 0 1 1 1
1 1 1 0 1 1
1 1 1 1 1 1

(b) The logic diagram:

(c) The simplified function:


F =XY’Z+X’Y’Z+ WXY + W’XY+ WX’Y
=Y’Z (X+X’) +XY (W+W’) + WX’Y

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=Y’Z+ XY+ WX’Y

(d) The truth table of the simplified function has been added in the truth table of (a)
as F(simplified)

(e) Logic circuit for simplified function

For 1st design there are 5 AND gates with 3 inputs and 1 OR gate with 5 inputs.
For 2nd design there are 2 AND gates with 2 inputs and 1 OR gate with 3 inputs and 1
AND gate with 3 inputs.

Page 6 of 6

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