CHE2111L Exp5-10 LabManuals
CHE2111L Exp5-10 LabManuals
Faculty of Engineering
Electronics Engineering Department
1st Term, AY 2023 – 2024
EXPERIMENT 6
BIPOLAR JUNCTION TRANSISTOR CONFIGURATIONS
III. Discussion:
Common emitter (CE) configuration provides amplification to both current and voltage.
Thus, the power amplification is much higher than other configurations. It is the most widely
used BJT configuration. The emitter terminal is the reference terminal to both input (base) and
output (collector) terminals (see Fig. 6-1). A common emitter amplifier's input resistance is
typically in medium-range, and the output resistance commonly in the medium to high range.
Materials:
DC Power Supply
Function generator
Resistors(Ω): 51k, 6.8k, 8.2k, 1k(2), 3.3k, 18k, 3.9k, 6.2k
Capacitors(F): 10u(2), 47u, 22u(2)
Oscilloscope
Oscilloscope Probe
Multimeter
Transistors: 2N2222, 2N3904
IV. Procedure:
1. Construct the circuit as shown in Figure 6-2. Set the DC voltage (Vcc) to 22V using the
power supply and use 2N2222 transistor.
4. Construct the circuit as shown in Figure 6-3. Set Vs to 100mVp-p sine wave with a
frequency of 1KHz using the function generator.
5. Measure the peak-to-peak input voltage using the oscilloscope and take an image of the
result. Record the result in Table 6-2.
NOTE: Take the cursor measurement starting at the 3rd cycle.
Vin = ___________Vp-p
6. Measure the peak-to-peak output voltage using the oscilloscope and take an image of the
result. Record the result in Table 6-2.
Vout = ___________Vp-p
7. Compute the voltage gain using the equation Av = Vout/Vin. Record the result in Table
6-2.
8. What is the phase difference between the input and output voltages? Place your answer
in Table 6-2.
The next steps involve measuring the input and output resistance of the amplifier.
The input current 𝐼𝑖𝑛 is equal to the current in resistor R3, 𝐼𝑅3.
The output current 𝐼𝑜𝑢𝑡 is equal to the current in the resistor Rc, 𝐼𝑅𝐶.
Note: The input and output resistance measured here is based on a specific input frequency.
Another approach is to perform an AC Analysis to determine the values of the input and
output resistance at different input frequencies.
1. Construct the circuit as shown in Figure 6-5. Set the DC voltage (Vcc) to 10V using the
power supply and use 2N23904 transistor.
2. Measure the base, collector, emitter, base-emitter and collector-emitter voltages, VB, VC,
VE, VBE and VCE respectively using multimeter. Record the results in Table 6-4.
3. Measure the currents IB, IC and IE using multimeter and compute for the current gain, γ.
Record the results in Table 6-4.
4. Construct the circuit as shown in Figure 6-6. Set Vs to 10mVp-p sine wave with a
frequency of 1KHz using the function generator.
5. Measure the peak-to-peak input voltage using the oscilloscope and take an image of the
result. Record the result in Table 6-5
NOTE: Take the cursor measurement starting at the 3rd cycle.
Vin = ___________Vp-p
6. Measure the peak-to-peak output voltage using the oscilloscope and take an image of the
result. Record the result in Table 6-5.
Vout = ___________Vp-p
7. Compute the voltage gain using the equation Av = Vout/Vin. Record the result in Table
6-5.
8. What is the phase difference between the input and output voltages? Place your answer
in Table 6-5.
The input current 𝐼𝑖𝑛 is equal to the current in capacitor C1, 𝐼𝐶1.
The output current 𝐼𝑜𝑢𝑡 is equal to the current in the resistor Re, 𝐼𝑅𝐸.
Note: The input and output resistance measured here is based on a specific input frequency.
Another approach is to perform an AC Analysis to determine the values of the input and
output resistance at different input frequencies.
1. Construct the circuit as shown in Figure 6-8. Set the DC voltage (Vcc) to 22V using the
power supply and use 2N2222 transistor.
2. Measure the base, collector, emitter, base-emitter and collector-emitter voltages, VB, VC,
VE, VBE and VCE respectively using multimeter. Record the results in Table 6-7.
3. Measure the currents IB, IC and IE using multimeter and compute for the current gain, α.
Record the results in Table 6-7.
4. Construct the circuit as shown in Figure 6-9. Set Vs to 10mVp-p sine wave with a
frequency of 1KHz using frequency generator.
5. Measure the peak-to-peak input voltage using the oscilloscope and take an image of the
result. Record the result in Table 6-8.
NOTE: Take the cursor measurement starting at the 3rd cycle.
Vin = ___________Vp-p
6. Measure the peak-to-peak output voltage using the oscilloscope and take an image of the
result. Record the result in Table 6-8.
Vout = ___________Vp-p
7. Compute the voltage gain using the equation Av = Vout/Vin. Record the result in Table
6-8.
8. What is the phase difference between the input and output voltages? Place your answer
in Table 6-8.
The input current 𝐼𝑖𝑛 is equal to the current in resistor R1, 𝐼𝑅1.
The output current 𝐼𝑜𝑢𝑡 is equal to the current in the resistor R3, 𝐼𝑅3.
Note: The input and output resistance measured here is based on a specific input frequency.
Another approach is to perform an AC Analysis to determine the values of the input and
output resistance at different input frequencies.
Reference Material:
[1] R. Boylestad, L. Nashelsky, Electronics Devices and Circuit Theory 11th Edition, Pearson Education, 2013
EXPERIMENT 7
JUNCTION FIELD EFFECT TRANSISTOR: OPERATION AND ITS
CHARACTERISTIC CURVE
The Junction Field-Effect Transistor (JFET), which is one type of Field Effect Transistor, is a
three terminal device used for a variety of applications that match those of Bipolar Junction
Transistors. However, JFETs, unlike BJTs are voltage controlled and unipolar devices. The
output current and output voltage of JFETs are determined by an input voltage rather than an
input current. Unipolar devices are electronic devices whose current is due mainly to free
electrons or holes, but not both.
JFET has two types, the n-channel and the p-channel. Both of which has three terminals. The
terminals are the following: DRAIN, SOURCE and GATE.
JFET has two distinct modes of operation: the variable-resistance mode, and the pinch-off mode.
● In the variable-resistance mode, a JFET behaves like a resistor whose value is controlled
by VGS.
● In the pinch-off mode, the channel has been heavily constricted with most of the drain-
source voltage drop occurring along the narrow and therefore high-resistance part of the
channel near the depletion regions.
Depletion Region D
P P
VDS = 0V
ID
VGS = 0V
S
Referring to Fig. 7-3, the DC supply sources VGS and VDS are variable; so first, let us assume that
the value of VGS and VDS is zero. At this point the JFET is in unbiased condition.
When the value of VDS is increased gradually while leaving VGS = 0, electrons will start to flow
from the Source going to the Drain, and conventional current will be from Drain to Source. The
drain current is called ID. Under proper biasing conditions, the drain current and source current
are equal while the gate current is practically zero. While the value of V DS is increasing, the
width of the depletion region is also increasing. When the value of V DS is further increased while
leaving VGS = 0, the amount of ID also increases until it reaches the Drain to Source saturation
current (IDSS).
At this point, let us discuss IDSS and VP. All JFETs have a constant value for both parameters
which could be found from the specification sheet of the device. IDSS is called Drain to Source
saturation current (when VGS = 0 volt). The drain current becomes equal to IDSS when the two
depletion regions touch each other. Vp, which is also called pinch off voltage (when V GS = 0), is
equal to the drain to source voltage at which the two depletion regions initially touch each other
while VDS is increasing. The drain current practically remains equal to IDSS when VDS becomes
equal or higher than Vp. The magnitude of Vp is equal to the magnitude of the minimum gate to
source voltage (VGSoff) required to make the drain current equal to zero.
Example: the specific JFET in figures 7-3 and 7-4 has I DSS = 8 milliamperes and Vp=6 volts
ID=IDSS=8mA
P P
VDS = 6V
VGS = 0V
Going back, when the value of VDS reaches the pinch off voltage when VGS = 0, the Drain current
ID becomes equal to IDSS. As shown in Fig. 7-4, the two depletion regions touch each other under
this condition. This condition is what we call Pinch-off condition.
Let us analyze if VGS is not zero. If VGS is set to negative 1 volt, the voltage needed for VDS to
achieve pinch-off will now decrease from |Vp| to |Vp |-|VGS|, which is 5 volts in our example.
This is because there are now two voltages which are making the PN junctions reverse biased.
Since pinch-off condition is reached earlier if VGS = -1 V than when VGS = 0 V, the saturation
drain current when VGS = -1 volt is lower than IDSS, which is the saturation drain saturation when
VGS= 0 volt.
COMPONENTS:
Junction Field Effect Transistor: 2N3819, 2N5484
Resistors: 1KΩ, 100KΩ
REQUIREMENTS:
1. LTspice asc and error log file
2. Accomplished report form
IV. Procedure:
1. Construct the circuit shown in Figure 7-5 using 2N3819 transistor.
Fig. 7-5
Figure 7-6
8. Sweep the value of Vdd from 0 to 20 V, then Vgg from 0 to 5 V using nested DC sweep
analysis. Increment Vdd and Vgg by 1 V and 0.5 V, respectively.
9. Set your x-axis plot as the drain-to-source voltage V(VDS) and measure the drain current,
Id(J1). You should see your n-channel JFET characteristic curve series.
10. Paste a picture of the characteristic curve and put your comments on Table 7.2
11. To determine the cut-off voltage (magnitude of Vgs,off = magnitude of Vp) of your
transistor,
a. decrease the step size of your DC voltage source V gg; then,
b. adjust the y-axis plot range until you see the region when Id = 0 A (cut-off region).
c. you can also maximize the plot panes to better see V GSoff.
12. Paste a picture of the curves used to determine VGSoff and put your comments on Table
7.3. Put the value of VGSoff on Table 7.3.
13. Repeat all steps using a 2N5484 n-channel JFET, but this time use Table 7.4, Table 7.5
and Table 7.6.
EXPERIMENT 8
OPERATIONAL AMPLIFIER
Figure 8-1
Operational amplifiers are popular in analog circuits and in control and instrumentation
applications.
Major advantages:
An ideal op-amp would have infinite voltage gain, infinite input impedance, and zero output
impedance. Typically, the input of an op amp is a differential amplifier, and it contains a number
of amplifier stages to achieve a very high voltage gain. Op amps have two inputs: Non-inverting
input (with + sign) and inverting input (with – sign). Only the voltage difference between the two
inputs are practically amplified by the op amp, and signals common to both inputs are only
slightly amplified. Op amps could have one output or two outputs and typically use a positive
and a negative power supply.
Figure 8-2
Figure 8-3
Figure 8-4
Double-ended output – two output pins are used. The two outputs are of opposite polarity
Figure 8-5
The output voltage of an op amp due to the voltage difference in the inputs and common voltage
in the inputs can be expressed as:
Figure 8-6
Figure 8-7
COMPONENTS:
Operational Amplifier: LM741/NS
Resistors: 10KΩ, 18KΩ
REQUIREMENTS:
1. LTspice asc and error log file
2. Accomplished report form
IV. Procedure:
1. Add LM741 operational amplifier in LTspice by following the steps below:
a. Visit https://www.ti.com/product/LM741. Go to Design & development tab and
download the LM741 PSpice Model. (Note: It is a PSpice model but it will still
work in LTspice.)
b. Unzip the file and place LM741.MOD file in the desired folder and copy the file
path.
c. Use the SPICE directive .include /<File_path>/LM741.MOD.
d. Search opamp2in the component list.
e. Modify the value of the component from opamp2 to LM741/NS. Then, click OK.
2. Construct the circuit below in LTSpice
Figure 8-8
3. Run the Run the simulation by using transient analysis from 0 s to 1 s with a step of 100
ms.
4. Plot the graph for each Vin and Vout using the same plot plane.
5. Compute for the actual gain using the formula Vout/Vin and the theoretical gain using the
formula for inverting amplifier.
6. Redo steps 3-5 using the values for R2 found in table 8.1 in the Data and Results sheet.
7. Construct the circuit below in LTSpice
Figure 8-9
8. Run the simulation by using transient analysis from 0 s to 1 s with a step of 100 ms.
9. Plot the graph for each Vin and Vout using the same plot plane.Asdasd
10. Compute for the actual gain using the formula Vout/Vin and the theoretical gain using the
formula for non-inverting amplifier.
11. Redo steps 8-10 using the values for R2 found in table 8.2 in the Data and Results sheet.
EXPERIMENT 9
OPERATIONAL AMPLIFIER APPLICATIONS: ADDER AND COMPARATOR
COMPONENTS:
Operational Amplifier: LM741/NS
DC Power Supply
Function generators (3x)
Resistors(Ω): 1k(4), 5k, and 4.7k
Oscilloscope
Oscilloscope Probes (2x)
Multimeter
Summing Amplifier/Adder
Used to combine/add the voltages present on two or more inputs into a single output voltage
Comparator
Operational amplifiers can be used to determine whether the input voltages is
greater than or less than the other input’s voltage (reference voltage). It can be used as a
voltage level detector or sine-to-square wave converter.
IV. Procedure:
Adder
1. Construct the circuit below.
Figure 9.1
2. Using the power supply, set the DC voltages, Vcc, to 5V and Vee -5V.
3. Using the oscilloscope, measure the peak voltage of the inputs V3, V4, and V5. Record
the results on your group report.
4. Take a screenshot of the graph of each input voltage and Vout. Record the results on your
group report.
5. Answer the Data and Results sheet questions to complete the needed information.
Comparator
Figure 9.2
2. Using the power supply, set the DC voltages, Vcc, to 5V and Vee -5V.
3. Measure the positive output voltage of the comparator using the oscilloscope. Record the
results on your group report.
4. Measure the negative output voltage of the comparator using the oscilloscope. Record the
results on your group report.
5. Take a screenshot of the Vout, Vin, and V (Vref) graph. Record the results on your group
report.
6. Answer the Data and Results sheet questions to complete the needed information.
1. Discuss the operation of a summing amplifier based on what you have learned from the
experiment.
2. Discuss the operation of an op-amp comparator based on what you have learned from the
experiment.
EXPERIMENT 10
OPERATIONAL AMPLIFIER APPLICATIONS: DIFFERENTIATOR AND
INTEGRATOR
COMPONENTS:
Operational Amplifier: LM741/NS
DC Power Supply
Function generator
Resistors(Ω): 10k, 100k, 100, and, 500
Capacitors(F): 4.7n, 0.1µ
Oscilloscope
Oscilloscope Probes (2x)
Multimeter
Differentiator
● The output is proportional to the rate of change of the input.
● Capacitor is in series with the input and a resistor is used as the feedback element.
Integrator
● The circuit performs mathematical integration of signals
● Capacitor is parallel to the shunt resistor
IV. Procedure:
Differentiator/Integrator
1. Construct the circuit below.
Figure 10.1
2. Set the DC voltages, Vcc, to 15V and Vee -15V, using the power supply.
3. Take a screenshot of the graph of Vin, V, and Vout. Record the results on your group
report.
4. Answer the Data and Results sheet questions to complete the needed information.