Realtek Semicon RTD2166 CG - C2891522
Realtek Semicon RTD2166 CG - C2891522
PRODUCT BRIEF
(CONFIDENTIAL: Development Partners Only)
Rev. 1.0
02 October 2015
Track ID: JATR-8275-15
COPYRIGHT
© 2015 Realtek Semiconductor Corp. All rights reserved. No part of this document may be
reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any
language in any form or by any means without the written permission of Realtek Semiconductor
Corp.
DISCLAIMER
Realtek provides this document ‘as is’, without warranty of any kind. Realtek may make
improvements and/or changes in this document or in the product described in this document at
any time. This document could include technical inaccuracies or typographical errors.
TRADEMARKS
Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this
document are trademarks/registered trademarks of their respective owners.
REVISION HISTORY
Revision Release Date Summary
1.0 2015/10/02 First release
Table of Contents
1. GENERAL DESCRIPTION............................................................................................................................................ 1
2. FEATURES ...................................................................................................................................................................... 1
3. SYSTEM APPLICATIONS............................................................................................................................................. 2
4. BLOCK DIAGRAM ......................................................................................................................................................... 2
5. PIN ASSIGNMENTS ...................................................................................................................................................... 3
6. PIN ASSIGNMENTS TABLE ........................................................................................................................................ 4
7. INTERFACES AND CAPABILITY ................................................................................................................................ 5
8. ELECTRICAL SPECIFICATIONS ................................................................................................................................ 7
8.1. Recommended Operating Conditions ................................................................................... 7
8.2. Absolute Maximum Ratings ..................................................................................................... 7
8.3. AC Characteristic ...................................................................................................................... 7
8.4. Power Sequence ....................................................................................................................... 9
8.5. Power Consumption ............................................................................................................... 10
9. MECHANICAL SPECIFICATIONS ............................................................................................................................. 11
10. ORDERING INFORMATION ........................................................................................................................................12
List of Tables
TABLE 1 PIN DEFINITION ............................................................................................................................................................. 4
TABLE 2 SUPPORTED POPULAR TIMING/ RESOLUTION.............................................................................................................. 6
TABLE 3 RECOMMENDED OPERATING CONDITIONS ...................................................................................................................... 7
TABLE 4 ABSOLUTE MAXIMUM RATINGS ..................................................................................................................................... 7
TM
TABLE 5 DISPLAYPORT MAIN LINK AC CHARACTERISTICS ................................................................................................... 8
TM
TABLE 6 DISPLAYPORT AUX-CH AC CHARACTERISTICS ..................................................................................................... 8
TABLE 7 POWER SEQUENCING REQUIREMENTS ........................................................................................................................ 9
TABLE 8 POWER CONSUMPTION BY USING EXTERNAL 1.2V, EXTERNAL CLOCK SOURCE, AND 3.3V HVSYNC_PWR ..... 10
TABLE 9 POWER CONSUMPTION BY USING EMBEDDED LDO, EMBEDDED CLOCK SOURCE, AND 5V HVSYNC_PWR ..... 10
TABLE 10 DIMENSIONS.............................................................................................................................................................. 11
TABLE 11 ORDERING INFORMATION............................................................................................................................................ 12
List of Figures
FIGURE 1. BLOCK DIAGRAM ....................................................................................................................................................... 2
FIGURE 2. PIN ASSIGNMENTS ...................................................................................................................................................... 3
FIGURE 3. POWER SEQUENCE ...................................................................................................................................................... 9
2. Features
General Built-in high performance adaptive
TM
2-lane VESA DisplayPort v1.3 compliant equalizer
receiver Support 1-MHz AUX channel
VGA output interface, DAC speed up to 210-MHz, Support HPD
8-bit
Max. resolution up to 1920x1200x60 (RB, VGA Output Interface
reduced blanking) with 24-bit color depth, Triple 8-bit DAC (Digital-to-Analog
1920x1440x60 (RB, reduced blanking) with Converter) with clock up to 210-MHz
18-bit color depth, or 2048x1152x60 (RB, Support up to 1920x1200x60,
reduced blanking) with 24-bit color depth, or 1920x1440x60 (reduced blanking),
2048x1536x60 (RB, reduced blanking) with 2048x1152x60 (reduced blanking), and
18-bit color depth. 2048x1536x60 (reduced blanking)
Embedded oscillator and there’s no need for the Embedded V-sync/ H-sync 5V buffer
external crystal HBM 8-KV for VGA connector pins
Embedded linear dropout regulator (LDO) VESA VSIS v1r2 compliant
Embedded MCU
Embedded EDID (RTD2166 will response EDID Embedded MCU
if terminal device doesn’t have it) Industrial standard 8051 core
2
Embedded V-sync/H-sync 5V buffer Support I C Master and Slave up to 400-KHz.
Support EEPROM Free mode by using the
internal pre-blew ROM
Power & Technology
3.3V system voltage
Programmable internal low-voltage-reset (LVR)
5V Option for V-sync/ H-sync 5V buffer
QFN32 4x4 package
Ultralow standby power < 100uW
HBM 8-KV for connector pins, and 4.0-KV
DisplayPortTM Digital Input
for the rest pins
Support 2-lane digital input, speed up to
RBR(1.62-Gbps) / HBR (2.7-Gbps)
TM
VESA DisplayPort v1.3 compliant
3. System Applications
Display System on laptop, motherboard, and desktop
Display System for dongle and docking system
4. Block Diagram
DisplayPort
LVR/POR DAC
Rx
CPU/GPU
AUX
EMCU DDC
Channel
VGA Sink
Internal
EMB. LDO VS/HS Gen
ROM
Embedded
BIST 5V Buffer
OSC
5. Pin Assignments
HVSYNC_PWR
VDD_DAC_33
GREEN_P
BLUE_P
HSYNC
VSYNC
RED_P
GND
24 23 22 21 20 19 18 17
VCCK_12 25 16 VGA_SDA
PVCC_33 26 15 VGA_SCL
LDO_RSTB 27 14 VCC_33
EXT_CLK_IN 28 13 GPI3/SPI_SO
SMB_SDA 29 12 GPI2/SPI_SI
SMB_SCL 30 11 GPI1/SPI_CLK
EXT1.2V_CTRL 31 RTD2166 10 POL1/SPI_CEB
HPD 32 9 POL2
1 2 3 4 5 6 7 8
AVCC_33
AUX_P
AUX_N
AVCC_12
LANE0_P
LANE0_N
LANE1_P
LANE1_N
1- Main Link
Two lanes differential pair capable of operating HBR (2.7-Gbps) and RBR (1.62-Gbps) data rates for
TM
high definition uncompressed video transmission. The main link is fully compliant with the DisplayPort
v1.3 specification.
2- AUX Channel
A differential half-duplex bi-directional channel used for side-band communication between the
TM
DisplayPort source and sink devices. The bandwidth of this link is up to 1-Mbps.
The most popular video formats supported by RTD2166 are shown in the following Table 2. However the
formats supported by RTD2166 are not limited to this table. Those formats with (a) the data transmission bandwidth
TM
lower than the maximal bandwidth of 2-lane DisplayPort HBR main-link and (b) the pixel frequency slower than the
maximal DAC speed 210-MHz can also be supported by RTD2166.
8. Electrical Specifications
8.1. Recommended Operating Conditions
Table 3 Recommended Operating Conditions
Parameter Symbol Min Typ Max Units
Voltage on Input (5V tolerant) VIN -1 - 5 V
HVSYNC_PWR 4.75 5 5.25 V
(5V Input)
HVSYNC_PWR 3.0 3.3 3.6 V
(3.3V Input)
VCC_33 3.0 3.3 3.6 V
Supply Voltage PVCC_33 3.0 3.3 3.6 V
AVCC_33 3.0 3.3 3.6 V
VDD_DAC_33 3.0 3.3 3.6 V
AVCC_12 1.14 1.2 1.26 V
VCCK_12 1.14 1.2 1.26 V
Output High Voltage VOH 2.4 - - V
Output Low Voltage VOL GND - 0.4 V
Input High Voltage VIH 2.0 - - V
Input Low Voltage VIL - - 0.8 V
Input Leakage Cur.(Vin=Vcc/GND) ILI -10 - +10 μA
Ambient Operating Temperature TA 0 - 70 ºC
Storage temperature (plastic) TSTG -55 - 125 ºC
Thermal Resistance (Junction to case thermal θJC - 21.2 - ºC/W
resistance)
Thermal Resistance (Junction to Air) θJA - 39.5 - ºC/W
Junction Acceptable Temperature Tj - - 125 ºC
8.3. AC Characteristic
TM
The DisplayPort receiver of RTD2166, as a standard DP v1.3 complaint Rx, follows the AC specification of
TM
DisplayPort v1.3 Standard. The related AC parameters are shown in the following two tables.
DisplayPortTM to VGA Converter 7 Track ID: JATR-8275-15 Rev. 1.0
RTD2166
Datasheet
TM
Table 5 DisplayPort Main Link AC Characteristics
Symbol Parameter Min Typ Max Unit
UI_HBR Unit interval for HBR(2.7-Gbps) - 370 - ps
UI_RBR Unit interval for RBR(1.62-Gbps) - 617 - ps
Down_Spread_Amp. Link clock down spreading 0 - 0.5 %
Differential peak-to-peak input voltage at
VRX-DIFFp-p 120 - - mV
RX package pins for HBR (2.7-Gbps)
Differential peak-to-peak input voltage at
VRX-DIFFp-p 40 - - mV
RX package pins for RBR (1.62-Gbps)
Minimum receiver eye width at Rx
TRX-EYE_CHIP 0.47 - - UI
package pins for HBR (2.7-Gbps)
Minimum receiver eye width at Rx
TRX-EYE_CHIP 0.22 - - UI
package pins for RBR (1.62-Gbps)
Max time between the jitter median and
TRX-MEDIAN-to-MAX-JITTER max. deviation from the median at Rx - - 0.265 UI
package pins for HBR (2.7-Gbps)
Max. time between the jitter median and
TRX-MEDIAN-to-MAX-JITTER max. deviation from the median at Rx - - 0.39 UI
package pins for RBR (1.62-Gbps)
VRX-DC-CM RX DC Common Mode Voltage 0 - 2.0 V
IRX-SHORT RX Short Circuit Current Limit - - 50 mA
TM
Table 6 DisplayPort AUX-CH AC Characteristics
Symbol Parameter Min Typ Max Unit
AUX (Manchester transaction) unit
UIMAN 0.4 0.5 0.6 us
interval
Pre-charge Number of pre-charge pulses 10 - 16 -
TAUX-BUS-PARK AUX CH bus park time 10 - - ns
Max. allowable UI variation within a
Tcycle-to-cycle jitter single transaction at connector pins of a - - 0.05 UI
Rx
AUX peak-to-peak voltage at a receiving
VAUX-DIFFp-p 0.32 - 1.36 V
device
VAUX_TERM_R AUX CH termination DC resistance - 100 - Ω
VAUX-DC-CM AUX DC common mode voltage 0 - 2.0 V
VAUX-TURN-CM AUX turn around common mode voltage - - 0.3 V
IAUX_SHORT AUX short circuit current - - 90 mA
CAUX AUX AC coupling capacitor 75 - 200 nF
Note 1: T2 is specified only when 1.2V comes from external power source.
Table 8 Power Consumption by Using External 1.2V, External Clock Source, and 3.3V HVSYNC_PWR
Active Resolution / Standby DP Config. Min Typ Max Unit
1024x768x60 (74.25-MHz) 1-Lane - 275 - mW
1600x900x60 (103-MHz) 1-Lane - 285 - mW
1920x1080x60 (148-MHz) 2-Lane - 315 - mW
Stand-by mode - - - 100 uW
Table 9 Power Consumption by Using Embedded LDO, Embedded Clock Source, and 5V HVSYNC_PWR
Active Resolution / Standby DP Config. Min Typ Max Unit
1024x768x60 (74.25-MHz) 1-Lane - 435 - mW
1600x900x60 (103-MHz) 1-Lane - 455 - mW
1920x1080x60 (148-MHz) 2-Lane - 550 - mW
Stand-by mode - - - 100 uW
Note: In practice, the measured power consumption might be slightly different from the tables above due to the
different video content and the different measurement equipment
9. Mechanical Specifications
Plastic Quad Flat No-Lead Package 32 Leads 4x4mm2 Outline
Table 10 Dimensions
Dimension in mm Dimension in inch
Symbol
Min Nom Max Min Nom Max
A 0.80 0.85 0.90 0.031 0.033 0.035
A1 0.00 0.02 0.05 0.000 0.001 0.002
A2 — 0.65 0.70 — 0.026 0.028
A3 0.20 REF 0.008 REF
b 0.15 0.20 0.25 0.006 0.080 0.010
D/E 4.00 BSC 0.157 BSC
D2/E2 2.55 2.70 2.85 0.096 0.106 0.116
e 0.40 BSC 0.016 BSC
L 0.30 0.40 0.50 0.012 0.016 0.020
L1 0.282 0.382 0.482 0.011 0.015 0.019
Notes:
1. CONTROLLING DIMENSION:MILLIMETER(mm).
2. REFERENCE DOCUMENTL:JEDEC MO-220.