3-Φ SiC/GaN Converter Systems

Johann W. Kolar et al.

Swiss Federal Institute of Technology (ETH) Zurich
Power Electronic Systems Laboratory
www.pes.ee.ethz.ch

Feb. 23, 2021

3-Φ SiC/GaN Converter Systems … There is No Under the Bed
Johann W. Kolar et al.
Swiss Federal Institute of Technology (ETH) Zurich
Power Electronic Systems Laboratory
www.pes.ee.ethz.ch
Feb. 23, 2021
 3-Φ SiC/GaN Converter Systems

… BUT Lots of Opportunities & Some Challenges ;-)

Johann W. Kolar | Jonas E. Huber | David Menzi
Swiss Federal Institute of Technology (ETH) Zurich
Power Electronic Systems Laboratory
www.pes.ee.ethz.ch
Feb. 23, 2021
 1/40

Outline
► Introduction
► Performance Trends
► 10x –Technologies / Concepts
► Research Results
M. Antivachis
► Conclusions J. Azurza
D. Bortis
D. Cittante
M. Guacci
M. Haider
F. Krismer
S. Miric
J. Miniböck
N. Nain
P. Niklaus
G. Rohner
J. Schäfer
Acknowledgement D. Zhang
 Power Electronic Systems @ ETH Zurich

Industry Relations Adv. Mechatronic Systems

R. Coccia Johann W. Kolar D. Bortis

AC-DC AC-AC DC-DC DC-AC Multi-Domain Measurement Advanced Magnetic

Converter Converter Converter Converter Modeling Technology Mechatronics Levitation

J. Huber F. Krismer D. Bortis F. Krismer D. Bortis D. Bortis

M. Heller J. Schäfer
N. Nain J. Azurza P. Czyz R. Giuffrida I. Bagaric
Y. Li M. Haider P. Bezerra J. Böhler P. Papamanolis P. Niklaus S. Miric R. Bonetti
D. Zhang D. Menzi G. Knabben G. Rohner M. Röthlisberger E. Hubmann

Secretariat Accounting Computer Systems Electronics Laboratory

M. Kohn / Y. Schnyder P. Maurantonio M. Eisenstat P. Seitz

Leading Univ.
20 Ph.D. Students in Europe
1 PostDoc
3 Research Fellows
Research Scope

Power Cross-Disciplinary
Electronics
Mechanical Eng., e.g.
Turbomachinery, Robotics
Microsystems
Medical Systems

Actuators /
El. Machines

• Explore the Limits / Create New Concepts / Push the Envelope

• Maximize Technology Utilization
• Enable New Applications
Market Pull / Technology Push
 1/84

Required Performance Improvements

Environmental Impact… [kgFe /kW]

[kgCu /kW]
[kgAl /kW]
[cm2Si /kW]

►
─ Power Density [kW/dm3]
─ Power per Unit Weight [kW/kg] ►
─ Relative Costs [kW/$]
─ Relative Losses [%]
─ Failure Rate [h-1]

• Connected Cognitive Power Electronic Systems  Power Electronics 4.0

 2/84

S-Curve of Power Electronics

■ Power Electronics 1.0  Power Electronics 4.0
■ Identify “X-Concepts” / “Moon-Shot” Technologies
■ 10 x Improvement NOT Only 10% !

Performance

4.0

► Super-Junct. Techn. / WBG

► Digital Power
Modeling & Simulation 3.0

► Power MOSFETs & IGBTs

► Circuit Topologies
Microelectronics
► Modulation Concepts 2.0
Control Concepts
SCRs / Diodes
Solid-State Devices
1.0
■ 2025
1958 2015
 3-Φ Variable Speed Drive
Inverter Systems
State-of-the-Art
Future Requirements

Source:
PowerAmerica
 3/84

Variable Speed Drive (VSD) Systems

■ Industry Automation / Robotics
■ Material Machining / Processing – Drilling, Milling, etc.
■ Compressors / Pumps / Fans
■ Transportation
■ etc., etc. …. Everywhere !
Source:

● 60…70 % of All Electric Energy Used in Industry Consumed by VSDs

 4/84

State-of-the-Art
■ Mains Interface / 3-Φ PWM Inverter / Cable / Motor — Large Installation Space / Complicated
■ Conducted EMI / Radiated EMI / Reflections on Long Motor Cables / Bearing Currents

Source: FLUKE

● High Performance @ High Level of Complexity / High Costs (!)

 5/84

Surge Voltage Reflections

■ Long Motor Cable lc ≥ ½ tr v
■ Short Rise Time of Inverter Output Voltage
■ Impedance Mismatch of Cable & Motor  Reflect. @ Motor Terminals / High Insul. Stress

SiC Source: Bakran / ECPE 2019


 dv/dt- OR Full-Sinewave Filtering / Termination & Matching Networks etc.
 6/84

Motor Bearing Currents

■ Switching Frequency CM Inverter Output Voltage  Motor Shaft Voltage
■ Electrical Discharge in the Bearing (“EDM”)

Source: www.est-aegis.com
Source:
Switchcraft

Source:
BOSCH

 Cond. Grease / Ceram. Bearings / Shaft Grndg Brushes / dv/dt- OR Full-Sinewave Filters
 7/84

VSD Inverter - Future Requirements

■ “Non-Expert” Installation / “Sinus-Inverter” OR Motor-Integrated Inverter
■ Low Losses & Low HF Motor Losses
■ Low Volume & Weight
■ Wide Output Voltage Range
■ High Output Frequencies
Source:

● Main “Enablers”  SiC/GaN Power Semiconductors & Adv. Inverter Topologies

X-Technology #1 Wide Bandgap
Power Semiconductors
 8/84

Si vs. SiC
■ Si-IGBT / Diode  Const. On-State Voltage, Turn-Off Tail Current & Diode Reverse Recovery Current
■ SiC-MOSFET  Massive Loss Reduction @ Part Load BUT Higher Rth

6x Si-IGBT 6x SiC-MOSFET
6x Si-Diode

Source:
ATZ elektronik
2018

1200V 100A 1200V 100A

Die Size: 98.8mm2 + 39.4mm2 Die Size: 25.6mm2
Source: Cree

● Space Saving of >30% on Module Level (!)

 9/84

Low RDS(on) High-Voltage Devices

■ Higher Critical E-Field of SiC  Thinner Drift Layer
■ Higher Maximum Junction Temperature Tj,max

For 1kV:




● Massive Reduction of Relative On-Resistance  High Blocking Voltage Unipolar Devices

 10/84

Si vs. SiC Conduction Behavior

■ Si-IGBT  Const. On-State Voltage Drop / Rel. Low Switching Speed,
■ SiC-MOSFETs  Resistive On-State Behavior / Factor 10 Higher Sw. Speed

1200V 100A 1200V 100A

Die Size: 98.8mm2 + 39.4mm2 Die Size: 25.6mm2
Source: Infineon Source: Cree

● Efficiency Characteristic Considering Only Conduction Losses

 11/84

Si vs. SiC Switching Behavior

■ Si-IGBT  Const. On-State Voltage Drop / Rel. Low Switching Speed,
■ SiC-MOSFETs  Resistive On-State Behavior / Factor 10 Higher Sw. Speed

Source: Fuji Electric

1200V 100A 1200V 100A

Die Size: 98.8mm2 + 39.4mm2 Die Size: 25.6mm2
Source: Infineon Source: Cree

● Extremely High di/dt & dv/dt  Challenges in Packaging / EMI / Motor Insulation / Bearing Currents
Challenges
 12/84

Circuit Parasitics

■ Extremely High di/dt
■ Commutation Loop Inductance LS 
■ Allowed Ls Directly Related to Switching Time ts   

Parallel
Connection


● Advanced Packaging & Parallel Interleaving for Partitioning of Large Currents

 13/84

Si vs. SiC EMI Emissions

■ Higher dv/dt  Factor 10
■ Higher Switching Frequencies  Factor 10
■ EMI Envelope Shifted to Higher Frequencies

fS= 10kHz & 5 kV/us for (Si IGBT)

fS= 100kHz & 50 kV/us for (SiC MOSFET) Si
SiC
VDC = 800V
DC/DC @ D= 50%

● Higher Influence of Filter Component Parasitics & Couplings  Advanced Design

Inverter Output Filters
dv/dt-Filters
Full-Sinewave Filters
dv/dt-Control
 14/84

Passive | Hybrid | Active dv/dt-Limitation

■ Passive – Damped LC-Filter fC > fS
■ Hybrid – Undamped LC-Filter & Multi-Step Sw. Transition
■ Active – Gate-Drive Based Shaping of Sw. Transients
fsw = 16kHz
tR= tF= 130ns
fC = 2.4 MHz
!

● Connection to DC-Minus & CM Inductor  Limit CM Curr. Spikes / EMI / Bearing Currents
 15/84

Comparison of dv/dt-Filtering Techniques (1)

■ Passive Concept ■ Hybrid Concept (3fS) ■ Active Concept
1. LCR-Filter 1. LC-Filter 1. Miller Capacitor
2. Clamped LC-Filter 2. Multi-Step Switching 2. Gate Curr. Control

■ Output Voltage Waveforms — VDC = 800V, Pout = 10kW, 6kV/us 1200V SiC / 16mΩ
CM = 120pF

L = 3.8uH L = 4.1uH
C = 2.7nF C = 1.3nF
R = 19Ω
 16/84

Comparison of dv/dt-Filtering Techniques (2)

● Comparative Evaluation of
Passive & Active Concept

■ Losses / Power Density – VDC = 800V, Pout = 10kW, fsw = 16kHz, 1200V SiC-MOSFETs (16mΩ)
 Inverter Systems w/
Sinusoidal Output Voltages
 17/84

ZVS/TCM Operation
■ Sinusoidal Output Voltage
■ ZVS of Inverter Bridge-Legs
■ High Sw. Frequency & TCM  Low Filter Inductor Volume

● Only 33% Increase of Transistor Conduction Losses Compared to CCM (!)

● Very Wide Switching Frequency Variation
 18/84

TCM  B-TCM
■ Very Wide Switching Frequency Variation of TCM  B-TCM

● TCM  B-TCM — 10% Further Increase of Transistor Conduction Losses

 19/84

B-TCM  S-TCM
■ Sinusoidal Switching Boundaries  S-TCM
■ Adaption for Low Output Power Considering fsw,max= 140kHz

● TCM  S-TCM ≈ 10% Further Increase of Transistor Conduction Losses

 20/84

Residual ZVS Losses

■ Overlap of uDS & Channel Current ich @ High Isw > Ik
■ Temporary Turn-on Due to uGS,i > uth
650V SiC, UDC = 400V

● “Kink” Current IK Dependent on Inner & Outer Gate Resistance & ug,n
 21/84

CCM & 2-Stage Full-Sinewave Output Filter (1)

■ Sinewave Output & IEC/EN 55011 Class-A
■ Low-Loss Active Damping of 1st Filter Stage — Neg. Cap. Current Feedback
■ 2kW / 400V DC-Link 3-Φ 650V GaN Inverter (IM=5A), fout,max = 500Hz
■ Sw. Frequency fS= 100kHz
H. Ertl et al.
(2018)

fC,1=7kHz

fC,2=20kHz

 Evaluation of Optimized Inductors — Soft Sat. Toroidal Iron Powder Cores

 L1=200uH (OD57S) / C1=2.5uF / L2=25uH (OD20S) / C2=2.5uF / Ld=33uH / Rd=5.6Ω
 22/84

CCM & 2-Stage Full-Sinewave Output Filter (2)

■ Exp. Verification — 650V E-Mode GaN Systems Transistors (50mΩ)
■ Sw. Frequency fS= 100kHz, Efficiency ≈98%
■ 200mm x 250mm

iC Measurement


● Stationary Motor Phase Curr. /Voltage @ 2.5Nm & fout=250Hz

● Speed Increase from Standstill to n = 3000rpm in 60ms
 23/84

CCM & 2-Stage Full-Sinewave Output Filter (3)

■ Modification of Output Filter Structure
■ Elimination of Direct Cap. Coupling Between Output and Noisy (!) DC+ (Due to RDC)
■ For Opt. iC -Feedback C1 Realized Using ≈Linear Kemet KC-Link

symmetric

modified

! Symmetric Filter
Modified Filter

● Modified Filter  Compliance to EMI Standard EN55011 Class-A

X-Technology #2 Multi-Level / -Cell
Converters & Modularity
 24/84

Multi-Level (ML) Converter Scaling

■ 1/N Reduction of Blocking Voltage  Lower RDS,(on) Semiconductors (Ron‘~ UB2)
■ Eff. Increase of Sw. Frequency  fsw,eff = N fsw (fsw … Individual Device)
■ Larger Chip Area and/or Smaller LO

N= # of Levels -1
# of Levels= 2

#=3

# =5

# =7

● D-FOM = D-FOM(Udc/N)  Results in ML-Performance (X-FOM) Dependent on N

 25/84

Functional Principle of ML-Converters

■ 3-Level Flying Cap. (FC) Converter Requires No Connection to DC-Midpoint
■ Involves All Switches in Voltage Generation  Eff. Doubles Device Sw. Frequency
■ FC Voltage Balancing Possible also for DC Output

● Risk of Transistor Overvoltage for Steep Udc Changes

 26/84

Scaling of ML Bridge-Leg Concepts

■ Reduced Ripple @ Same (!) Switching Losses
■ Lower Overall On-Resistance @ Given Blocking Voltage  1+1=2 NOT 2 2 = 4 (!)
■ Application of LV Technology to HV

   



 ! !
fsw
● Scalability / Manufacturability / Standardization / Impedance Matching / Redundancy
 27/84

X-FOM of ML-Bridge-Legs
■ Quantifies Bridge-Leg Performance of N-Level FC Converters
■ Identifies Max. Achievable Efficiency & Loss Opt. Chip Area @ Given Sw. Frequ.

N= # of Levels -1

     
 

● Compared to 2-Level Benchmark  Psemi,min,ML ≈ 1/N1.2 Psemi,min,2L

@ Same Filter Ind. Volt-Seconds Achip,ML ≈ N1.2Achip,2L
 28/83

7-Level Flying Cap. 200V GaN Inverter (1)

■ DC-Link Voltage 800V
■ Rated Power 2.2 kW / Phase
■ 99% Efficiency  Natural Convection Cooling (!)

260 W/in3

● High Effective Sw. Frequency (6 x 30kHz = 180kHz)  Small Filter Inductor LO

 29/84

7-Level Flying Cap. 200V GaN Inverter (2)

■ DC-Link Voltage 800V
■ Rated Power 2.2 kW / Phase
■ 99% Efficiency  Natural Convection Cooling (!)

260 W/in3

● High Effective Sw. Frequency (6 x 30kHz = 180kHz)  Small Filter Inductor LO

 30/84

3-Φ Hybrid Multi-Level Inverter Demonstrator

■ Realization of a 99%++ Efficient 10kW 3-Φ 400Vrms,ll Inverter System
■ 7-Level Hybrid Active NPC Topology / LV Si-Technology

99.35%
2.6kW/kg
56 W/in3

● 200V Si  200V GaN Technology Results in 99.5% Efficiency

 Quasi-2L/3L
Flying Capacitor Inverter
 31/84

Quasi-2L & Quasi-3L Inverters (1)

■ Operation of N-Level Topology in 2-Level or 3-Level Mode
■ Intermediate Voltage Levels Only Used During Sw. Transients
■ Applicability to All Types of Multi-Level Converters

- Schweizer (2017)

Q2L Q3L

● Reduced Average dv/dt  Lower EMI / Lower Reflection Overvoltages

● Clear Partitioning of Overall Blocking Voltage & Small Flying Capacitors
● Low Voltage/Low RDS(on)/Low $ MOSFETs  High Efficiency / No Heatsinks / SMD Packages
 32/84

Quasi-2L & Quasi-3L Inverters (2)

■ Operation of 5L Bridge-Leg Topology in Quasi-3L Mode
■ Intermediate Voltage Levels Only Used During Sw. Transients
■ Applicability to All Types of Multi-Level Converters
3.3kW @ 230Vrms /50Hz
- Schweizer (2017) Equiv. fS= 48kHz
3.5kW/dm3
Eff. ≈ 99%

EMI Filter

● Reduced Average dv/dt  Lower EMI / Lower Reflection Overvoltages

● Clear Partitioning of Overall Blocking Voltage & Small Flying Capacitors
● Low Voltage/Low RDS(on)/Low $ MOSFETs  High Efficiency / No Heatsinks / SMD Packages
 33/84

Quasi-2L & Quasi-3L Inverters (3) - Schweizer (2017)

■ Operation of 5L Bridge-Leg Topology in Quasi-3L Mode

■ Intermediate Voltage Levels Only Used During Sw. Transients
■ Applicability to All Types of Multi-Level Converters

Operation @ 3.2kW

— Conv. Output Voltage — Output Current

— Sw. Stage Output Voltage — Conv. Side Current
— Flying Cap. (FC) Voltage
— Q-FC Voltage (Uncntrl.)

● Reduced Average dv/dt  Lower EMI / Lower Reflection Overvoltages

● Clear Partitioning of Overall Blocking Voltage & Small Flying Capacitors
● Low Voltage/Low RDS(on)/Low $ MOSFETs  High Efficiency / No Heatsinks / SMD Packages
 Ultra-Compact
Power Module with
Integrated Filter
650V GaN E-HEMT Technology
fS,eff= 4.8MHz
fout = 100kHz
 34/84

Integrated Filter GaN Half-Bridge Module

■ Minimization of Filter Volume by Series & Parallel Interleaving & Extreme Sw. Frequency
■ Handling of DC Output Requires Flying Capacitor Approach for Series Interleaving

fS,eff= (M-1) ∙ fS

M=5

fS,eff= N ∙ fS

N=4

 Target: Best Combination of Multiple Levels (M) & Parallel Branches (N)
 35/84

4.8MHz GaN Half-Bridge Phase Module

■ Combination of Series & Parallel Interleaving
— 600V GaN Power Semiconductors, fsw= 800kHz
— Volume of ≈180cm3 (incl. Control etc.)
— H2O Cooling Through Baseplate
≈ 820 W/in3

● Operation @ fout=100kHz / fS,eff= 4.8MHz, 10kW, Udc=800V

 36/84

High-BW High-CMRR Current Measurement

■ Extension of Commercial Hall Sensor DC … fHall≈ 500kHz  DC … 20MHz
■ Low-Pass & High-Pass Filter Network Combining HF-Sensor & LF Hall-Sensor

● Hall Sensor Bandwidth fHall = 1.6MHz

● Rogowski Coil High-Pass Corner Frequency fint=1kHz
● Low/High-Pass Filter Cross-Over Network ffilter = 24kHz
Motor-Integrated
Inverter Systems
 37/84

Stacked-Multi-Cell (SMC) Inverter

■ Fault-Tolerant VSD
■ Low-Voltage Inverter Modules
■ Very-High Efficiency / Power Density
■ Automated Manufacturing

■ Rated Power 45kW / fout = 2kHz

■ DC-Link Voltage 1 kV

● Smart Motor / Plug & Play | Connected / Intelligent VSD 4.0

 38/84

Motor-Integrated SMC 200V GaN-Inverter

■ Rated Power 9kW @ 3700rpm
■ DC-Link Voltage 650V…720V
■ 3-Φ Power Cells 5+1
■ Outer Diameter 220mm

— Axial Stator Mount

— 200V GaN e-FETs
— Low-Capacitance DC-Links
— 45mm x 58mm / Cell

● Main Challenge — Thermal Coupling/Decoupling of Motor & Inverter

 39/84

Double-Bridge (DB) Inverter

■ Comparison to Conv.
2-Level Inverter + Front-End Ub = 40V…120V
DC/DC Boost-Stage P = 1.0kW
fs = 300kHz (200V EPC GaN)
fo = 5kHz

210 W/in3

1
2U

● Advantages — Lower Sw. Losses & Lower # of Filter Inductors 98 W/in3

 40/84

Turbo-Compressor-Integrated DB GaN-Inverter
■ E-Mobility 5…15kW Fuel Cell Pressurized Air Supply
■ 1kW Rated Power, fsw=300kHz | n= 280‘000rpm / fout= 4.6kHz
■ Low EMI / Low Cabling Effort

UFC

Power Control electronics – Control Battery start

Cooling water
PMSM electronics power electronics electronics switch (not
channels Power connection Battery start visible)
semiconductors diode
ia ib ic Compressor
ULV outlet Power electronics -
electronical connector
Motor
connection
stator

Thrust
battery start circuit id bearing
abc
dq
iq Electrical
ε
ω connector
Observer
Compressor
id*=0 dq ua* inlet
Output Motor - power
ud* ub* filter
Modulator electronics
ω* uc*
Impeller Rotor connection
iq* uq* abc Cooling water inlet
speed current Journal gas bearing Cooling water outlet
controller controller

● Integration  2x System Power Density | 97%  98.5% Inverter Efficiency

 41/84

3-Φ 650V GaN Motor-Integrated Inverter Source:

■ Sigma-7F Servo Drive — Motor Integration of DC/AC Stage (TO-220 GaN)

■ Distributed DC-Link System — Single AC/DC Converter / Smaller Cabinet
■ 0.1 – 0.4kW / 270…324V Nominal DC-Link Voltage

DC Power
Network

Inverter
Stage
Cabinet

● Small Size (0.4 kW @ 70 x 70x 170mm)

● Massive Saving in Cabling Effort / Simplified Installation
Overload | Thermal Limit
 42/84

Overload Capability
■ Highly Dynamic Robotics VSDs  3x … 5x Rated Torque for Seconds
■ Small Chip Area  Low Thermal Time Constant of GaN HEMTs
■ Trade-Off Between Overload Rating & Rated Power Efficiency

● 200V GaN vs. Si (Multi-Level Inverter) Comparison

X-Technology #3 Functional Integration &
Synergetic Association
 43/84

Motivation
■ General / Wide Applicability
— Adaption of (Load-Dependent) Supply Voltage & Motor Voltage
— Wide Speed Range  Wide Output Voltage Range
Source: magazine.fev.com

● No Add. Converter for Voltage Adaption  Single-Stage Energy Conversion

Buck-Boost
Y-Inverter
 44/84

Derivation of Buck-Boost Y-Inverter

■ Generation of AC-Voltages Using Unipolar Bridge-Legs

● Switch-Mode Operation of Buck OR Boost Stage  Single-Stage Energy Conversion (!)

● 3-Φ Continuous Sinusoidal Output / Low EMI  No Shielded Cables / No Insul. Stress
● Standard Bridge-Legs / Building Blocks  1.2kV SiC MOSFETs
 45/84

Sinusoidal Modulation
■ Y-Inverter

■ Motor Phase Voltages

● Const. DC Offset  Strictly Positive Output Voltages uaN, ubN, ucN

● Mutually Exclusive Operation of the Half-Bridges  Low Switching Losses
 46/84

Boost-Operation uan > Ui

■ Phase-Module

■ Motor Phase Voltages

● Current-Source-Type Operation
● Clamping of Buck-Bridge High-Side Switch  Quasi Single-Stage Energy Conversion
 47/84

Buck-Operation uan < Ui

■ Phase-Module

■ Motor Phase Voltages

● Voltage-Source-Type Operation
● Clamping of Boost-Bridge High-Side Switch  Quasi Single-Stage Energy Conversion
 48/84

Discontinuous Modulation
■ Y-Inverter

■ Motor Phase Voltages

● Clamping of Each Phase for 1/3 of the Fund. Period  Low Switching Losses (!)
● Non-Sinusoidal Module Output Voltages / Sinusoidal Line-to-Line Voltages
 49/84

Control Structure
● Motor Speed Control

■ Cascaded Current / Voltage / Current Control Loops

■ Seamless Transition between Boost- & Buck-Mode  “Democratic” Control
 50/84

Y-Inverter VSD
■ Demonstrator Specifications

● Wide DC Input Voltage Range  400…750VDC

● Max. Input Current  ± 15A

● Max. Output Power  6…11 kW

● Output Frequency Range  0…500Hz
● Output Voltage Ripple  3.2V Peak @ Output of Add. LC-Filter
 51/84

Y-Inverter Demonstrator
● DC Voltage Range 400…750VDC
● Max. Input Current ± 15A
● Output Voltage 0…230Vrms (Phase)
● Output Frequency 0…500Hz
● Sw. Frequency 100kHz
● 3x SiC (75mΩ)/1200V per Switch
● IMS Carrying Buck/Boost-Stage Transistors & Comm. Caps & 2nd Filter Ind.
Control
Output Filter 3Φ Output Board DC Input
Inductors

Main
Inductors

■ Dimensions  160 x 110 x 42 mm3 (245W/in3)

 52/84

Y-Inverter - Measurement Results

■ Stationary Operation
UDC= 400V
UAC= 400Vrms (Motor Line-to-Line Voltage)
fO = 50Hz
fS = 100kHz / Discontinuous PWM
P = 6.5kW 100V/div 200V/div
10A/div 1V/div
uab
uS,a
uDC

iL ∆uab

● Line-to-Line Output Voltage Ripple < 3.2V

 53/84

Efficiency Measurements
● Dependency on Input Voltage & Output Power Level

UDC= 400V / 600V

UAC= 230Vrms (Motor Phase-Voltage)
fS = 100kHz

 Multi-Level Bridge-Leg Structure for Increase of Power Density @ Same Efficiency

 54/84

EMI-Limits (VSD Product Standard)

● IEC 61800-3  Product Standard for Variable-Speed Motor Drives
● EMI Emission Limits  Grid Interface (GI) and Power Interface (PI)
● Application  Residential (C1) or Industrial (C2)

■ EMI-Filter Design for Unshielded Cables > 2m and Resid. Applications (Cond. & Rad.)
 55/84

Conducted EMI-Filter
● Separate Cond. DM & CM EMI-Filter on DC-Side & DC-Minus Ref. EMI-Filter on AC-Side

Cf2 (on the back)

LCM LDM CDM = C0 Lf2

 Low Add. EMI Filter Volume — 74cm3 for Each Filter (incl. Toroid. Rad. EMI Filter)
 Total Power Density Reduces — 15kW/dm3 (740cm3)  12kW/dm3 (890cm3)
 56/84

Conducted EMI - Experimental Results

● Measurements of the Cond. EMI Noise on the AC-Side (QP, with 50Hz AC-LISN)

 Small 80uH CM-Ind. Added on AC-Side - (3cm3 of Add. Volume = 0.5% of Converter Vol.)
 Conducted EMI with Unshielded Motor Cable Fulfilled
 57/84

Measurement of Radiated EMI-Noise (1)

● Equipment Under Test (EUT) Placed on Wooden Table with Specified Arrangement
● CM Absorption Devices (CMAD) Terminate All Cables on AC- & DC-Side (Total lcable ≈ 1.5m)
● Measurement of Radiated Noise with Antenna in 3m Distance

[IEC 61800-3]
[Schwarzbeck]

■ Either Open-Area Test Site (OATS) or Special Semi-Anechoic Chamber (SAC) Needed
■ Alternative Pre-Compliance Measurement Method
 58/84

Measurement of Radiated EMI-Noise (2)

● CM-Currents NOT Returning IN THE CABLE are Dominant Source of Radiation
● Relation Between Radiated Electric Field and CM-Currents (!)

[Electromagnetic Compatibility Engineering, H. Ott]

[Fischer FCC F-33-1]

up to 250MHz
Znom = 6.3Ω

■ Max. Allow. El. Field Strength of 40dBuV/m  Max. CM-Current of 3.5uA (11dBuA)
■ Current Probe Impedance of 6.3Ω (F-33-1)  Max. Noise Volt. of 26dBuV @ Test Receiver
 59/84

Radiated EMI-Filter Design

● Single-Stage HF CM-Filter on DC-Side and AC-Side
● Plug-On CM-Cores (NiZn-Ferrites)  Low Parasitics & Good HF-Att. up to 1GHz

CY2,DC (on the back) Cf2 (on the back)

LHF LHF

 Additional EMI Filter Volume Already Considered with Conducted EMI Filter
 Total Power Density Slightly Reduces — 15kW/dm3  12kW/dm3
 60/84

Experimental Results - Radiated EMI

● Y-Inverter Placed in Metallic Enclosure  Emulate Housing, but UNshielded Cables (!)
● Measurement Setup  According IEC 61800-3
● Alternative Measurement Principle  Conducted CM-Current Instead of Radiation

 Already Noticeable Noise Floor

 HF-Emissions Well Below Equivalent EMI-Limit  Next Step: Verification Using Antenna
 61/84

Current Source Inverter (CSI) Topologies

■ Phase Modular Concept  Y-Inverter (Buck-Stage / Current Link / Boost-Stage)
■ 3-Φ Integrated Concept  Buck-Stage & Current DC-Link Inverter




 Low Number of Ind. Components & Utilization of Bidir. GaN Semicond. Technology
 62/84

3-Φ Integrated Buck-Boost CSI

■ Bidirectional/Bipolar Switches  Positive DC-Side Voltage for Both Directions of Power Flow

Source:

● Monolithic Bidir. GaN Switches  Factor 4 Reduction of Chip Area Comp. to Discrete Realization
 63/40

600V GaN Monolithic Bidir. Switch (M-BDS)

■ Power America Project — Based on Infineon’s CoolGaN™ HEMT Technology (RDS(on)= 70mΩ)
■ Dual-Gate Device / Controllability of Both Current Directions
■ Bipolar Voltage Blocking Capability | Normally On or Off

● Analysis of 4-Quardant Operation of RDS(on)= 140mΩ Sample @ ± 400V

 64/84

3-Φ-Integrated Buck-Boost CSI

■ “Synergetic” Control of Buck-Stage & CSI Stage
■ 6-Pulse-Shaping of DC Current by Buck-Stage  Allows Clamping of a CSI-Phase

● Switching of Only 2 of 3 Phase Legs  Reduction of Sw. Losses by ≈ 86% (!)

 65/84

3-Φ Integrated Buck-Boost CSI

■ “Synergetic” Control of Buck-Stage & CSI Stage
■ 6-Pulse-Shaping of DC Current by Buck-Stage  Allows Clamping of One CSI-Phase

● Operation for 30°Phase Shift of AC-Side Voltage & Current

 66/84

Future Research
■ Advanced DC/AC Topologies incl. CM-Filtering
■ Extension of 2/3-PWM to Bipolar DC-Link Voltage 3-Φ AC/AC Converter
■ Multi-Objective Design & Comparative Evaluation

● Partial Use of “Normally-On” Switches for Freewheeling in Case of Auxiliary Power Loss
 67/84

3-Φ AC/AC Matrix Converter

■ Indirect Matrix Converter (IMC) ■ Direct Matrix Converter (CMC)
● CSI GaN M-BDS AC/DC Front-End ● 4-Step Commutation
● ZCS Commutation of CSI Stage @ iDC=0 ● Exclusive Use of GaN M-BDSs
● No 4-Step Commutation

— Higher # of Switches Compared to CMC — Thermally Critical @ fout ≈ fin

— Lower Cond. Losses @ Low Output Voltage
— Thermally Critical @ fout  0
3-Φ PFC Rectifier System
Synergetic Control
Matrix-Type Isolated Topology

Source: Porsche
Mission-E Project
 68/84

Selected EV Charger Topology

■ Isolated Controlled Output Voltage
■ Buck-Boost Functionality & Sinusoidal Input Current
■ Applicability of 600V GaN M-BDSs
■ High Power Density / Low Costs

Source: SIEMENS

 Conventional / Independent OR “Synergetic Control” of Input & Output Stage

 69/84

Conventional vs. “Synergetic” Control

■ 1/3-Modulation  Significant Red. of Losses of the Power Switches Comp. to 3/3-PWM
■ Conduction Losses ≈ -80%
■ Switching Losses ≈ -70%

 Operating Point Dependent Selection of 1/3-PWM OR 3/3-PWM for Min. Overall Losses
 70/84

AC/DC Stage Transition to Full-Boost Operation

■ Different Operating Regimes  Synergetic Partial-Boost Full-Boost

 Intermediate 2/3-Operation for Limiting DC-Link Center Point Current (Low DC-Cap.)
Isolated Matrix-Type Rectifier
 71/84

Isolated 3-Φ Matrix-Type PFC Rectifier (1)

■ Based on Dual Active Bridge (DAB) Concept
■ Opt. Modulation (t1…t4) for Min. Transformer RMS Curr. & ZVS or ZCS
■ Allows Buck-Boost Operation

► Equivalent Circuit ► Transformer Voltages / Currents

 72/84

Isolated 3-Φ Matrix-Type PFC Rectifier (2)

■ Efficiency η = 98.9% @ 60% Rated Load (ZVS)
■ Mains Current THDI ≈ 4% @ Rated Load ≈ 99%
■ Power Density ρ ≈ 4kW/dm3

PO= 8 kW
UN= 400VAC  UO= 400VDC
fS = 36kHz

10A/div
200V/div

► 900V / 10mΩ SiC Power MOSFETs

► Opt. Modulation Based on 3D Look-Up Table
X-Technology #4 3D-Packaging
Automated Manufacturing
 73/84

3D-Packaging / Heterogeneous Integration

■ System in Package (SiP) Approach
■ Minim. of Parasitic Inductances / EMI Shielding / Integr. Thermal Management
■ Very High Power Density (No Bond Wires / Solder / Thermal Paste)
■ Automated Manufacturing Source:


● Future Application Up to 100kW (!)
● New Design Tools & Measurement Systems (!)
● University / Industry Technology Partnership (!)
 74/84

Monolithic 3D-Integration Source: ISSCC 2014

■ GaN 3x3 Matrix Converter Chipset with Drive-By-Microwave (DBM) Technology

– 9 Dual-Gate GaN AC-Switches
– DBM Gate Drive Transmitter Chip & Isolating Couplers
– Ultra Compact  25 x 18 mm2 (600V, 10A – 5kW Motor)

5.0GHz Isolated (5kVDC) Dividing Coupler

 75/84

– Future Experimental Analysis

■ No Access to Inner Details / Only Terminal Waveforms Available for Measurement (!)

► Convergence of Measurement & Simulation  “Augmented Reality” Oscilloscope

► Measured Signals & Simulated Inner Voltages/Currents/Temp. Displayed Simultaneously
► Automatic Tuning of Simulation Parameter Models for Best Fit of Simulated/Measured Waveforms
 76/84

PCB-Based 3-Port Resonant GaN DC/DC Converter

■ Single Transformer & Decoupled Power Flow Control
■ Charge Mode PFC  HV (250…500V) SRC DCX / Const. fsw , Min. Series Inductance / ZVS
■ Drive Mode HV  LV (10.5…15V) 2 Interleaved Buck-Converters / Var. fsw / ZVS
■ P = 3.6kW

≈ 16 kW/dm3

● Peak Efficiency of 96.5% in Charge Mode / 95.5% in Drive Mode

 Ceramic Capacitors
X-Technology #5 HF (NiZn) Magnetics
 77/84

HF Magnetic Materials & Ceramic Capacitors

■ High Performance Factor of Low Permeability Magnetic Materials for 2…20MHz
■ Volumetric Efficiency (uF/cm3) Improvement of MLCCs Exceeds Moore´s Law (!)
■ Hybrid Ind./Cap. Converter Concepts for Min. Magnetic Energy Storage Requirements

Source: R. Pilawa, 2017

Source: A.J. Hanson, 2016

● Performance Factor B • f Indicates Power Handling Capability @ Const. Loss Density & Core Volume
 Automated Design
X-Technology #6 Digital Twin / Industry 4.0
 78/84

Digital Signal & Data Processing

■ Exponentially Improving uC / Storage Technology (!)
— Extreme Levels of Density / Processing Speed
— Software Defined Functions / Flexibility
— Cont. Relative Cost Reduction

Source: Ostendorf & König /DeGruyter

● Fully Digital Control of Complex Systems

● Massive Computational Power  Fully Automated Design & Manufacturing / Industrial IoT (IIoT)
 79/84

Automated Design Roadmap

■ End-to-End Horizon of Modeling & Simulation
■ Design for Cost / Volume / Efficiency Target / Manufacturing / Testing / Reliability / Recycling

Autonomous Design  Design 4.0

– Independent Generation
of Full Designs for Final
Expert Judgement

Augmented Design
– Suggestion of Design
Details Based on 
Previous Designs Assisted Design
– Support of the User with
Abstracted Database of
Former Designs
State-of-the-Art
– User Defined Models
and Simulation /
Fragmented

● AI-Based Summaries  No Other Way to Survive in a World of Exp. Increasing # of Publications (!)
 80/84

Scaling Law – Power Electronics 4.0

■ Metcalfe's Law
– Moving from Hub-Based Concept
to Community Concept Increases
Value Exponentially (~n(n-1) or
~n log(n) )

Source:
Value
Pixabay

● Automated Design / Digital Control / Digital Twin

 81/84

─ S-TCM Full ZVS Inverters

─ Multi-Level/Cell Inverter Topologies
─ Buck-Boost Inverter w/ Integrated Output Filter
─ Inverter Motor Integration

Summary
─ Low On-Resistance & High Sw. Speed SiC / GaN
─ Monolithic Bidirectional GaN
─ Integration of Switch / Gate Drive / Sensing / Monitoring
─ SiC/GaN 4.0
 82/84

S-Curve of Power Electronics

■ Power Electronics 1.0  Power Electronics 4.0
■ Identify “X-Concepts” / “Moon-Shot” Technologies
■ 10 x Improvement NOT Only 10% !
#1 WBG Semiconductors
#2 Multi-Cell/Level Concepts
#3 Functional Integration
#4 3D-Packaging/Integration
#5 MLCC & HF Mag. Materials
#6 Digitalization / IIoT 4.0

► Super-Junct. Techn. / WBG

► Digital Power
Modeling & Simulation 3.0

► Power MOSFETs & IGBTs

► Circuit Topologies
Microelectronics
► Modulation Concepts 2.0
Control Concepts
SCRs / Diodes
Solid-State Devices
1.0
■ 2025
1958 2015
 83/84

Comparison to “Moores Law”

■ “Moore´s Law” Defines Consecutive Techn. Nodes Based on Min. Costs per Integr. Circuit (!)
■ Complexity for Min. Comp. Costs Increases approx. by Factor of 2 / Year

Economy of Lower
Scale Yield

>2015: Smaller
Transistors but Not
any more Cheaper

►
Gordon Moore: The
Future of Integrated
Electronics, 1965
(Consideration of Three
Consecutive Technology
Nodes)

► Definition of “η*,ρ*,σ*,fP*–Node” Must Consider Conv. Type / Operating Range etc. (!)
 84/84

Future Development
■ Commoditization / Standardization
■ Extreme Cost Pressure (!)

“There is Plenty of.

Room at the Top”  Medium Voltage/Frequency
Solid-State Transformers

“There is Plenty of..

Power-Supplies on Chip  Room at the Bottom”

● Key Importance of Technology Partnerships of Academia & Industry

Thank you!
 Appendix A
Accurate Measurement of
SiC/GaN Power Semiconductor
On-State & Switching Losses
 A-1

On-State Voltage Measurement (1)

■ Device / Load Current / Gate Voltage / Junction Temp.  On State-Resistance RDS(on)

RDS(on) = vDS(on) / iL

● Decoupling High Blocking Voltage and (Very) Low On-State Voltage (≈1V << BVDS)
 A-2

On-State Voltage Measurement (2)

■ High Accuracy  Compensation of Decoupling Diode Forward Voltage
■ Fast Dyn. Response  Valid Measurement 50ns After Turn-On

● Example — Dyn. RDS(on) of GaN HEMTs  2x RDS(on) @ 100kHz - 0.6BVDS

 A-3

Switching Loss Measurement

■ Heat-Sink Temp.-Based Transient Calorim. Method  15 min / Measurement

■ Case Temp.-Based Ultra-Fast Method  15 sec / Measurement

 A-4

Example Measurement Results

■ 650V GaN (ZVS) ■ 200V Si vs. GaN (Hard-Sw. & ZVS)

■ 1.2kV SiC (Hard-Sw.)

 Appendix B
T-Type M-BDS Topology
Integr. Active Filter PFC Rectifier
Swiss Rectifier
 B-1

T-Type PFC Rectifier Topology

■ Application of 600V M-BDSs @ Upn= 800V in Combination w/ 1200V SiC MOSFETs
■ Hard-Switching Cont. Cond. Mode (CCM) or ZVS TCM Operation

● Max. Power Density | 98.4% Efficiency @ CCM w/ fsw= 550kHz

 B-2

Integr. Active Filter (IAF) Rectifier

 PO= const. Required

 3-Φ Unfolder Front End
 3rd Harmonic Injection in Middle Phase
■ Non-Sinusoidal Mains Current  Basic Idea: M. Jantsch, 1997 (for PV Inv.)
 B-3

IAF Rectifier Demonstrator

■ Efficiency η > 99.1% @ 60% Rated Load
■ Mains Current THDI ≈ 2% @ Rated Load
■ Power Density ρ ≈ 4kW/dm3

PO= 8 kW
UN= 400VAC  UO= 400VDC
fS = 27kHz

►
► SiC Power MOSFETs & Diodes
► 2 Interleaved Buck Output Stages
SWISS Rectifier
 B-4

IAF Rectifier  Swiss Rectifier

■ Controlled Output Voltage
■ Sinusoidal Mains Current
■ iy Def. by KCL: E.g. ia- ic

► Low Complexity
 B-5

Swiss Rectifier Demonstrator

■ Efficiency η = 99.26% @ 60% Rated Load
■ Mains Current THDI ≈ 0.5% @ Rated Load
■ Power Density ρ ≈ 4kW/dm3

PO= 8 kW
UN= 400VAC  UO= 400VDC

►
fS = 27kHz

► SiC Power MOSFETs & Diodes

► Integr. CM Coupled Output Inductors (ICMCI)
— The END —