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Length Tuning and Delay Matching

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26 views4 pages

Length Tuning and Delay Matching

Uploaded by

kumara guru
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Length Tuning and Delay Matching in PCB Design using Altium Designer

1. Length Tuning in PCB Design

I. What is Length Tuning?


➔ Length tuning in PCB (Printed Circuit Board) design is a technique used to ensure that
signal traces have equal or specific lengths to meet timing requirements. This is crucial
for high-speed digital circuits where differences in trace lengths can cause timing
mismatches, leading to data errors and signal integrity issues.
➔ Note – One of the important parameters that should be kept in mind while designing
is IMPEDANCE MATCHING and CONTROLLING while tuning the trace

Figure 1. Length Tuning Example

➔ Length tuning is used in high-speed interfaces in order to keep signals synchronized in


time. There are few common instances where length matching must be enforced on a
PCB to ensure high-speed interfaces are functional:

o Between two tracks in a differential pair


o Between a group of single-ended traces
o Between a group of differential pairs
o Between multiple traces and/or pairs in a large parallel bus

Figure 2. Meaning of Length Matching

Abhirup Bhattacharyya
Associate Electronics Engineer (Hardware) – R&D department
Elecbits Technologies Pvt. Ltd., Gurgaon, Haryana – 122016
➔ Purpose of Length Tuning
• Signal Integrity:
i. Propagation Delay: Signals travel at a finite speed through PCB traces,
typically at a fraction of the speed of light. Differences in trace lengths
cause variations in arrival times at the destination, leading to timing
mismatches.
ii. Skew: In differential pairs or parallel buses, skew (the difference in arrival
times between two or more signals) can lead to data corruption or reduced
performance.
• High-Speed Signals:
iii. High-speed signals, such as those found in DDR memory interfaces, USB,
HDMI, PCIe, and other high-speed communication protocols, are
particularly sensitive to timing differences.
• Synchronous Signals:
iv. For synchronous systems where signals need to arrive at the same time
(e.g., clock signals and data lines), length matching ensures that signals
remain in sync.

II. Application of Length Tuning –

a. DDR (Double Data Rate) Memory Interfaces:


i. Requires precise timing to ensure data is read/written correctly.

b. High-Speed Serial Communication:


i. Such as PCIe, USB, and SATA.

c. Matched Length Differential Pairs:


i. Ensures balanced signals in differential pairs like Ethernet, USB, and
HDMI.

III. Techniques for Length Tuning –


a. Serpentine Routing:
i. Adding meanders or zig-zag patterns to increase the length of a shorter
trace to match a longer one.

b. In-Line Tuning:
i. Adjusting the trace within the component footprint area.

c. Pin Swapping:
i. Changing the pin assignments to naturally reduce the length differences.

d. Stub Tuning:
i. Adding small stubs to achieve the required length.

Abhirup Bhattacharyya
Associate Electronics Engineer (Hardware) – R&D department
Elecbits Technologies Pvt. Ltd., Gurgaon, Haryana – 122016
Figure 3. Types of Length Tuning

IV. Procedure to perform length tuning in Altium Designer –


a. Tutorial Link –
i. Altium Academy Blog - https://www.altium.com/documentation/altium-
designer/length-tuning-pcb
ii. Altium Academy video
https://youtu.be/LdqzBb60i6g?si=qXgTz42lP_XkYZRi

2. Delay Matching in PCB Design

I. What is Delay Matching?


➔ Delay matching in PCB (Printed Circuit Board) design is a technique used to ensure
that signals traveling on different traces reach their destinations at the same time, or
within an acceptable time difference.

➔ Delay Matching and Length tuning are actually interdependent on each other. We the
designers generally perform Length tuning mainly due to Delay matching of sensitive
high-speed signals.

II. Importance of Delay Matching

i. Signal Integrity:
1. In high-speed digital circuits, differences in signal arrival times can
cause data corruption or timing errors. Ensuring signals arrive
simultaneously helps maintain signal integrity.

ii. Timing Constraints:


1. Many digital interfaces, like DDR memory and high-speed serial
communication, have strict timing requirements. Delay matching
ensures these timing constraints are met.
Abhirup Bhattacharyya
Associate Electronics Engineer (Hardware) – R&D department
Elecbits Technologies Pvt. Ltd., Gurgaon, Haryana – 122016
iii. Synchronization:
1. Clock signals and data signals must often be synchronized. Delay
matching helps ensure that data is sampled correctly with respect to
the clock.

Figure 4. Delay Matching in Digital Signals

3. Reference Links –
I. https://www.google.com/url?sa=i&url=https%3A%2F%2Fwww.autodesk.com%2
Fproducts%2Ffusion-360%2Fblog%2Ftrace-length-and-high-speed-
designs%2F&psig=AOvVaw1fv7ut1PFESC6qcryQdYYj&ust=171890872539600
0&source=images&cd=vfe&opi=89978449&ved=0CBEQjRxqFwoTCPDF4ZKo6
IYDFQAAAAAdAAAAABAJ
II. https://www.google.com/url?sa=i&url=https%3A%2F%2Fwww.autodesk.com%2
Fproducts%2Ffusion-360%2Fblog%2Ftrace-length-and-high-speed-
designs%2F&psig=AOvVaw1fv7ut1PFESC6qcryQdYYj&ust=171890872539600
0&source=images&cd=vfe&opi=89978449&ved=0CBEQjRxqFwoTCPDF4ZKo6
IYDFQAAAAAdAAAAABAJ
III. https://www.google.com/url?sa=i&url=https%3A%2F%2Fwww.altium.com%2Fd
ocumentation%2Faltium-designer%2Flength-tuning-
pcb&psig=AOvVaw3HluG94qy8sevj4p0lW6Fn&ust=1718909373754000&sourc
e=images&cd=vfe&opi=89978449&ved=0CBEQjRxqFwoTCICehMaq6IYDFQA
AAAAdAAAAABAJ
IV. https://www.google.com/url?sa=i&url=https%3A%2F%2Fresources.altium.com%
2Fp%2Flength-matching-high-speed-signals-trombone-accordion-and-sawtooth-
tuning&psig=AOvVaw3HluG94qy8sevj4p0lW6Fn&ust=1718909373754000&sou
rce=images&cd=vfe&opi=89978449&ved=0CBEQjRxqFwoTCICehMaq6IYDFQ
AAAAAdAAAAABAS

Abhirup Bhattacharyya
Associate Electronics Engineer (Hardware) – R&D department
Elecbits Technologies Pvt. Ltd., Gurgaon, Haryana – 122016

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