JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.

Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

UNIT I
DIGITAL COMPUTERS: Introduction – Block diagram of digital computer – Definition of
computer organization – computer design and computer arithmetic.
REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer
Language – Register transfer, Bus and memory transfer – Arithmetic micro operations, Logic
micro operations, Shift micro operations, and Arithmetic logic shift unit.
BASIC COMPUTER ORGANIZATION AND DESIGN: Instruction codes – computer
registers – computer instructions – Timing and control – Instruction cycle – memory reference
instructions – Input-Output and Interrupt.

1.1 INTRODUCTION: Basic Definition

The term Architecture deals with the hardware design of the computer system. It deals
with structure and behavior of the various functional modulus of the computer and how they
interact to provide the processing needs of the user. It includes instruction format, instruction
set, and techniques for addressing the memory.
The term Organization deals with the way the hardware components are connected
together to form a computer system.
The term Design involves in the development of the hardware for the computer.
1.2 Block diagram of a Digital Computer
Figure 1.1 shows the block diagram of modern computer system (also called Von
Neumann Computer). Von Neumann architecture is based on the following key components.
a. Data and instructions are stored in a single read-write memory.
b. The contents of this memory are addressable by location.
c. All instructions are executed in a sequential manner.
Von Neumann architecture consists of five basic elements: input, memory, control unit,
Arithmetic Logic Unit (ALU) and output.

Figure 1.1: Block diagram of computer

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 1
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Input Unit: It is used to feed data into the computer. The common input devices are keyboard,
mouse, joystick, trackball, lightpen, scanner etc.

Output Unit: It is to transfer result to the user. The common output devices are monitor, printer,
plotter etc.

Memory unit: It is used to store programs and data. There are two types of memory used in
computer system namely RAM and ROM.
ALU: It is used to perform computation such as add, subtraction, multiplication and division,
logical operations such as AND, OR, NOT and Shift etc.
Control Unit: It is responsible for generating control signals. It also coordinates among various
function units in the computer system.
Register Unit: It is used to store data temporarily during program execution.

There are different types of devices are connected to the computer systems. Some
devices may be directly connected to the system and some may not be connected to the system
|(kept idle). Those devices which are directly connected to the system are called online devices
and those which are not directly connected to the system are called offline devices. The
combination of online and offline devices are called Peripheral devices or Input-Output (I/O)
devices.
To execute instructions the computer performs the following steps:
a. The control unit reads or fetches an instruction from memory and decodes or translates it.
b. For arithmetic or logic type instructions, the control unit generates enable signals for the
ALU to perform the required operations.
c. For Input/Output(I/O) instructions, the control unit generates enable signals for the I/O
either to input data from or output data to external devices.
PROCESSOR or CPU
The CPU consists of three components namely ALU, Control Unit and Register unit. The
registers are used for temporary storage of data and some special function registers, which
include
a. Memory Address Register (MAR) or Address Register (AR)
b. Memory Buffer Register (MBR) or Memory Data Register (MDR) or Data Register
(DR)
c. Program Counter (PC)
d. Instruction Register (IC)
e. Stack Pointer (SP)
f. Increment Register (INCR)
g. Decrement Register (DECR).

The Program Counter (PC) points to the next instruction to be executed.

The Instruction Register (IR) is used to hold the instruction that is currently being
executed.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 2
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

The two registers MAR/AR and MBR/MDR/DR are used to handle data transfer
between the main memory and the processor. The MAR/AR holds the address of the main
memory to or from which data is to be transferred. The MBR/MDR/DR contains the data to be
written into or read from the addressed word of the main memory.

Program Counter (PC) points to the next instruction to be executed. Instruction Register
(IR) is used to hold the instruction that is currently being executed. Stack Pointer (SP) points to
the memory location in stack. Increment Register (INCR) and Decrement Register (DECR)
which is used to increment / decrement the register value by 1.

1.3 Register Transfer Language

The registers in a computer are used to store data during program execution. The
operations executed on data stored in registers are called micro operations. The control initiates
the sequence of micro operations.

The symbolic notation used to describe the micro operation transfers among register is
called register transfer language. The term “register transfer” means transfer the result of the
operation to the same or another register. Computer registers are usually represented by
uppercase letters (sometimes followed by numerals). The following notations are usually
denoted by various registers:

MAR  Memory Address Register (It holds address of the memory unit)
MBR  Memory Buffer Register (It holds data)
PC  Program Counter (It points to the next instruction to be executed)
SP  Stack Pointer (It points to the memory location in stack)
IR  Instruction Register (It is used to hold the instruction that is currently being
executed).
RI  Processor Register (i varies from 1 to n depends upon the types of processor)

The two registers MAR and MBR are used to handle data transfer between the main
memory and the processor. The MAR holds the address of the main memory to or from which
data is to be transferred. The MBR contains the data to be written into or read from the
addressed word of the main memory.

Figure 1.2 shows the various representations of registers in block diagram form.

The register is represented by a rectangular box with the name of the register inside (Fig.
1.2 a). Individual bits are represented in Fig. 1.2 b. The numbering of bits in 16-bit register is
shown in fig. 1.2 c and is marked on the top of the box. In fig.1.2 d, the 16 bit register is divided
into two parts, namely bits (0 – 7) assigned as low order byte L (PC(L) or PC(0–7)) and bits 8 –
15 assigned as high order byte H (PC
(H) or PC(8-15)).

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 3
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Figure 1.2: Representation of Registers

Information transfer from one register to another register is denoted by means of

replacement operator ( ). For example, if we want to transfer the content of register R1 to
register R2, we write R2  R1. Please note that, the content of the source register R1 does not
change after the transfer.

Normally, the transfer can occur only under a predetermined control condition. This can
also be represented by means of an if…then statement.
If (P = 1) then (R2  R1)
Where P is a control signal generated in the control function. The control function is a
Boolean variable that is 1 or 0. The control condition is terminated by a colon symbol (:).
Therefore, the above statement can be rewritten as:

P: R2  R1.

This statement indicates content of R1 is transferred to R2 only if P=1. Figure 1.3 shows
the block diagram for P: R2  R1.

Figure 1.3: Block diagram for P: R2  R1

Where ‘n’ indicates number of bits in a register.

The basic symbols used in register transfer language are shown in the following table 1.1.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 4
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Table 1.1: Basic symbols for Register Transfer

Symbol Description Examples

Letters and Numerals Denotes a Register MAR, MBR, R2, R1
Parenthesis ( ) Denotes a part of Register R2(0-7), R2(L)
Arrow  Denotes transfer of information R2  R1, R1  R2
Comma , Separates two micro operations R2  R1, R1  R2

1.4 Bus and Memory Transfer

Definition: Bus
A bus is a group of wires that transmit signals from one device to another. A bus that
connects major computer components/modules (CPU, memory, I/O) is called a system bus. The
system bus is a set of conductors that connects the CPU, memory and I/O modules.
There are three types of buses namely address bus, data bus and control bus.
Address Bus:
It is used to identify the memory location or peripheral device. It is unidirectional. The
processor transmits the address of that device (peripheral) or a memory location which it desires
to access. The address bus consists of 16, 20, 24 or more parallel signal lines. On these lines the
CPU sends out the address of the memory location or I/O port that is to be written to or read
from.
Example : Suppose, if you want to access the contents of a memory location having address
5000 then the processor would transmit this address (in binary form) on the address
bus.

Data Bus:
It is used to send and receive data to and from several devices (between processor and
memory, between processor and devices or between two I/O devices). It is bidirectional (the data
can flow in either direction). Here, the contents of the addressed memory location are transferred
to the processor over the data bus.

Control Bus:
It is used for transmitting and receiving control signals between the processor and
various devices. It is bidirectional.
The combination of address bus, data bus and control bus is called system bus.
The CPU sends signals on the control bus to enable the outputs of addressed memory
devices or port devices.

Typical control bus signals are:

 Memory Read ( MEMR ) : It causes data from the addressed location to be placed on the
bus.
 Memory Write ( MEMW ): It causes data on the bus to be written into the addressed
location.
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 5
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024


I/O Read ( I / OR ) : It causes data from the addressed I/O port to be placed on the bus.

I/O Write ( I / OW ): It causes data on the bus to be output to the addressed I/O port.

Bus Request (BR): It indicates that a module needs to gain control of the bus.

Bus Grant (BG): It indicates that a requesting module has been granted control of the
bus.
 Interrupt Request (INTR): It indicates that an interrupt is pending.
 Interrupt Acknowledge (INTA): It acknowledges that the pending interrupt has been
recognized.
 Clock (CLK): It is used to synchronize the operation.
 Reset: It initializes all modules.
 Ready
 Hold Acknowledge (HLDA)
The operation of the bus is as follows:
If one module wishes to send data to another, then

1. Obtain the use of the bus

2. Transfer data via the bus
If one module wishes to request data from another module, then

1. Obtain the use of the bus

2. Transfer a request t the other module over the appropriate control and address lines.
The complexity of bus control logic depends on the amount of translation needed between
the system bus and CPU, the timing requirements, whether or not interrupt management is
included and the size of the overall system. For a small system, control signals of the CPU could
be used directly to reduce handshaking logic.
Figure 1.4 shows the bus organization scheme for microprocessor.

Figure 1.4: Bus Organization Scheme

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 6
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Definition: Dedicated Bus:

It is a bus which is used only for one specific purpose. Example: The address bus is used
to transmit only the address information.
CPU Bus:
It is formed by all lines that are connected directly to the processor CPU pins. The CPU
bus may vary from one processor to another.
System Bus:
It is a group of lines that are used to carry address, data and control signals. That is, it is a
combination of address bus, data bus and control bus.
Figure 1.5 shows that the schematic diagram of I/O or memory connection to CPU.

Figure 1.5: Basic Connection between microprocessor and its memory devices

1.5 Bus system for four 4 Registers:

Figure 1.6 shows one way of constructing a common bus system for four registers. The
multiplexers select the source register whose binary information is then placed on the bus. Each
register has 4 bits (0 to 3). The bus consists of four 4 x 1 multiplexers and each having four data
inputs (0 to 3), and two selection inputs S1 and S0.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 7
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

The output 1 of register A is connected to input 0 of MUX1 (A1). Two selection lines S1
and S0 are connected to the selection inputs of all four multiplexers. When S 1S0 = 00, the 0 data
inputs of all four multiplexers are selected and applied to the outputs that form the bus. The
following table 1.2 shows the register that is selected by the bus for each of the four possible
binary values of the selection lines.

Table 1.2: Function Table for Register Selection

S1 S0 Register Selection
0 0 A
0 1 B
1 0 C
1 1 D

The construction for the bus system for the four register is shown below:

Figure 1.6: Bus system for Four Registers

In general, a bus system will multiplex k registers of n bits each to produce an n-line
common bus. The number of multiplexers needed to construct the bus is equal to n, the number
of bits in each register. The size of each multiplexer is k x 1, since it multiplexes k data lines.

The transfer of information from a bus into one of many destination registers can be
accomplished by connecting the bus lines to the inputs of all destination registers and activating
the load control of the particular register selected. The symbolic statement for a bus transfer is
denoted by,

BUS  C, R1  BUS

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 8
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

It means that, the content of register is placed on the bus, and the content of the bus is
loaded into register R1 by activating its load control input. If the bus is known to exist in the
system, it may be shown to direct transfer
R1  C

1.6 T TRI-STATE OR THREE STATE BUFFERS

It has three states namely input, control input and output. When the control input is high, the
input is transferred to output. When control input is low, it goes to high impedance state. The
schematic diagram for three state buffers is shown below.

Figure 1.7: Graphic Symbol for Three state Buffer

To construct a common bus for 4 registers of n-bits each using three state buffers, we need n
circuits with 4 buffers. This is shown in figure 1.8.

Figure 1.8: Bus line with 3 state buffers.

Here, each group of 4 buffers receives one bit from the 4 registers. Each common output
produces one of the lines for the common bus for a total of n lines. Only one decoder is
necessary to select between the four registers.

1.7 Memory Transfer

A memory unit is a collection of storage cells together with associated circuits needed to
transfer information in and out of storage. The memory stores binary information in groups of
bits called words. A memory word is a group of 1’s and 0’s and may represent a number, an
instruction code, one or more alphanumeric characters or any other binary coded information.

There are two operation are performed in memory unit namely read and write operation.
The transfer of information from a memory to outside environment is called read operation. The

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 9
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

transfer of new information to be stored into the memory is called write operation. The
following notations are used.

Memory word M
Address of memory [M]
Address Register AR
Data Register DR

Read operation: DR  M[AR]

Write operation: R2  R1 + R2

1.8 ARITHMETIC LOGIC UNIT (ALU) Micro-Operation

A micro operation is an elementary operation performed with the data stored in
registers. There are four categories of micro operations.

1. Register Transfer micro operation – It transfers binary information from one register
to another.
2. Arithmetic micro operation – It performs arithmetic operations on numeric data stored
in registers
3. Logic micro operation – It performs bit manipulation operation on non-numeric data
stored in registers.
4. Shift micro operation – It performs shift operations on data stored in registers.

1.8.1 Arithmetic Micro operation

An Arithmetic Logic Unit (ALU) operation performs a set of arithmetic micro-operations
and a set of logic micro-operations.
The basic arithmetic micro operations are addition, subtraction, increment, decrement
and shift. These arithmetic micro operations are given in the following table 1.3.
Table 1.3: Arithmetic Micro operations
Symbolic Description
Designation
R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 – R2 Contents of R1 minus R2 transferred to R3
R2  R 2 Complement of the contents of R2 (1’s Complement)
R2  R 2 +1 2’s complement of the content of R2 (Negate)
R3  R1+ R 2 +1 R1 plus the 2’s complement of R2 (Subtraction)
R1  R1 + 1 Increment the content of R1 by one
R1  R1 – 1 Decrement the content of R1 by one

Note that, the multiplication and division operations are not listed in the table and
multiplication operations are implemented with a sequence of add and shift micro operations and
division operation is implemented with a sequence of subtraction and shift micro operations.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 10
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Binary Adder

The binary adder s constructed with full adder circuits connected in cascade, with the
output carry from one full adder connected to the input carry of the next full adder.
An n-bit adder required n- full adders. The output carry from each full adder is connected
to the input carry of the next-high-order full adder.

Figure: 4-bit Binary adder

1.8.2 Arithmetic Circuit Design

The basic component of a ALU design is the parallel adder. It is constructed with a
number of full adder circuits connected in cascade. By controlling the data inputs of the parallel
adder, it is possible to obtain different arithmetic operations. The figure 1.5 shows the arithmetic
operations obtained when one set of inputs to a parallel adder is controlled externally. The
number of bits in the parallel adder may be of any value. The input carry C in goes to the full
adder circuit in the least significant bit position. The output carry C out comes from the full adder
circuit in the most significant bit position.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 11
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Figure 1.5: Arithmetic micro operation obtained by controlling one set of inputs to a
parallel adder

The arithmetic addition is achieved when one set of inputs receives a binary number A,
the other set of inputs receives a binary number B, and the input carry is maintained at 0. This is
shown in figure (a). By making Cin = 1 as in figure (b), it is possible to add 1 to the sum in F.
Similarly, we can obtain other arithmetic operations. The various arithmetic micro-operations
are given in table 1.4.
In figure (g), we insert all 1’s to the B terminals. A binary number with all 1’s represents
the 2’s complement of unity. For example, the 2’s complement of the binary number 0001 is
1111. adding a number A to the 2’s complement of unity produces an output F = A+2’s
complement of 1 = A – 1, which is the decrement micro-operation.

Table 1.4: Arithmetic micro operation

Symbolic Designation Description
F  A+B Addition: Content of A plus B transferred to A
F  A–B Subtraction: Content of A minus B transferred to A
F  A+1 Increment the content of A by one (count up)
F  A–1 Decrement the content of A by one (count down)
F A Complement register A ( 1’s complement)
F  A +1 Form the 2’s complement of register A
F  A+ B Transfer the content of A plus the 1’s complement of B into register A
F  A + B +1 Transfer the content of A plus the 2’s complement of B into register A
(equivalent to subtraction)

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 12
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

One stage of arithmetic circuit provides the micro-operation listed in table is shown in
figure 1.6. The full-adder circuit represents one stage of the parallel adder. The two selection
lines S1 and S0 control the data path between the B terminal and one input of the full-adder
circuit.
When S1S0 = 00, the controlled input of the full adder is always 0.
When S1S0 = 01, the input receives the value of Bi.
When S1S0 = 10, the input receives the complement value of Bi.
When S1S0 = 11, the input is always equal to 1.

These conditions can be verified by deriving the truth table of the selection logic. The
two selection variables S1 and S0 control the input path in the B terminal.
A 4-bit arithmetic circuit that performs eight arithmetic operations is shown in figure 1.7.

Figure 1.7: Logic diagram of arithmetic circuit

Table 1.5: Function table for arithmetic circuit for Figure 1.7

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 13
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Function Select
S1 S2 Cin Y Equals Output Equals Function
0 0 0 0 F=A Transfer A
0 0 1 0 F=A+1 Increment A
0 1 0 B F=A +B Add B to A
0 1 1 B F=A+B+1 Add B to A plus 1
1 0 0 B F=A+ B Add 1’s complement of B to A
1 0 1 B F=A+ B+1 Add 2’s complement of B to A
1 1 0 All 1’s F=A–1 Decrement A
1 1 1 All 1’s F=A Transfer A

Figure 1.8: 4-bit Arithmetic Circuit

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 14
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Table 1.6: Function table for Arithmetic circuit for Figure 1.8
Function Select
S1 S2 Cin Y Equals Output Equals Function
0 0 0 B F=A+B Add
0 0 1 B F=A+B+1 Add with Carry
0 1 0 B F=A+ B Subtract with borrow
0 1 1 B F=A+ B +1 Subtract
1 0 0 0 F=A Transfer A
1 0 1 0 F=A+1 Increment A
1 1 0 All 1’s F=A–1 Decrement A
1 1 1 All 1’s F=A Transfer A

The value of Y inputs to the full-adder circuits are a function of selection variables S 1
and S0. Adding the value of Y + A + Cin gives the arithmetic operation in each entry.
1.8.3 Logic Circuit Design
The logic micro-operations manipulate the bits of the operands separately and treat each
bit as a binary variable. There are 16 logic micro-operation can be performed with two binary
variables is shown in table 1.7 and table 1.8.

Table 1.7: Truth tables for 16 functions of two variables

Table 1.8: Sixteen Logic micro operations

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 15
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

All these operations can be generated by means of four selection lines. However, there
are only four basic logic operations such as AND, OR, XOR and complement micro-operations.

Figure 1.10 (a) shows one stage of a logic circuit. It consists of four gates and a
multiplexer. Each of the four logic operations AND, OR, XOR, and complement are generated
with a gate that performs the required logic.

Figure 1.9: One stage of logic circuit

The outputs of the gates are applied to a multiplexer with two selection variables S1 and
S0. These selection variables choose one of the multiplexer inputs and direct its value to the
output. The diagram shows one typical stage with subscript i. For a logic circuit with n bits
diagram of figure (a) must be repeated n times for i = 1,2,3, . . ., n. The selection variables must
be applied to all stages. The function table in figure (b) the logic micro-operation obtained for
each combination of the selection variables.
1.8.4 DESIGN OF ALU
The steps involved in the design of ALU are:
1. Design the arithmetic section independent of the logic section
2. Determine the logic operations obtained from the arithmetic circuit in step 1, assuming
that the input carries to all stages are 0.
3. Modify the arithmetic circuit to obtain the required logic operations.
The logic circuit can be combined with the arithmetic circuit to produce one ALU.
Figure 1.11 shows the one stage of ALU.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 16
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Figure 1.10: Combining logic and arithmetic circuits

Selection variables S1 and S0 are common to both section, we have to use one more
selection variable S3 to differentiate between the two.
When S2 = 0, the arithmetic output is selected, but when S 2 = 1, the logic output is
selected. An ALU with individual stages will provide 8 arithmetic and 4 logic micro-operations,
for a total of 12 micro-operations. Each micro-operation selected through the variables S 2, S1
and S0, and Ci. The input carry Ci is used for selection of arithmetic micro-operations only.
Table 1.9 shows the lists the 12 micro-operations of the ALU.
TABLE 1.9: Function Table for ALU
Function Select
Output Function
S2 S1 S0 Ci
0 0 0 0 F=A Transfer A
0 0 0 1 F=A+l Increment A
0 0 1 0 F = A +B Addition
0 0 1 1 F=A+B+l Add with carry
0 1 0 0 F=A – B - 1 Subtract with borrow
0 1 0 1 F=A – B Subtraction
0 1 1 0 F=A-l Decrement A
0 1 1 1 F=A Transfer A
1 0 0 X F=A  B AND
1 0 1 X F= A  B OR
1 1 0 X F= A  B XOR
1 1 1 X F= A Complement A

1.8.5 Shift Micro operation

Shift micro operations are used for serial transfer of data. They are also used in
conjunction with arithmetic, logic and other data processing operations. The contents of the
register can be shifted to the left or right. At the same time, the bits are shifted, the first flip-flop
receives its binary information from the serial input.

There are three basic shifts. 1. Logical shift 2. Arithmetic shift and 3. Circular shift
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 17
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

The symbolic notations for various shift operations are shown in table 1.10.

Table 1.10: Shift Microoperations

Symbolic Designation Description
R  Shl R Shift Left Register R (Logical)
R  Shr R Shift Right Register R (Logical)
R  Ashl R Arithmetic Shift Left Register R
R  Ashr R Arithmetic Shift Right Register R
R  Cil R Circular Shift Left Register R
R  Cil R Circular Shift Right Register R

Logical Shift Operation

In Logical Shift Left operation, each bit in the register is shifted to the left one by one.
The MSB bit is moved outside the register, and the place of the LSB is filled with zero.

Similarly, in Logical Shift Right operation, each bit in the register is shifted to the right
one by one. The LSB bit is moved outside the register and the place of the MSB is filled with
zero.

Example:

Figure 1.11: Logical Shift Left and Right Operation

Arithmetic Shift Operation

In Arithmetic Shift Left operation is same as Logical shift left operation. Here, each bit
in the register is shifted to the left one by one. The MSB bit is moved outside the register, and
the place of LSB is filled with zero.

Similarly, in Arithmetic Shift Right operation, each bit in the register is shifted to the
right one by one. The place of MSB is filled with the previous value of MSB.

Example:

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 18
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Figure 1.12: Arithmetic Shift Left and Right Operation

Circular Shift Operation

In Circular Shift Left operation, each bit in the register is shifted to the left one by one.
After shifting, the LSB place becomes empty and filled with MSB value.

Similarly, in Circular Shift Right Operation, each bit in the register is shifted to the
right one by one. After shifting, the MSB becomes empty and filled with LSB values.

Example:

Figure 1.13: Circular Shift Left and Right Operation

Arithmetic Logic and Shift Unit

We know that, ALU is a combinational circuit which performs computation and the
register transfer operation performs from the source register through the ALU to the destination
register in clock period. The shift operation is also a part of ALU.
The Arithmetic, Logic and Shift circuits can be combined into one ALU with common
selection variables. Figure 1.14 shows that the one-stage of Arithmetic logic and shift unit.
The input Ai and Bi are applied to both arithmetic and logic circuit. A particular micro
operation is selected with inputs S1 and S0. A 4 x 1 multiplexers at the output chooses between
arithmetic output and a logic output. The data in the multiplexers are selected with inputs S3 and
S2. The other two inputs to the multiplexers receive inputs Ai-1 for the shift right micro operation
and Ai+1 for the shift-left micro operation.
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 19
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Figure 1.14 shows the one-stage of eight arithmetic operation, four logic operation and
two shift operations. Each operation is selected with the five variables S 0,S1,S2,S3 and Cin. the
input carry Cin is used for selecting arithmetic operations only.

The following table 1.10 shows the 14 operations of the ALU.

When S3S2 = 00  The first 8 are arithmetic operations are selected.

S3S2 = 01  The four logic operations are selected

S3S2 = 10 and 11  Shift operations are selected

Figure 1.14: One State of Arithmetic, Logic and Shift Unit.

Table 1.10: Function Table for Arithmetic, Logic and Shift Unit

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 20
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Example:
Design an adder/subtractor circuit with one selection variable s and two inputs A
and B. When s=0 the circuit performs A+B. When s=1, the circuit performs A – B by
taking the 2’s complement of B.
Solution: The derivation of the arithmetic circuit is shown in figure 1.15.

Figure 1.15: Derivation of an adder/subtractor circuit

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 21
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

The function diagram is shown in figure 1.15 a. For the addition part, we need Cin = 0.
For the subtraction part, we need the complement of B and Cin = 1
The function table is shown in figure 1.15 b.
When s = 0, Xi and Yi of each full adder must be equal to the external inputs Ai and Bi
respectively.
When s = 1, we must have Xi = Ai and Yi = Bi’
The input carry must be equal to the value of s.
The figure 1.15 b shows the position of the combinational circuit in one typical stage of the
arithmetic circuit.
The truth table in figure 1.15 c is obtained by listing the eight values of the binary input
variables. Output Xi = Ai for all eight entries. Output Yi = Bi for the four entries when s = 0. It is
equal to the complement of Bi for the last entries where s = 1.
The simplified output function for the combinational circuit are:
Xi = Ai
Yi = Bi  s
The diagram of the 4-bit adder/subtractor circuit is shown in figure 1.16.

Figure 1.16: 4-bit adder/subtractor circuit

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 22
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Each input Bi requires an EX-OR gate. The selection variable s goes to one input of each
gate and also to the input carry of the parallel adder.
Example: Show that the block Diagrams of the hardware that implements the following
register transfer statement yT2: R2  R1, R1  R2.

Solution:

Example: Represent the following conditional control statement by two register transfer
statements with control functions.
If (P=1) then ( R1  R2) else if (Q=1) then (R1  R3).
Solutions:
P: R1  R2
P’Q: R1  R3
Example: A digital computer has a common bus system for 16 registers of 32 bits each.
The bus is constructed with multiplexers.
a. How many selection inputs are there in each multiplexers?
b. What size of multiplexers is needed?
c. How many multiplexers are there in the bus systems?
Solution:
a. Four selection lines to select one of 16 registers
b. 16 x 1 multiplexers
c. 32 multiplexers, one for each bit of the register.

Example: The following transfer statements specify a memory. Explain the memory
operation in each case.
a. R2  M[AR] b. M[AR]  R3 c. R5  m[R5]
Solution:
a. R2  M[AR] : Read memory word specified by the address in AR into register R2.
b. M[AR]  R3 : Write content of register R3 into the memory word specified by the
address in AR
c. R5  m[R5] : Read memory word specified by the address in R5 and transfer content
to R5 (destroys the previous value)

Example: Draw the block diagram for the hardware that implement the following
statements: x + yz: AR  AR + BR.
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 23
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Solution:

Example: Design an arithmetic circuit with one selection variable S and two n-bit data
inputs A and B. the circuit generates the following four arithmetic operations in
conjunction with the input carry Cin. Draw the logic diagram for the first two
stages.
S Cin = 0 Cin = 1
0 D = A + B (Add) D = A + 1 (Increment)
1 D = A – 1 (Decrement) D = A + B +1 (Subtraction)
Solution:

Example: Register A holds the 8-bit binary 11011001. Determine the B operand and the
logic micro operations to be performed in order to change the value in A to:
a. 01101101 b. 11111101
Solution:

Example: The 8-bit registers AR,BR,CR and DR initially have the following values:
AR = 1111 0010 BR = 1111 1111 CR = 1011 1001 DR = 1110 1010
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 24
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Determine the 8-bit values in each register after the execution of the following
sequence of microoperations.

AR  AR + BR Add BR to AR
CR  CR  DR, BR  BR + 1 AND DR to CR, increment BR
AR  AR – CR Subtract CR from AR
Solution:

Example:
An 8-bit register contains the binary value 10011100. What is the register value after
arithmetic shift right? Starting from the initial number 10011100, determine the register
value after an arithmetic shift left, and state whether there is an overflow.

Solution:
R = 10011100
Arithmetic shift right: 11001110
Arithmetic shift left: 00111000

Overflow because a negative number changed to positive.

Example:
Starting from an initial value of R=11011101, determine the sequence of binary values in R
after a logical shift left, followed by a circular shift right, followed by a logical shift right
and a circular shift left.

Solution:

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 25
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Example:
What is wrong with the following register transfer statements?
a. xT: AR  AR , Ar  Ar + 1
b. yT: R1  R2, R1 R3
c. zT: PC  AR, PC  PC + 1

Solution:
a. Cannot complement and increment the same register at the same time.
b. Cannot transfer two different values (R2 and R3) to the same register (R1) at the same
time
c. Cannot transfer a new value into a register (PC) and increment the original value one by
one at the same time.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 26
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

1.9 BASIC COMPUTER ORGANIZATION AND DESIGN

1.9.1 INSTRUCTION CODES
We know that, the organization of the computer is defined by its internal registers, the
timing and control structure, and the set of instructions that it uses. The internal organization of
a digital system is defined by the sequence of micro-operations it performs on data stored in its
registers. A digital computer is capable of executing several micro operations by means of a
program.
A program is a set of instructions that specify the operations, operands and the sequence
by which processing has to occur. A computer instruction is a binary code that specifies a
sequence of micro operations for the computer.

An Instruction code is a group of bits that instruct the computer to perform a specific
operation. It is usually divided into two parts and most important part is operation part.

The operation code of an instruction is a group of bits that define operation such as add,
subtract, multiply, shift and complement. The number of bits required for the operation code of
an instruction depends on the total number of operations available in the computer. When this
operation code is decoded in the control unit, the computer issues control signals to read an
operand from memory and add the operand to a processor register. The instruction code format
is vary from one processor to another processor. Every computer has its own unique instruction
set.

1.9.2 Stored Program Organization

The most important property of a general purpose computer is stored program concept,
means ability to store and execute instructions in memory. Figure 1.17 shows the stored
program organization. Instructions are stored in one section of memory and data in another. For
a memory unit with 4096 words we need 12 bits to specify address since 2 12=4096.

Figure 1.17: Stored program organization

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 27
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

If we store each instruction code in one 16-bit memory word, we have available 4 bits for
the operation code to specify one out of 16 possible operations, and 12 bits to specify the
address of an operand. The control reads a 16-bit instruction from the program portion of
memory. It uses the 12-bit address part of the instruction to read a 16 bit operand from the data
portion of memory. It then executes the operation specified by the operation code.

Computer have a single processor register is called Accumulator register (AC). The
operation performed with the memory operand and the content of AC. If an operation in an
instruction code does not need an operand from memory and can be used to specify other
operations for the computer. For example, clear AC, complement AC, increment/decrement AC
is operates on data stored in the AC register.

1.9.3 Computer Registers:

Computer instructions are normally stored in consecutive memory locations and are
executed sequentially one at a time. The control reads an instruction from a specific address in
memory and executes it. It then continues by reading the next instruction in sequence and
executes it, and so on. This type of instruction sequencing needs a counter to calculate the
address of the next instruction after execution of the current instruction is completed. It is also
necessary to provide a register in the control unit for storing the instruction code after it is read
from memory. The computer needs a processor register for manipulating data and a register for
holding a memory address. The various registers used in computer are given in the following
table 1.11.
Table 1.11: List of Registers for the Basic Computer
Register Symbol Number of Bits Register Name Functions
DR 16 Data Register Holds memory operand
AR 12 Address Register Holds address for memory
AC 16 Accumulator Processor Register
IR 16 Instruction Register Holds instruction code
PC 12 Program Counter Holds address of the instruction
TR 16 Temporary Register Holds temporary data
INPR 8 Input Register Holds input character
OUTR 8 Output Register Holds output character

The registers are used for temporary storage of data and some special function registers,
which include Program Counter (PC), Instruction Register (IC), Address Register (AR) and
Data Register (DR).

The Program Counter (PC) points to the next instruction to be executed. The
Instruction Register (IR) is used to hold the instruction that is currently being executed.

The two registers AR and DR are used to handle data transfer between the main memory
and the processor. The AR holds the address of the main memory to or from which data is to be
transferred. The DR contains the data to be written into or read from the addressed word of the
main memory. The Temporary Register (TR) is used for holding temporary data during the
processing.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 28
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

The input register INPR receives an 8-bit character from an input device. The output
register OUTR holds an 8-bit character for an output device.

Figure 1.18 shows the basic computer registers and memory.

Figure 1.18: Basic computer Registers and Memory

1.10 INSTRUCTION SET

An instruction is a group of bits that defines a computer operation or specific function.
The entire group of instruction is called the instruction set. There are four categories of
instructions namely.
1. Data Manipulation instructions (Arithmetic, Logical and Shift instructions)
It is used to perform arithmetic operations (such as addition, subtraction, increment,
decrement), logical operations (such as AND, OR, Exclusive OR), Shift / Rotate operation
(such as rotate left or right), comparison operations (Comparing any 8 bit number, or the
contents of a register, or a memory location can be compared for equality, greater than or less
than) and complement (Changing all 0’s by 1’s and vice-versa).
2. Data Transfer instructions (Instructions for moving information to and from memory and
processor registers)
It is used to transfer data from one place (called source) to another place (called
destination). The various types of data transfers are.
Types Example
Between Registers. Copy the contents of register B into register A
Copy the data byte into a specific register or Load register A with the data byte 25H (or)
memory location Load address (memory location) 2500H with
the value 20H
Between a memory location and a register From the memory location 2100H to register B
Between an I/O device and the accumulator From an input to the accumulator.
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 29
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Contents of a location are denoted by placing square brackets around the name of
the location (R1←[LOC], R3 ←[R1]+[R2])

3. Program manipulation/control instructions

It is used to transfer program control from one place in memory to another. It
includes,
 Unconditional jump instructions
 Conditional jump instructions
 Subroutine instructions
 Halt and No operations).
4. Input and output instructions
5. Status management instructions
It is used to change the status conditions of the computer without affecting the
data or an instruction in which they are executed. It performs only microprocessor
management functions.

Note:
1. During data transfer operations, the contents of the source register are not destroyed and
the contents of the destination are changed. It does not affect the flags.
2. All arithmetic and logical operations are performed with the contents of the accumulator
and the results are also stored in the accumulator. Here, the flags are affected depending
upon the ALU results
3. Any register/Memory can be used for increment and decrement.
4. A program sequence is altered either conditionally or unconditionally.

Arithmetic Instructions: ADD, CMA, INC

Circulate instructions: CIR, CIL
Logic instructions: AND, CMA, CLA
Moving information from memory to AC: LDA
Storing information from AC to memory: STA
Branch instruction: BUN, BSA, ISZ
Information transferred between
Computer and external devices: INP and OUT

1.10.1 Computer Instructions

The basic computer has 3 instruction code formats namely, memory reference
instruction, register-reference instruction and input-output instruction. Each format has 16
bits. The operation code (opcode) part of the instruction contains 3 bits and the remaining 13
bits depends on the operation code encountered.
A memory reference instruction uses 12 bits to specify an address and 1 bit to specify the
addressing mode I (I=0 means direct address and I=1 means indirect address).

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 30
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

A register reference instruction are recognized by the operation code 111 with a 0 in the
left most bit (bit 15) of the instruction. A register reference instruction specifies an operation on
or a test of the AC register. An operand from memory is not needed and other 12 bits are used to
specify the operation or test to be executed.

An input-output instruction does not need a reference to memory and is recognized by

the operation code 111 with a 1 in the left most bit of the instruction. The remaining 12 bits are
used to specify the types of input-output operations or test performed.

The type of instruction is recognized by the computer control from the 4 bits in positions
12 to 15 of the instruction.

Addressing Opcode Bits Type of instruction Modes of operations

Mode (Bit 15) (12 to 14)
I Opcode Memory reference I=0 direct address
instruction I=1 indirect address
0 111 Register Reference
instruction
1 111 Input-output instruction

The following table 1.12 shows the basic instructions used in computer. A 3-letter word
represents an abbreviation for programmer and user. The hexadecimal code is equal to the
hexadecimal number of the binary code used for instruction.

Table 1.12: Basic Computer Instructions

Hexa Decimal
Symbol Code Description
I=0 I=1
AND 0XXX 8XXX AND memory word to AC
ADD 1XXX 9XXX Add memory word to AC
LDA 2XXX AXXX Load memory word to AC
STA 3XXX BXXX Store content of AC in memory
BUN 4XXX CXXX Branch unconditionally
BSA 5XXX DXXX Branch and save return address
ISZ 6XXX EXXX Increment and skip if zero
CLA 7800 Clear AC
CLE 7400 Clear E
CMA 7200 Complement AC
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 31
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

CME 7100 Complement E

CIR 7080 Circulate right AC and E
CIL 7040 Circulate left AC and E
INC 7020 Increment AC
SPA 7010 Skip next instruction if AC positive
SNA 7008 Skip next instruction if AC negative
SZA 7004 Skip next instruction if AC zero
SZE 7002 Skip next instruction if E is zero
HLT 7001 Halt Computer
INP F800 Input characters to AC
OUT F400 Output characters from AC
SKI F200 Skip on input flag
SKO F100 Skip on output flag
ION F080 Interrupt on
IOF F040 Interrupt off

Example 1: A computer uses a memory unit with 256K words of 32 bits each. A binary
instruction code is stored in one word of memory. The instruction has 4
parts: an indirect bit, an operation code, a register code part to specify one of
64 registers and an address part.
a. How many bits are there in the operation code, the register code part and the
address part?
b. Draw the instruction word format and indicate the number of bits in each part?
c. How many bits are there in the data and address inputs of the memory?
Solution:
256K = 28 x 210 = 218 (Since 1K = 1024 = 210)
64 = 26
a) Address : 18 bits
Register Code: 6 bits
Indirect bit: 1 bit
Total : 18 + 6 + 1 = 25 bits
Opcode : 32 bits – 25 bits = 7 bits

b) 1 7 6 18 = 32 bits
I Opcode Register address

c) Data: 32 bits address : 18 bits

Example 2: What is the difference between a direct and an indirect address instruction?
How many references to memory are needed for each type of instruction to
bring an operand into a processor register?
Solution:
A direct address instruction needs two references to memory namely
a. Read instruction and
b. Read Operand
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 32
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

An indirect address instruction needs three references to memory namely

a. Read instruction
b. Read effective address
c. Read operand.
1.11 Timing and Control
The timing for all registers in the basic computer is controlled by a master clock
generator. The clock pulses are applied to all flip-flops and registers in the system, including the
flip-flops and registers in the control unit.
It is the most common unit and complex unit in a computer. Its main functions are:
a. Fetching the instruction
b. Analyzing the opcode
c. Generating control signals for performing various micro-operations.
There are two types of control organization: Hardwired Control and Micro programmed
control. In the hardwired control organization, the control logic is implemented with gates, flip-
flops, decoders and other digital circuits. The major advantage is fast mode of operation. In the
micro programmed organization, the control information is stored in a control memory. The
control memory is programmed to initiate the required sequence of operations.

Table 1.13: Difference between hardwired control and micro programmed control
Attribute H/W Control Unit Micro programmed CU
Speed Fast Slow
Control function Implemented in Hardware Implemented in software
Flexibility Not flexible to accommodate More flexible to accommodate
new system specifications or new system specification or new
new instructions instructions.
Ability to handle large/ Difficult Easier
complex instruction sets
Ability to support OS and Very difficult Easy
diagnostic features
Design process Complicated Orderly and systematic
Applications Mostly RISC processors Mainframes and some
microprocessors
Instruction set and size Under 100 instructions Over 100 instructions
ROM size - 2K to 10K by 20 – 400 bit
microinstructions
Chip area efficiency Uses least area Uses more area

Figure 1.20 shows the block diagram of the control unit. It consists of two decoders, a
sequence counter and a number of control logic gates.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 33
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Figure 1.20: Control unit of the basic Computer

An instruction reads from memory is placed in the instruction register (IR). This
instruction register is divided into three parts: the I bit, operation code and bits 0 through 11.
The operation code in bits 12 to 14 are decoded with a 3 x 8 decoder. The eight outputs of the
decoder are designated by the symbols D0 through D7. Bit 15 of the instruction is transferred to a
flip-flop designated by the symbol I. bits 0 through 11 are applied to the control logic gates. The
4-bit sequence counter can count in binary from 0 through 15. The outputs of the counter are
decoded into 16 timing signals T0 through T15.

The sequence counter SC can be incremented or cleared synchronously. Most of the

time, the counter is incremented to provide the sequence of timing signals out of 4 x 16 decoder.
When the counter is cleared to 0, the next active timing signal would be signals T 0, T1, T2, T3
and T4 in sequence. At time T4, if SC is cleared to 0, then the decoder output D3 is active. This is
expressed by the statement
D3T4 : SC  0

Figure shows the timing diagram for the time relationship of the control signals. The
sequence counter SC responds to the positive transition of the clock. Initially, the CLR input of
SC is active. The 1 st positive transition of the clock clears SC to 0, which in turn activates the
timing signal T0 out of the decoder. T0 is active during one clock cycle.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 34
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Figure: Example of Control timing Signals

The positive clock transition labeled T 0 in the diagram will trigger only those registers
whose control inputs are connected to timing signals T 0. SC is incremented with every positive
clock transition, unless its CLR input is active. This produces the sequence of timing signals T 0,
T1, T2, T3, T4 and so on. If SC is not cleared, the timing signals will continue with T5, T6 upto
T15 and back to T0.

The last three waveforms in the above figure shows how SC is cleared when D 3T4 = 1.
Output D3 from the operation decoded becomes active at the end of timing signal T 2. When
timing signals T4 becomes active, the output of the AND gate that implements the control
functions D3T4 becomes active. This signal is applied to the CLR input of SC. On the next
positive clock transition the counter is cleared to 0. This causes the timing signal T 0 to become
active instead of T5 that would have been active if SC were incremented instead of cleared.

A memory read or writes cycle will be initiated with the rising edge of a timing signal. It
will be assumed that a memory cycle time is less than the clock cycle time. According to this
assumption, memories read or write cycle initiated by a timing signal will be completed by the
time the next clock goes through its positive transition. The clock transition will then be used to
load the memory word into a register.

1.12 INSTRUCTION CYCLE:

We know that a processor is a CPU, which is used to execute program. The program
consists of several instructions which are stored in the memory. When the processor is switched
on, the processor first fetches instruction from memory and then executes this instruction. The
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 35
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

fetching and executing of instructions are done repeatedly by the processor until the power
switch is switched off.
The above operations fetch the instruction and execute the instruction are performed in
fixed and variable time slots. The fetch operation requires fixed time slots (4T states) is known
as Fetch Cycle (FC) and execute operation required variable time slots (3T state or high depends
upon the instruction to be executed) is knows as Execute Cycle (EC).
The total time required to complete the execution of an instruction is called Instruction
Cycle (EC) or Instruction cycle time. That is,
IC = FC + EC

1.12.1 Fetch Cycle (FC)

It is used to read an instruction from memory. The instruction may be more than one byte
long and the other byte is called operand address or data.

Algorithm for Fetch operation

1. Program Counter(PC) sends address to the memory
2. Read instruction byte from memory
3. Transfer instruction to the processor
Note:
Each operation require one clock period.
1. Initially, PC is loaded with the address of the first instruction in the program.
T0 : AR  PC

The sequence counter SC is cleared to 0, providing a decoded timing signal T 0.

2. After each clock pulse, SC is increment by one, so that the timing signals go through a
sequence T0, T1, T2 and so on. The micro operations for the fetch and decode phases can
be specified by the following register transfer statements.

T1 : IR  M[AR], PC  PC + 1
T2 : D0….,D7  Decode IR (12-14), AR  IR (0-11), I  IR (15)

In summary,

T0 : AR  PC
T1 : IR  M[AR], PC  PC + 1
T2 : D0….,D7  Decode IR (12-14), AR  IR (0-11), I  IR (15)

1.12.2 Execute Cycle (EC)

An execute cycle required variable time slots which depends upon the instruction type.
An algorithm for execute cycle is given below.
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 36
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

1. Decode the fetched instruction

2. If operand in memory, then Fetch Operand
3. Execute instructions

Note:
a. If an instruction is a 1-byte long and the operands are in general purpose
registers, then they only decoding and executing operations are performed. This
operation is done in one clock cycle.
b. If an instruction is a 2-byte or 3-byte instruction type, then one or two extra
memory fetch cycles are required to fetch the operand and operand address. It is
similar to an instruction fetch cycle except that the quantity fetched is an address
or data. Each operation requires one clock period.

Instruction Execution
 Fetch the contents of the memory location pointed to by the PC. The contents of this
location are loaded into the IR (fetch phase).
IR ← [PC]
 Assuming that the memory is byte addressable, increment the contents of the PC by 4
(fetch phase).
PC ← [PC] + 4
 Carry out the actions specified by the instruction in the IR (execution phase).
 Transfer a word of data from one processor register to another or to the ALU.
 Perform arithmetic or a logic operation and store the result in a processor register.
 Fetch the contents of a given memory location and load them into a processor register.
 Store a word of data from a processor register into a given memory location.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 37
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

1.13 MACHINE CYCLE

We know that, an instruction cycle is combination of fetch cycle and execute cycle. The
execute cycle may consists of zero or more fetch cycles which may be required to fetch the
operand. All these operations are performed in different time slots is known as machine cycle.
(OR)
One can also define the machine cycle as the time required to complete one operation of
accessing memory, I/O or acknowledging an external request. It consists of 3 to 6 T states.

T – State:
It is defined as sub-division of one clock pulse pr period. The clock period is
synchronized with the system clock.

Figure shows the flowchart for instruction cycle. It shows how the control determines the
instruction type after the decoding. The decoder output D7 is equal to 1 if the operation code is
equal to binary 111. If D7 = 1, the instruction must be a register reference instructions. If D 7 =0 ,
the operation code must be one of the other seven values 000 through 110 called memory
reference instructions.

Figure: Flowchart for Instruction Cycle

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 38
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

Control then inspects the value of the 1st bit of the instruction which is available in flip-
flop I. if D7=0 and I=1, we have memory reference instruction with an indirect address. if D7=1
and I=0, is called register reference instruction. These instructions use bits 0 through 11 of the
instruction code to specify one of 12 instructions. These 12 bits are available in IR(0–11). They
were also transferred to AR during time T 1.

Table: Execution of Register Reference Instrution

D7I’T3 = r (Common to all register reference instructions)
IR(t) = Bi (bit in IR (0 – 11) that specifies the operation
r: SC  0 Clear SC
CLA rB11: AC  0 Clear AC
CLE rB10: E0 Clear E
CMA rB9: AC  AC Complement AC
CME rB8: E E Complement E
CIR rB7: AC  shr AC, AC(15)  E, E  AC(0) Circulate Right
CIL rB6: AC  shl AC, AC(0)  E, E  AC(15) Circulate Left
INC rB5: AC  AC + 1 Increment AC
SPA rB4: If (AC(15) = 0) then (PC  PC + 1) Skip if Positive
SNA rB3: If (AC(15) = 1) then (PC  PC + 1) Skip if Negative
SZA rB2: If (AC = 0) then (PC  PC + 1) Skip if AC Zero
SZE rB1: If (E = 0) then (PC  PC + 1) Skip if E Zero
HLT rB0: S  0 (S is a start –stop flip flop) Halt Computer

Table: Memory Reference Instruction

Symbol Operation Symbolic Description

Decoder
AND D0 AC  AC  M[AR]
ADD D1 AC  AC + M[AR], E Cout
LDA D2 AC  M[AR]
STA D3 M[AR]  AC
BUN D4 PC  AR
BSA D5 M[AR]  PC, PC  AR + 1
ISZ D6 If M[AR] + 1 = 0, then PC  PC + 1

Table: Input – Output Instruction

D7IT3 = p (Common to all input – output instructions)
IR(i) = Bi (bit in IR (6 – 11) that specifies the instruction)
p: SC  0 Clear SC
INP pB11: AC (0 – 7)  INPR, FGI  0 Input Character
OUT pB10: OUTR  AC (0 – 7), FGO  0 Output Character
SKI pB9: If (FGI = 1) then (PC  PC + 1) Skip on input flag
SKO pB8: If (FGI = 0) then (PC  PC + 1) Skip n output flag
ION pB7: IEN  1 Interrupt enable ON
IOF pB6: IEN  0 Interrupt enable OFF
UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 39
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

1.14 Program Interrupt

The process of communication is referred as programmed control transfer. The computer

keeps checking the flag bit, and when it finds it set, it initiates an information transfer. The
difference of information flow rate between the computer and that of the input–output device
makes this type of transfer inefficient.

When the computer is running a program and interrupt flag is set, it is automatically
interrupted from the current program. The interrupt enable flip-flop IEN can be set and cleared
with two instructions.

When IEN is cleared to 0 (with the IOF instruction), the computer cannot interrupt.
When IEN is set to 1 (with the ION instruction), the computer can be interrupted. These two
instructions provide the programmer with the capability of making a decision as to whether or
not to use the interrupt facility.

The way that the interrupt is handled by the computer can be shown in figure.

Figure: Flowchart for an Interrupt Cycle

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 40
 JNTUH R22 - Computer Organization and Architecture – Unit –I Sept.
Lecture Notes - By Prof.Dr.P.Ramasubramanian, P&P/MIETW 2024

An interrupt flip-flop R is included in the computer. When R = 0, the computer goes

through an instruction cycle. During the execute phase of the instruction cycle IEN is checked
by the control. If it is 0, it indicates that the programmer does not want to use the interrupt, so
control continues with the next instruction cycle.

If IEN is 1, control checks the flag bits. If both flags are 0, it indicates that neither the
input nor the output registers are ready for transfer of information. In this case, control continues
with the next instruction cycle.
If either flag is set to 1 while IEN = 1, flip-flop R is set to 1. At the end of the execute
phase, control checks the value of R, and if it is equal to 1, it goes to an interrupt cycle instead of
an instruction cycle.

The interrupt cycle is a hardware implementation of a branch and save return address
operation. The return address available in PC is stored in a specific location where it can be
found later when the program returns to the instruction at which it was interrupted. This location
may be a processor register, a memory stack, or a specific memory location.

Here we choose the memory location at address 0 as the place for storing the return
address. Control then inserts address 1 into PC and clears IEN and R so that no more
interruptions can occur until the interrupt request from the flag has been serviced.

UNIT- I: DIGITAL COMPUTERS: Introduction Block diagram of digital computer – Definition of computer organization – computer design and computer
arithmetic. REGISTER TRANSFER LANGUAGE AND MICRO OPERATIONS: Register Transfer Language – Register transfer, Bus and memory transfer –
Arithmetic micro operations, Logic micro operations, Shift micro operations, and Arithmetic logic shift unit. BASIC COMPUTER ORGANIZATION AND
DESIGN: Instruction codes – computer registers – computer instructions – Timing and control – Instruction cycle – memory reference instructions – Input-Output
and Interrupt. Page 41