UNIT III

MEMORY ORGANIZATION

Memory Hierarchy Design and its Characteristics

In the Computer System Design, Memory Hierarchy is an enhancement to organize the memory such
that it can minimize the access time. The Memory Hierarchy was developed based on a program
behavior known as locality of references. The figure below clearly demonstrates the different levels
of the memory hierarchy.

Types of Memory Hierarchy

This Memory Hierarchy Design is divided into 2 main types:

• External Memory or Secondary Memory: Comprising of Magnetic Disk, Optical Disk, and
Magnetic Tape i.e. peripheral storage devices which are accessible by the processor via an
I/O Module.
• Internal Memory or Primary Memory: Comprising of Main Memory, Cache Memory & CPU
registers . This is directly accessible by the processor.
Memory Hierarchy Design

1. Registers

Registers are small, high-speed memory units located in the CPU. They are used to store the most
frequently used data and instructions. Registers have the fastest access time and the smallest storage
capacity, typically ranging from 16 to 64 bits.
2. Cache Memory

Cache memory is a small, fast memory unit located close to the CPU. It stores frequently used data
and instructions that have been recently accessed from the main memory. Cache memory is designed
to minimize the time it takes to access data by providing the CPU with quick access to frequently used
data.
3. Main Memory

Main memory, also known as RAM (Random Access Memory), is the primary memory of a computer
system. It has a larger storage capacity than cache memory, but it is slower. Main memory is used to
store data and instructions that are currently in use by the CPU.
Types of Main Memory

• Static RAM: Static RAM stores the binary information in flip flops and information remains
valid until power is supplied. It has a faster access time and is used in implementing cache
memory.
• Dynamic RAM: It stores the binary information as a charge on the capacitor. It requires
refreshing circuitry to maintain the charge on the capacitors after a few milliseconds. It
contains more memory cells per unit area as compared to SRAM.
4. Secondary Storage

Secondary storage, such as hard disk drives (HDD) and solid-state drives (SSD), is a non-volatile
memory unit that has a larger storage capacity than main memory. It is used to store data and
instructions that are not currently in use by the CPU. Secondary storage has the slowest access time
and is typically the least expensive type of memory in the memory hierarchy.
5. Magnetic Disk

Magnetic Disks are simply circular plates that are fabricated with either a metal or a plastic or a
magnetized material. The Magnetic disks work at a high speed inside the computer and these are
frequently used.
6. Magnetic Tape

Magnetic Tape is simply a magnetic recording device that is covered with a plastic film. It is generally
used for the backup of data. In the case of a magnetic tape, the access time for a computer is a little
slower and therefore, it requires some amount of time for accessing the strip.
Characteristics of Memory Hierarchy

• Capacity: It is the global volume of information the memory can store. As we move from top
to bottom in the Hierarchy, the capacity increases.
• Access Time: It is the time interval between the read/write request and the availability of the
data. As we move from top to bottom in the Hierarchy, the access time increases.
• Performance: Earlier when the computer system was designed without a Memory Hierarchy
design, the speed gap increased between the CPU registers and Main Memory due to a large
difference in access time. This results in lower performance of the system and thus,
enhancement was required. This enhancement was made in the form of Memory Hierarchy
Design because of which the performance of the system increases. One of the most significant
ways to increase system performance is minimizing how far down the memory hierarchy one
has to go to manipulate data.
• Cost Per Bit: As we move from bottom to top in the Hierarchy, the cost per bit increases i.e.
Internal Memory is costlier than External Memory.
Advantages of Memory Hierarchy

• It helps in removing some destruction, and managing the memory in a better way.
• It helps in spreading the data all over the computer system.
• It saves the consumer’s price and time.

What is the Main Memory?

The main memory is the fundamental storage unit in a computer system. It is associatively large and
quick memory and saves programs and information during computer operations. The technology that
makes the main memory work is based on semiconductor integrated circuits.

RAM is the main memory. Integrated circuit Random Access Memory (RAM) chips are applicable in
two possible operating modes are as follows −

• Static − It consists of internal flip-flops, which store the binary information. The stored data
remains solid considering power is provided to the unit. The static RAM is simple to use and
has smaller read and write cycles.
• Dynamic − It saves the binary data in the structure of electric charges that are used to
capacitors. The capacitors are made available inside the chip by Metal Oxide Semiconductor
 (MOS) transistors. The stored value on the capacitors contributes to discharge with time and
thus, the capacitors should be regularly recharged through stimulating the dynamic memory.

Random Access Memory

The term Random Access Memory or RAM is typically used to refer to memory that is easily read
from and written to by the microprocessor. For a memory to be called random access, it should be
possible to access any address at any time. This differentiates RAM from storage devices such as tapes
or hard drives where the data is accessed sequentially.

RAM is the main memory of a computer. Its objective is to store data and applications that are currently
in use. The operating system controls the usage of this memory. It gives instructions like when the
items are to be loaded into RAM, where they are to be located in RAM, and when they need to be
removed from RAM.

Read-Only Memory
In each computer system, there should be a segment of memory that is fixed and unaffected by power
failure. This type of memory is known as Read-Only Memory or ROM.

Most of the main memory in a general-purpose computer is made up of RAM integrated circuit chips,
but a portion of the memory may be constructed with ROM chips. Originally, RAM was used to refer
to a random-access memory, but now it is used to designate a read/write memory to distinguish it from
a read-only memory, although ROM is also random access. RAM is used for storing the bulk of the
programs and data that are subject to change. ROM is used for storing programs that are permanently
resident in the computer and for tables of constants that do not change in value once the production of
the computer is completed. Among other things, the ROM portion of main memory is needed for
storing an initial program called a bootstrap loader. The bootstrap loader is a program whose function
is to start the computer software operating when power is turned on. Since RAM is volatile, its contents
are destroyed when power is turned off. The contents of ROM remain unchanged after power is turned
off and on again. The startup of a computer consists of turning the power on and starting the execution
of an initial program. Thus, when power is turned on, the hardware of the computer sets the program
counter to the bidirectional bus SECTION 1 2·2 Main Memory 449 first address of the bootstrap loader.
The bootstrap program loads a portion of the operating system from disk to main memory and control
is then transferred to the operating system, which prepares the computer for general use
RAM and ROM Chips
A RAM chip is better suited for communication with the CPU if it has one or more control inputs that
select the chip only when needed. Another common feature is a bidirectional data bus that allows the
transfer of data either from memory to CPU during a read operation, or from CPU to memory during
a write operation. A bidirectional bus can be constructed with three-state buffers. A three-state buffer
output can be placed in one of three possible states: a signal equivalent to logic 1, a signal equivalent
to logic 0, or a high impedance state. The logic 1 and 0 are normal digital signals. The high impedance
state behaves like an open circuit, which means that the output does not carry a signal and has no logic
significance.

The block diagram of a RAM chip is shown in Fig. (A). The capacity of the memory is 128 words of
eight bits (one byte) per word. This requires a 7-bit address and an 8-bit bidirectional data bus. The
read and write inputs specify n the memory operation and the two chips select (CS) control inputs are
for enabling the chip only when it is selected by the microprocessor. The availability of more than one
control input to select the chip facilitates the decoding of the address lines when multiple chips are
used in the microcomputer. The read and write inputs are sometimes combined into one line labeled
R/W. When the chip is selected, the two binary states in this line specify the two operations of read or
write.

Fig. (a) Block Diagram of RAM Chip

The function table listed in Fig. (b) specifies the operation of the RA.\� chip. The unit is in operation
only when CS1 = 1 and CS2 = 0. The bar on tor of the second select variable indicates that this input
is enabled when it is equa.: to 0. If the chip select inputs are not enabled, or if they are enabled but the
read or write inputs are not enabled, the memory is inhibited and its data bus is in a high-impedance
state. When CS1 = 1 and CS2 = 0, the memory can be placed in a write or read mode. When the WR
input is enabled, the memory stores a byte from the data bus into a location specified by the address
input lines. When the RD input is enabled, the content of the selected byte is placed into the data bus.
The RD and WR signals control the memory operation as well as the bus buffers associated with the
bidirectional data bus.

Fig. (b) Function Table

Fig. (c) Block Diagram of ROM Chip

A ROM chip is organized externally in a similar manner. However, since a ROM can only
read, the data bus can only be in an output mode. The block diagram of a ROM chip is shown in Fig.
(C). For the same-size chip, it is possible to have more bits of ROM than of RAM, because the internal
binary cells in ROM occupy less space than in RAM. For this reason, the diagram specifies a 512-byte
ROM, while the RAM has only 128 bytes. The nine address lines in the ROM chip specify any one of
the 512 bytes stored in it. The two chip select inputs must be CS1 = 1 and CS2 = 0 for the · unit to
operate. Otherwise, the data bus is in a high-impedance state. There is no need for a read or write
control because the unit can only read. Thus, when the chip is enabled by the two select inputs, the
byte selected by the address lines appears on the data bus.

Memory Address Map

The addressing of memory can be established by means of a table that specifies the memory address

assigned to each chip. The table, called a memory address map, is a pictorial representation of

assigned address space for each chip in the system.

To demonstrate with a particular example, assume that a computer system needs 512 bytes of RAM

and 512 bytes of ROM. The RAM and ROM chips to be used are specified in Figs. (a) and (c). The

memory address map for this configuration is shown in Table .

The component column specifies whether a RAM or a ROM chip is used. The hexadecimal address

column assigns a range of hexadecimal equivalent addresses for each chip. The address bus lines are

listed in the third column. Although there are 16 lines in the address bus, the table shows only 10 lines

because the other 6 are not used in this example and are assumed to be zero. The small x's under the

address bus lines designate those lines that must be connected to the address inputs in each chip. The

RAM chips have 128 bytes and need seven address lines. The ROM chip has 512 bytes and needs 9

address lines. The x's are always assigned to the low-order bus lines: lines 1 through 7 for the RAM

and lines 1 through 9 for the ROM. It is now necessary to distinguish between four RAM chips by

assigning to each a different address. For this particular example we choose bus lines 8 and 9 to

represent four distinct binary combinations. Note that any other pair of unused bus lines can be chosen

for this purpose. The table clearly shows that the nine low-order bus lines constitute a memory space

for RAM equal to 29 = 512 bytes. The distinction between a RAM and ROM address is done with
another bus line. Here we choose line 10 for this purpose. When line 10 is 0, the CPU selects a RAM,

and when this line is equal to 1, it selects the ROM.

The equivalent hexadecimal address for each chip is obtained from the information under the address

bus assignment. The address bus lines are subdivided into groups of four bits each so that each group

can be represented with a hexadecimal digit. The first hexadecimal digit represents lines 13 to 16 and

is always 0. The next hexadecimal digit represents lines 9 to 12, but lines 11 and 12 are always 0. The

range of hexadecimal addresses for each component is determined from the x's associated with it. These

x's represent a binan· number that can range from an all-O's to an all-1's value.
Cache Memory

Cache memory is a small, high-speed storage area in a computer. The cache is a smaller and
faster memory that stores copies of the data from frequently used main memory locations. There
are various independent caches in a CPU, which store instructions and data. The most important
use of cache memory is that it is used to reduce the average time to access data from the main
memory.
By storing this information closer to the CPU, cache memory helps speed up the overall
processing time. Cache memory is much faster than the main memory (RAM). When the CPU
needs data, it first checks the cache. If the data is there, the CPU can access it quickly. If not, it
must fetch the data from the slower main memory.

Characteristics of Cache Memory

• Cache memory is an extremely fast memory type that acts as a buffer between RAM and
the CPU.
• Cache Memory holds frequently requested data and instructions so that they are
immediately available to the CPU when needed.
• Cache memory is costlier than main memory or disk memory but more economical than
CPU registers.
• Cache Memory is used to speed up and synchronize with a high-speed CPU.

Cache Performance

When the processor needs to read or write a location in the main memory, it first checks for a
corresponding entry in the cache.
• If the processor finds that the memory location is in the cache, a Cache Hit has occurred
and data is read from the cache.
• If the processor does not find the memory location in the cache, a cache miss has
occurred. For a cache miss, the cache allocates a new entry and copies in data from the
main memory, then the request is fulfilled from the contents of the cache.
The performance of cache memory is frequently measured in terms of a quantity called Hit ratio.
Hit Ratio(H) = hit / (hit + miss) = no. of hits/total accesses
Miss Ratio = miss / (hit + miss) = no. of miss/total accesses = 1 -
hit ratio(H)

We can improve Cache performance using higher cache block size, and higher associativity,
reduce miss rate, reduce miss penalty, and reduce the time to hit in the cache.

Cache Mapping
There are three different types of mapping used for the purpose of cache memory which is as
follows:
• Direct Mapping
• Associative Mapping
• Set-Associative Mapping

1. Direct Mapping

The simplest technique, known as direct mapping, maps each block of main memory into only
one possible cache line. or In Direct mapping, assign each memory block to a specific line in the
cache. If a line is previously taken up by a memory block when a new block needs to be loaded,
the old block is trashed. An address space is split into two parts index field and a tag field. The
cache is used to store the tag field whereas the rest is stored in the main memory. Direct
mapping`s performance is directly proportional to the Hit ratio.
i = j modulo m
where
i = cache line number
j = main memory block number
m = number of lines in the cache
For purposes of cache access, each main memory address can be viewed as consisting of three
fields. The least significant w bits identify a unique word or byte within a block of main memory.
In most contemporary machines, the address is at the byte level. The remaining s bits specify
one of the 2 s blocks of main memory. The cache logic interprets these s bits as a tag of s-r bits
(the most significant portion) and a line field of r bits. This latter field identifies one of the
m=2 r lines of the cache. Line offset is index bits in the direct mapping.
2. Associative Mapping
In this type of mapping, associative memory is used to store the content and addresses of the
memory word. Any block can go into any line of the cache. This means that the word id bits are
used to identify which word in the block is needed, but the tag becomes all of the remaining bits.
This enables the placement of any word at any place in the cache memory. It is considered to be
the fastest and most flexible mapping form. In associative mapping, the index bits are zero.

3. Set-Associative Mapping
This form of mapping is an enhanced form of direct mapping where the drawbacks of direct
mapping are removed. Set associative addresses the problem of possible thrashing in the direct
mapping method. It does this by saying that instead of having exactly one line that a block can
map to in the cache, we will group a few lines together creating a set . Then a block in memory
can map to any one of the lines of a specific set. Set-associative mapping allows each word that
is present in the cache can have two or more words in the main memory for the same index
address. Set associative cache mapping combines the best of direct and associative cache
mapping techniques. In set associative mapping the index bits are given by the set offset bits. In
this case, the cache consists of a number of sets, each of which consists of a number of lines.
 Set-Associative Mapping – Structure
Advantages
• Cache Memory is faster in comparison to main memory and secondary memory.
• Programs stored by Cache Memory can be executed in less time.
• The data access time of Cache Memory is less than that of the main memory.
• Cache Memory stored data and instructions that are regularly used by the CPU,
therefore it increases the performance of the CPU.
Disadvantages
• Cache Memory is costlier than primary memory and secondary memory .
• Data is stored on a temporary basis in Cache Memory.
• Whenever the system is turned off, data and instructions stored in cache memory get
destroyed.
• The high cost of cache memory increases the price of the Computer System.
Virtual Memory

Virtual Memory is a storage allocation scheme in which secondary memory can be addressed
as though it were part of the main memory. The addresses a program may use to reference
memory are distinguished from the addresses the memory system uses to identify physical
storage sites and program-generated addresses are translated automatically to the corresponding
machine addresses.
What is Virtual Memory?
Virtual memory is a memory management technique used by operating systems to give the
appearance of a large, continuous block of memory to applications, even if the physical memory
(RAM) is limited. It allows the system to compensate for physical memory shortages, enabling
larger applications to run on systems with less RAM.
A memory hierarchy, consisting of a computer system’s memory and a disk, enables a process
to operate with only some portions of its address space in memory. A virtual memory is what its
name indicates- it is an illusion of a memory that is larger than the real memory. We refer to the
software component of virtual memory as a virtual memory manager. The basis of virtual
memory is the noncontiguous memory allocation model. The virtual memory manager removes
some components from memory to make room for other components.
The size of virtual storage is limited by the addressing scheme of the computer system and the
amount of secondary memory available not by the actual number of main storage locations.
Working of Virtual Memory
It is a technique that is implemented using both hardware and software. It maps memory
addresses used by a program, called virtual addresses, into physical addresses in computer
memory.
• All memory references within a process are logical addresses that are dynamically
translated into physical addresses at run time. This means that a process can be swapped
in and out of the main memory such that it occupies different places in the main memory
at different times during the course of execution.
• A process may be broken into a number of pieces and these pieces need not be
continuously located in the main memory during execution. The combination of dynamic
run-time address translation and the use of a page or segment table permits this.
If these characteristics are present then, it is not necessary that all the pages or segments are
present in the main memory during execution. This means that the required pages need to be
loaded into memory whenever required. Virtual memory is implemented using Demand Paging
or Demand Segmentation.
Types of Virtual Memory
In a computer, virtual memory is managed by the Memory Management Unit (MMU), which is
often built into the CPU. The CPU generates virtual addresses that the MMU translates into
physical addresses.
There are two main types of virtual memory:
• Paging
• Segmentation