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CCE - Class 16 and Lab 9

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0% found this document useful (0 votes)
11 views7 pages

CCE - Class 16 and Lab 9

Uploaded by

shreeshivaani28
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ARM Cortex M4

TimerA, ADC, and Interrupt


Dr. C. GANESH KUMAR
TimerA Program (Compare)
#include "msp.h"
int main(void)
{
P2->SEL1 &= ~1;
P2->SEL0 &= ~1;
P2->DIR |= 1;
TIMER_A1->CTL = 0x02D4; /* SMCLK, ID=/8, Up Mode, TA Clear = Resets TAxR */
TIMER_A1->EX0 = 7; /* IDEX = /8 */
TIMER_A1->CCR[0] = 46874; /* For 1 Second */

while (1)
{
while((TIMER_A1->CCTL[0] & 1) == 0); /* Wait Until CCIFG is Set */
TIMER_A1->CCTL[0] &= ~1; /* Clear Interrupt Flag */
P2->OUT ^= 1;
} 0x40000402 → Set to 1 for Toggling
}
To See Output → Set *((unsigned long*)0x40004C03)
in Logic Analyzer
2
15-03-2023 Embedded Computing Lab (19CCE283)
1. Keil - ADC
#include "msp.h" ADC14->CTL1 |= 0x00050000; /*convert for mem reg 5
int main(void) */
{ ADC14->CTL0 |= 2; /*enable ADC after configuration*/
int result;
P2->SEL0 &= ~7; while (1)
P2->SEL1 &= ~7; {
P2->DIR |= 7; ADC14->CTL0 |= 1; /* start a conversion */
ADC14->CTL0 = 0x00000010; /* power on and while (!ADC14->IFGR0); /* wait till conversion
disabled during configuration */ complete */
ADC14->CTL0 |= 0x04080300; /* S/H pulse mode, result = ADC14->MEM[5]; /*read conversion result*/
sysclk, 32 sample clocks, software trigger */ P2->OUT = result; /* Conversion Result in LED*/
ADC14->CTL1 = 0x00000020; /* 12-bit resolution */ }
ADC14->MCTL[5] = 6; /* A6 input, single-ended, }
Vref=AVCC */ OUTPUT:
Conversion Complete: SET 0x40012144 = 01
P4->SEL1 |= 0x80; /* Configure P4.7 for A6 */ ADC14 - MEM [5] SET “Value”  0x400120AC  SET “Value”
P4->SEL0 |= 0x80; Final, P2OUT  0x400120AC “Value” will be displayed

3
15-03-2023 Embedded Computing Lab (19CCE283)
2. Keil - ADC
#include "msp.h" void UART0_puts(char* s)
#include <stdio.h> {
void UART0_init(void) while (*s != 0) /* if not end of string */
{ UART0_putchar(*s++); /* send the character
EUSCI_A0->CTLW0 |= 1; /* put in reset mode for config */
through UART0 */
EUSCI_A0->MCTLW = 0; /* disable oversampling */
EUSCI_A0->CTLW0 = 0x0081; /* 1 stop, parity, SMCLK, 8-bit*/
}
EUSCI_A0->BRW = 26; /* 3000000 / 115200 = 26 */ void delayMs(int n)
P1->SEL0 |= 0x0C; /* P1.3, P1.2 for UART */ {
P1->SEL1 &= ~0x0C; int j;
EUSCI_A0->CTLW0 &= ~1; /* take UART out of reset mode */ for (j = 0; j < n; j++);
} }
void UART0_putchar(char c) int main(void)
{ {
while(!(EUSCI_A0->IFG&0x02)) { } /* wait for transmit buffer
int result;
empty */
EUSCI_A0->TXBUF = c; /* send a char */
char buffer[20];
} UART0_init();
4
15-03-2023 Embedded Computing Lab (19CCE283)
2. Keil – ADC (Cont …)
while (1)
ADC14->CTL0 = 0x00000010; /* power on */ {
ADC14->CTL0 |= 0x04080300; /* S/H pulse mode, ADC14->CTL0 |= 1; /* start a conversion */
sysclk, 32 sample clocks, software trigger */ while (!ADC14->IFGR0); /* wait till conversion
ADC14->CTL1 = 0x00000030; /* 14-bit resolution */ complete */
ADC14->MCTL[2] = 1; /* A1 input, single-ended, result = ADC14->MEM[2]; /* read conversion result
Vref=AVCC */ */
P5->SEL1 |= 0x10; /* Configure P5.4 for A1 */ result = result * 330 / 16384; /* scale to degree for
P5->SEL0 |= 0x10; display */
ADC14->CTL1 |= 0x00020000; /* convert for mem sprintf(buffer, "%d\r\n", result); /* convert it to char
reg 2 */ string */
ADC14->CTL0 |= 2; /* enable ADC after UART0_puts(buffer); /* send it out through UART0
configuration*/ */
delayMs(10000);
}
}
5
15-03-2023 Embedded Computing Lab (19CCE283)
Interrupt
#include "msp.h" while(1) /* toggle the Green LED (P2.1) continuously */
void delayMs(int n) {
{ P2->OUT |= 0x02;
int j;
delayMs(100000);
for (j = 0; j < n; j++);
} P2->OUT &= ~0x02;
int main(void) delayMs(100000);
{ }
P1->SEL1 &= ~0x10; /* configure P1.4 as simple I/O */ }
P1->SEL0 &= ~0x10; void PORT1_IRQHandler(void)
P1->DIR &= ~0x10; /* P1.4 set as input */ {
P1->REN |= 0x10; /* P1.4 pull resistor enabled */ int i;
P1->IES |= 0x10; /* Interrupt trigger on high-to-low transition */
for (i = 0; i < 3; i++) /* toggle Blue LED (P2.2) three times */
P1->IFG = 0; /* Clear pending interrupt flags */
P1->IE |= 0x10; /* Enable interrupt from P1.4 */ {
P2->OUT |= 0x04;
P2->SEL1 &= ~6; /* configure P2.2-P2.1 as simple I/O */ delayMs(100000);
P2->SEL0 &= ~6; P2->OUT &= ~0x04;
P2->DIR |= 6; /* P2.2-2.1 set as output */ delayMs(100000);
}
NVIC_EnableIRQ(PORT1_IRQn); /* enable interrupt in NVIC */ P1->IFG &= ~0x10; /* clear the interrupt flag before return */
6
15-03-2023
Embedded Computing Lab (19CCE283) }
Interrupt Registers
PxIES Register: Interrupt Edge Select

PxIE Register: Interrupt Enable

PxIFG Register: Interrupt Flag

7
15-03-2023 Embedded Computing Lab (19CCE283)

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