PCIe (Peripheral Component Interconnect Express),

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1. What is PCI Express and what is it for?
According to Wikipedia's definition, PCI Express (Peripheral Component Interconnect
Express), abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus
standard designed to replace the older PCI, PCI-X, and AGP bus standards. As one of the
high-speed buses in computers, PCI-E is not only a data channel, but also a network
motherboard interface. The latter is a long slot on the control panel.

PCIe is the most important bus in a server system because signals are transmitted through PCIe,
which allows the CPU to communicate with various external devices. If you compare every bit of
data to a small machine, then the PCIe bus is like a two-way strip. But the PCIe specification has its
own speed limit, which indicates that the more lanes that exist, the higher the speed will be, i.e.,
there will be more data traffic being transmitted.
2. Current status and future of PCI-E:
The PCIe 6.0 base specification has released a draft version of 0.5, and the PCIe 6.0 standard has
completed the interpretation of version 0.5, which is expected to be launched off. This is expected to
happen in 2021. However, the PCIe 6.0 CEM specification is still under consideration by the PCI-
SIG.

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 The blue lane highlights the PCIe bus.
Meanwhile, the Intel-supported PCIe 4.0 Ice Lake Xeon-SP processor is due to be released later this
year, while AMD's PCIe 4.0-enabled EPYC processor, as well as numerous ARM processors, are
slowly going on sale. As a result, PCIe 4.0 will become mainstream in the market in 2021,
prompting cable manufacturers and suppliers to think about where PCI-E cables are going.
The PCIe 7.0 specification is intended to provide a data rate of 128 GT/s, providing a doubling of
the data rate of the PCIe 6.0 specification. PCIe 7.0 technology is targeted to be a scalable
interconnect solution for data-intensive markets like Artificial Intelligence/Machine Learning, Data
Center, HPC, Automotive, IoT, and Military/Aerospace.
PCIe 7.0 Specification Feature Goals
Delivering 128 GT/s raw bit rate and up to 512 GB/s bi-directionally via x16 configuration

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Utilizing PAM4 (Pulse Amplitude Modulation with 4 levels) signaling
Focusing on maintaining the channel parameters and reach
Continuing to deliver the low-latency and high-reliability targets
Improving power efficiency
Maintaining backwards compatibility with all previous generations of PCIe technology
3. PCIe vs. PCI: The Evolution and Spread of PCIe Gen:
PCI was born in 1992 with a PCI bus bandwidth of 133 MB/s. After that, Intel raised the bus status
bit to 64 on a transfer request in the server area. Thus, 2 new PCI buses were created with a clock
speed of 64 bit / 33 MHz and 64 bit / 66 MHz with data rates of 266 Mbps and 533 Mbps
respectively.
In terms of graphics cards, Intel individually developed AGP (Accelerated Graphics Port) and
released the "1 AGP specification" in 0.1997 with a 32-bit bus operating at 66 MHz and a bandwidth
of 266 Mbps. The subsequent AGP 2.0 specification documented 1.5 V signal transmission that
could be used at 2x and 4x, and the hunger rate at 4x could be as high as 1 Gbps. Technically
speaking, AGP is not a true bus standard, as only one device, i.e. a graphics card, can be connected
to it.
For server applications, several manufacturers and vendors, including IBM, HP, and Compaq, are
collaboratively developing PCI-X standards and received approval in 1998. The 64-bit 133 MHz
specification states that PCI supports a maximum bandwidth of 1 GB/s in each direction.
The PCI-X 2.0 and PCI-X 3.0 specifications upgraded the clock speed from 266 MHz, through 533
MHz to even 1 GHz. But by that time, there were problems with PCI-X. On the one hand, the
crosstalk of the parallel signal arose due to the increase in clock frequency, on the other hand, there
was competition for resources caused by the common bus. In short, although the specifications are
updated, the actual effect may not match these figures.

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 PCIe Network Interface Card
In this regard, Intel officially announced its third generation I/O technology to replace the PCI bus at
the Intel Spring IDF conference in 2001. This standard was developed by AWG (Arapahoe Working
Group) with the support of Intel and is called 3rd generation I/O, also 3GIO.
Obviously, Intel indicated that this meant the next-generation I/O interface specification and was not
called PCI-Express until it was submitted to the PCI-SIG (PCI Special Interest Group) and received
approval.
4. Shared PCIe Slots:
According to the specifications provided by PCI-SIG, there are 7 versions of PCI-E x1, x2, x4, x8,
x12, x16 and x32 slots, corresponding to 1/2/4/8/12/16/32 channels. of which PCI-E x32 is only used
in some special cases due to volume problems, and the corresponding mass production products are
almost zero; PCI-E x12 is mainly applied in servers; Although PCI-E x2 is mainly used for internal
interfaces rather than expansion slots, even though some motherboards provide this interface, its
PCI-E x2 also mostly appears in the form of an M.2 interface rather than a PCI-E slot. . PCI Express
physical lanes can contain from 1 to 16 lanes, more precisely, "PCIe x8" connections have eight
data lanes. Therefore, the current main PCI-E slots on motherboards are mainly concentrated in four
PCI-E x1 / x4 / x8 / x16.
5. Advantages of PCI-E:

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PCI-e will replace PCI and AGP as a whole and achieve the uniform status of a high-speed serial
computer expansion bus standard. One of its advantageous features is the ability to transfer large
data transfer speeds, which can currently reach more than 10 GB/s, and it is expected to reach a new
level of transfer speed. In addition, there are many specifications for PCI Express from PCI Express
1X to PCI Express 16X, which can meet the needs of low-speed devices and high-speed devices that
will manifest in the future in a specific amount of time.

Overview of common PCIe slots x1, x4, x8, x16

PCI Express devices (hereinafter referred to as PCI-E) communicate through a logical connection
called an interconnection. or a link. A communication channel is a point-to-point communication
channel between two PCI Express ports. Compared to the PCI Shared Parallel Bus architecture and
earlier computer buses, each PCI-E device has its own dedicated connection and does not require
bandwidth to be queried from the entire bus.
In addition, it can increase the data transfer rate to a very high frequency and achieve high
bandwidth that is not available to PCI devices. Under the contract of the traditional PCI bus, which
can only achieve signal transmission in one direction in one period of time, the dual simplex PCI-E
connection can achieve higher transmission speed and quality. The difference between the two is
similar to half-duplex and full duplex.
6. What are the standard PCIe sizes?
The PCI-E interface depends on the bit depth of the bus, including X1, X4, X8, and X16, and X2
mode will be used for the internal interface instead of slot mode. The PCI-E specification ranges
from a 1-channel connection to a 32-channel connection, which provides very good scalability to
meet the data bandwidth requirements of various system devices. In addition, a shorter PCI-E card
can be inserted into a longer PCI-E slot in the application, and the PCI-E interface can also be hot-
swappable, which is considered an important milestone in the industry.

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The PCI Express standard defines channel widths × 1 (250 MB/s), × 2, × 4, × 8, × 12, × 16, and ×
32. But according to the current status of PCI-E, PCI-E x1 and PCI-E x16 are the two main
specifications. At the same time, many chipset manufacturers have added PCI-E X1 to the
southbridge chip list, and PCI-E X16 to the northbridge chip. In addition to the high data transfer
rate, each physical trace of PCI-E slots can provide more bandwidth than a conventional I/O
specification, since PCI-E transmits data through serial port data packets. In this way, it can reduce
the production cost and minimize the size of PCI-E devices. In addition, PCI-E also supports
advanced power management, hot-swappable, synchronous data transfer, and bandwidth
optimization for priority data transfer.
7. Different versions for PCI-E specification:
● PCI Express 1.0
In 2003, PCI-SIG introduced PCIe 1.0a, with a data transfer rate of 250 MB/s per lane and a transfer
rate of 2.5 gigabytes per second (GT/s). Since each byte is 10 bits (1 initial bit, 8 data bits, and 1 end
bit), the transfer rate is 2.5 GB/10 = 250 MB/s (250 megabytes per second). Therefore, it can be
calculated that the unidirectional transfer rate of PCI-E 16X is 250MB/s*16=4GB/s, and the
bidirectional transfer rate is 8GB/s.
● PCI Express 2.0
The PCI-SIG announced the availability of the PCI Express Base 2.0 specification on January 15,
2007. PCI-E 1X (2.0 standard) defines a one-way 5G data rate. Since each byte is 10 bits (1 initial
bit, 8 data bits, and 1 end bit), the unidirectional transmission rate is 5G / 10 = 500 MB / s (500
megabytes per second). Therefore, it can be concluded that the unidirectional transfer rate of PCI-E
16X (standard 2.0) is 500MB/s*16=8GB/s, the bidirectional transfer speed is 16GB/s, and the PCI-E
32X (standard 2.0) data transfer rate is 32GB/s.
● PCI E 3.0
In August 2007, the PCI-SIG announced that PCI Express 3.0 would transfer data at a rate of 8
gigabytes per second (GT/s). PCI-E 1X (3.0 standard) uses a unidirectional transfer rate of 10 Gbps
for transmission. Since each byte is 10 bits (1 initial bit, 8 data bits, and 1 end bit), the unidirectional
transfer rate is 10 Gbps/10 = 1000 MB/s (1000 megabytes per second). Therefore, we can conclude
that the PCI-E X16 (3.0 standard) one-way transfer speed is 1000MB/s*16=16GB/s, and the
bidirectional transfer speed is 32GB/s, the PCI-E X32 bidirectional transfer speed (3.0 standard) is
up to 64GB/s.

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 Various PCIe specifications: from PCI to PCIe 6.0
● PCI-E 4.0
The PCI-SIG tentatively announced PCI Express 4.0 on November 29, 2011, providing a data
transfer rate of 16 GT/s, which doubles the bandwidth provided by PCI Express 3.0. Therefore, the
speed of 16-channel bidirectional transmission can theoretically reach 512 GB/s, that is, 64 GB/s. In
addition, the PCI-E 4.0 standard optimizes storage devices with PCI-E interfaces, such as PCI-E
hard disk drives (HDDs) and PCI-E RAID cards, to benefit from the benefits of low PCI-E latency.
bus.
The PCI E 4.0 specifications also introduced OCuLink-2, an alternative to Thunderbolt promoted by
Intel. PCI-E OCuLink is based on PCI-E 3.0 and will use copper cables as the connection medium,
providing a minimum connection speed of 8 Gbps (PCI-E 3.0 x1) and a maximum of 32 Gbps (PCI-
E 3.0 x4).
● PCI-E 5.0
Since PCIe 5.0 increased the data transfer rate to 32 Gbps, the data transmission rate of the Ethernet
device reached 56 Gbps and approached 112 Gbps. In fact, the PCIe 5.0 signal is modulated by
NRZ, while the 5 Gbps Ethernet signal is modulated by the PAM0 method and the main frequency.
8. Link Speed and Bandwidth for Shared PCIe Slots:
The following table shows the bit rate according to different standards and different bit depths.

PCI-E RAW Bit Link BW / Total BW

Specification Rate BW lane. x16
PCIe 1.x 2.5 GT/s 2Gb / s 250MB/s 8GB / s

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 PCIe 2.x 5.0 GT/s 4Gb / s 500MB/s 16GB / s
PCIe 3.x 8.0 GT/s 8Gb / s ~1 GB/s ~32 GB/s
PCIe 4.0 16 GT/s 16Gb / s ~2 GB/s ~64 GB/s
PCIe 5.0 32 GT/s 32Gb / s ~4 GB/s ~128 GB/s
PCI Express Band width
The figure below shows the one-way bandwidth/data rate specified in the various versions of the
PCIe specifications.
Version x1 x4 x8 x16
PCIe 1.0 250MB/s 1GB / s 2GB / s 4GB / s
PCIe 2.0 500MB/s 2GB / s 4GB / s 8GB / s
PCIe 3.0 985MB/s 3.94GB / s 7.88GB / s 15.8GB / s
PCIe 4.0 1.97GB /s 7.88GB / s 15.8GB / s 31.5GB / s
PCIe 5.0 3.94GB / s 15.8GB / s 31.5GB / s 65.0GB / s
Bandwidth x1, x4, x8, x16 PCIe slots
Conclusion:
PCI Express works in consumer, server, and industrial applications as a motherboard-level
interconnect (to connect peripherals installed on the motherboard). PCIe has evolved from PCI,
created in 1992, to the current PCIe 5.0. Currently, the PCI-E slot on the motherboard serves as the
primary expansion slot. In addition to graphics card applications, PCI-E slots can also be used in
hardware such as independent sound cards, independent network cards, USB 3.0/3.1 interface
expansion cards, and SSDs.