COA Chapter 2
COA Chapter 2
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Objective
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Logic agates : AND,OR,NOT ,NAND,NOR,XOR
• The manipulation of binary information is done by logic circuit called
“gate”.
• Blocks of H/W that produce signals of binary 1 or 0 when input logic
requirements are satisfied.
• Digital Logic Gates : AND, OR, INVERTER, BUFFER, NAND, NOR, XOR,
XNOR
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Boolean Algebra
• Boolean algebra - Deals with binary variable (A, B, x, y: T/F or
1/0) + logic operation (AND, OR, NOT…)
• Boolean Function: variable + operation
F(x, y, z) = x + y’z
• Truth Table: Relationship between a function and variable
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Logic Diagram: Algebraic Expression Logic Diagram
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• For n input variables, there are 2n possible combinations of binary
input values.
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Half adder
• The combinational circuits that performs the arithmetic addition of
two bits.
• Figure: Half adders
• The logic diagram consists of an exclusive –OR gate and AND gate.
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Full adder
• It is a combinational circuit that forms the arithmetic sum of three input
bits. It consists of three inputs and two outputs.
• Two of the input variables, denoted by x and y, represents the two
significant bits to be added. The third input, z, represents the carry from
the previous.
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• The Boolean function for the carry out parts
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• The Boolean function for the two output:
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Decoders
• A binary code of n bits is capable of representing up to 2n distinct
elements of coded information.
• So decoders are combinational circuits that convert binary
information from n coded input to maximum of 2n unique outputs.
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Encoders
• Is digital circuits that perform the inverse operation of the decoders. It
has 2n input lines and n output lines.
• Example: truth table for octal –to- binary encoders
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Multiplexers
• It is combinational circuits that receives binary information from one of
2n input lines and direct it to a single output line. The selection of a
particular input data line for the output is determined by a set of
selection inputs.
• A 2n–to-1 multiplexer has 2n input and n input selection lines whose bit
combination determine which input data are selected for the output.
Figure: 4-to-1 line multiplexer
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Table: Function table for 4-to-1 line multiplexer
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Sequential Circuits: Flip-Flops, counters
• Sequential circuits consist of combinational circuits to which
memory elements are connected to form a feedback path.
• The memory elements are device capable of storing binary
information within them.
• The binary information stored in the memory elements at any
given time defines the state of the sequential circuits.
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Flip- Flops
• Is storage elements employed in clocked sequential circuits. It is a
binary cell capable of storing one bit of information.
• It has two outputs, one for the normal values and one for the
complement value of the bit stored in it.
• A flip-flop maintains a binary state until directed by the clock pulse
to switch the state. There are a number of different types of flip-
flops.
• There difference among them is in the number of inputs they
possess and the manner in which the inputs affect the binary state.
• The most common types of the FF are:
• SR Flip Flop
• D Flip-Flop
• JK Flip-Flop
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SR Flip-Flop
• It has three inputs, labeled S (for set), R (for reset), and C (for clock). It has
an output Q and sometimes the flip-flop has the complemented output,
which is indicated with circle at the other output terminals.
Figure SR- Flip-Flops
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• The operation of the SR Flip-Flop is:
• If there is no signal at the clock input C, the output of the
circuits cannot change irrespective of the values of the input S
and R.
• Only when the clock signal changes from the 0 to 1 can be
affected according to the values of the input S and R.
• If S =1 and R = 0 when C changes from 0 to 1, output Q is set to 1.
• If S = 0 and R =1 when C changes from 0 to 1, output cleared to 0.
• If both S and R are 0 during the clock transition, the output does not
change.
• When both S and R are equal to one, the output is unpredictable
and may go to either 0 or 1, depending on internal timing delays
that occur within the circuit.
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D (Data) Flip-Flop
• Is a slight modification of the SR flip flops. The D input is
sampled during the occurrence of a clock transition from 0 to 1.
• If D =1, the output of the flip-flop goes to the 1 state, but if D=0
, the output of the flip-flop goes to 0 states.
• Figure: D flip-flops
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JK Flip-Flop
• It is the refinement of the SR flip-flops in that the indeterminate
states of the SR is defined in the JK type.
• When the input J and K are both equal to 1 , a clock transition
switches the output of the flip flops to the complements state.
Figure: JK flip-flops
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Registers
• Is a group of flip-flops with each flip-flop capable of storing one
bit of information. An n bit register has a group of n flip-flop and
is capable of storing any binary information of n bits.
Figure: Four bits register
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