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Chapter 2 P5 Karnaugh Map

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Chapter 2 P5 Karnaugh Map

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21151057
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HCMH University of Technology and Education

Faculty of Electrical & Electronic Engineering

Lecture:
DIGITAL SYSTEMS
Chapter 2: Karnaugh Map

Assoc. Prof. Nguyen Thanh Hai, PhD


1
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
Karnaugh Map Method in used to create an expression for
drawing a minimum circuit. For example, if we want to design a
digital circuit and know its inputs/output states, we can find a
minimum expression, therefore, we can easily draw thin
minimum circuit using the minimum logic gates.
If a user requires us design a logic circuit, he/she need to provide
how many inputs? For example, two inputs are used for this
circuit, so there are 4 states (0 to 3) and he/she also need to
provide level 0/1 for each state of the output.
Therefore, we can design a St A B Y B B
truth table with two inputs and 0 0 0 1 A 10 01
an output as shown in Fig. 1 1 0 1 0 A 02 13
and then a Karnaugh map is 2 1 0 0 Fig. 2
built based on this truth table 3 1 1 1
as shown in Fig. 2 2
Assoc. Prof. Nguyen Thanh Hai Fig. 1
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
In Fig. 2, there are two inputs (A,B), in A/B can be 0/1, so we
must use A/B or A/B inverter, small numbers (0,1,2,3) in each
square are the corresponding states as in Table of Fig. 1.
Moreover, the outputs (1001) correspond to the states (0123) in
Table (Fig.1). Thus, we have designed a Karnaugh map as in
Fig. 2 and we check positions (1001) to be corresponding to the
position in Table. In particular, at the first position (state 0), its
output is level 1 equal to square ( A  B ), similarly, at the fourth
position (state 3), its output is level 1 equal to square ( AB ),
similar to the remaining positions.
St A B Y
B B 0 0 0 1
A 10 01 1 0 1 0
A 02 13 2 1 0 0
Fig. 2 3 1 1 1
3
Assoc. Prof. Nguyen Thanh Hai Fig. 1
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
Similarly, a logic circuit with 3 inputs and 1 output has the truth
table below. Therefore, we can design a Karnaugh map as below
based on information in Table, in which red numbers in the K-map
are the output levels which user require.
To perform basic K- loopings
St A B C Y in the next part, Characters
0 0 0 0 1 AB C and state index
1 0 0 1 1 ABC (0,1,2,3,4,5,6,7) need to
2 0 1 0 1 ABC arrange as in Karnaugh table
3 0 1 1 0 with 8 squares below.
4 1 0 0 0 C C
5 1 0 1 0 AB 10 1 1
6 1 1 0 1 ABC AB 12 0 3
7 1 1 1 0 AB 16 0 7
4
Assoc. Prof. Nguyen Thanh Hai AB 04 05
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
To easily create an expression, we need to study K_Looping
Groups of Two, Four, Eight and etc. In Fig. 1, K-map has two 1s
adjacent in column, similarly there are two 1s adjacent in row in
Fig. 2, so we can grouped them to create a K-looping and the
minimum output expression X as shown in Fig.1 and Fig. 2.
When we loop, it is correct when 1s in column/row, not in diagonal

C C C C
AB 00 01 AB 0 0
AB 12 0 3 X  ABC  ABC AB 1 1 X  A BC  A BC
AB 16 0 7  BC AB 0 0  AB
AB 04 05 AB 0 0
Fig. 1 Fig. 2 5
Assoc. Prof. Nguyen Thanh Hai
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
Similarly, we can study many different cases.
C C C C
AB 1 0 AB 0 1
X  AB C  AB C
AB 0 0 AB 0 1 X  ABC  ABC
AB 0 0  BC AB 0 1  ABC  ABC  C
AB 1 0 AB 0 1

BA BA BA BA BA BA BA BA

DC 0 0 0 1 03 02 DC 0 0 0 0

DC 0 0 5 0 7 06 DC 0 1 1 0
4
DC 1 113 115 114 DC 0 1 1 0
12
DC 0 8 09 011 010 DC 0 0 0 0
X  DC
6
Assoc. Prof. Nguyen Thanh Hai
X  CA
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
K_Looping Groups of Four

BA BA BA BA BA BA BA BA
DC 0 0 0 0 DC 1 0 0 1
DC 0 0 0 0 DC 0 0 0 0
DC 1 0 0 1 DC 0 0 0 0
DC 1 0 0 1 DC 1 0 0 1

X  AD X  AC
7
Assoc. Prof. Nguyen Thanh Hai
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
K_Looping Groups of Eight
BA BA BA BA BA BA BA BA
DC 0 0 0 0 DC 1 1 0 0
DC 1 1 1 1 1 1 0 0
X C DC
X B
DC 1 1 1 1 DC 1 1 0 0
DC 0 0 0 0 DC 1 1 0 0

BA BA BA BA BA BA BA BA

DC 1 1 1 1 DC 1 0 0 1
DC 0 0 0 0 DC 1 0 0 1
X C DC X A
DC 1 0 0 1 1 0 0 1
DC 1 1 1 1 DC 1 0 0 1
8
Assoc. Prof. Nguyen Thanh Hai Have a look more steps at P.127
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
Example 3.4:
B A BA BA BA
B A BA BA BA
DC 00 01 03 12 DC 00 01 13 02
DC 04 15 17 06 DC 14 15 17 16
DC 012 113 115 014 DC 112 113 015 014
DC 08 09 111 010 DC 08 09 011 010
X 
AB
C
D AC
  
ABD
Loop ( 2) Loop (5, 7 ,13,15) Loop (11,15)

X  
AB
D  C
B  C
D
Loop (3,7 ) Loop ( 4,5,12,13) Loop ( 4,5,6,7 )
9
Assoc. Prof. Nguyen Thanh Hai
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
Example 3.5:
B A BA BA BA B A BA BA BA

DC 00 11 03 02 DC 00 11 03 02
DC DC 04 15 17 16
04 15 17 16
DC 112 113 115 014 DC 012 013 015 114
DC 08 09 111 010 DC 18 19 011 110

X 
AD  
B BCD  
 B  
CD ABD
Loop (1,5) Loop ( 6,7 ) Loop (12,13) Loop (11,15)

X  
AD  
B BC
D  
BD  
C A
BD

Loop (1,5) Loop ( 6,7 ) Loop (8,9) Loop (10,14 )

10
Assoc. Prof. Nguyen Thanh Hai
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
Example: Given a logic circuit with 3 inputs A,B,C, the
output is High, only when from two inputs are High at the
same time.
a. Draw the truth table
b. Write the simplified expression using K-map
c. Draw the logic circuit based on question (b)

11
Assoc. Prof. Nguyen Thanh Hai
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map
Solution: a. Draw the truth table: Below figure, to find the level of
the output, we need to look at the inputs (A,B,C) and count if
A=B=1 or A=C=1 or B=C=1, it means that the output is 1.
b. Find the expression, we transfer levels
1/0 from the truth table into K-map as
St A B C Y bellow. Therefore, in this case, we have
0 0 0 0 0 3 K-loops.
1 0 0 1 0 - Loop (6,7)=AB;- Loop (3,7)=CB; - Loop
2 0 1 0 0 (5,7)=AC, The expression is
3 0 1 1 1 C C
4 1 0 0 0 X=AB+CB+AC
AB 00 0 1
5 1 0 1 1
AB 02 1 3
6 1 1 0 1
AB 16 1 7
7 1 1 1 1
AB 04 15 12
Assoc. Prof. Nguyen Thanh Hai
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map

Example: Given a logic circuit with 4 inputs A,B,C,D, the


output is High, only when more than two inputs are High
at the same time.
a. Draw the truth table
b. Write the simplified expression using K-map
c. Draw the logic circuit based on question (b)

13
Assoc. Prof. Nguyen Thanh Hai
HCMC University of Technology and Education
Faculty of Electrical & Electronic Engineering

Karnaugh Map

The End

14
Assoc. Prof. Nguyen Thanh Hai

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