AccuTimeTM v3.0.

1 Release Notes

NOTE: This release note is for ZCU102, ZCU111, and ZCU216 platforms and sup-
ports all Aruba Network Synchronizers.

Version Information
 Timing Driver — 3.3.0_1
 PTP Stack — 3.0.1
 GIT Release Tag — sync_xilinx_zcu1xx_3.0.1
 Firmware — 0.10.1_svn_5123 (Version used for B0 Compliance Testing)

 Frequency Plan — 0.10.1_svn_5124 (Version used for B0 Compliance Testing)

 CbPro version — 4.1 (Version used for B0 Compliance Testing)
 Firmware compatibility:
o AccuTime version 3.0.1 is compatible with FW version 0.10.1 or later only for Chipset Revision B0.

 SW is not compatible with FW version 0.9 or earlier.

o AccuTime SW version 3.0.1 does not support Chipset Revision A1.

o AccuTime SW version 3.0.1 is a major release and APIs are not backward compatible.
 Application code working on 2.7.1 needed to be updated for 3.0.1 with the new rebranded APIs.

Features Supported/Added
1. APTS Support added (T-GM, T-TSC-A and T-BC-A modes now supported in addition to T-BC-P, T-TSC-P, T-BC and T-TSC)
2. Cleaned up servo and regularized Servo Ctrl APIs. Initial version of Servo and Clock Control APIs now available. See HTML
API Guide for details on APIs available.
3. ESMC enhanced to support SyncE, No-SyncE and T-GM Clock input and associated switch overs
4. Grade and part number based authentication added for AccuTime
5. Improved logging for OEM and OSAL layer.
6. Rebranded all APIs and documents including HMTL API guide.

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 AccuTime v3.0.1 Release Notes
Limitations

Limitations
1. Common:
a. 1 Step Mode – needs hardware support on Xilinx Evaluation Platform
2. Aruba based solution:
a. LOS can only be generated for IN2 (eth2 – FMC port) port; Cannot do for IN1 (eth1 – Xilinx port) – Xilinx IP limitation.
Rely on OOF from IN1 port.
b. Our Reference design implementation requires FPGA to be loaded before PLL chipset can be accessible through SPI
through the EMIO pins.
c. Reference Design HW depends on the clock coming in through the SFP ports for certain internal PTP blocks. The
behavior of the system is un-defined when there are no SFP ports connected and PTP stack is started and triggers
requests for timestamps.
3. Due to Xilinx Vivado issues, ZCU111 is supplied with hardware based on Vivado 2020.1 for APTS.

Known Issues
1. Need a higher announce receipt timeout than the default value for G.8275.1 profile-based testing. Currently set to 6 instead of
3. Possible issue with test equipment
2. ZCU111 Builds – When testing T-BC modes with ZCU111 platform (10g and 25g), the T1/T4 timestamps measured by the
instrument are occasionally very high leading to T-BC test failures. This problem is neither seen with ZCU216 build nor with the
ZCU102 build. The FPGA HW logic for Resync IP and the Accutime SW is the same across both platforms. So, there is potentially
some interaction between Resync IP in the FPGA HW with the Ethernet IP on the ZCU111 HW builds. We are investigating this
actively and will evaluate if help from Xilinx is needed and will attempt to provide a fix for this. The problem is not expected to be
seen if Xilinx Resync IP block is used in customer platforms in lieu of the our Resync IP. The problem will not be seen with T-
TSC implementation as the problem is on the TX Path of Master ports on our reference design platforms.
a. NOTE: The Resync IP supports dual ethernet rate whereas the Xilinx Resync IP does not.
3. G.8273.4 PTS Noise Tolerance failure when SyncE Wander Generation is enabled. This test was introduced by Calnex in 2nd
half of June and it fails marginally. Investigations are underway to root cause and fine tune the servo settings implementation.
4. G.8273.4 PTS Noise Generation Test random failure without SyncE – this is noticed in 1/10 runs. Possible causes are unknown
now and the FPGA HW is a likely candidate for suspicion as well.
5. PTP Stack synchronization can take a little longer on boot-up on certain occasions. Problem under investigation.

References
The following docuements are included in this release

1. AccuTime Reference Manual v3.0.1.pdf

2. AccuTime SW Porting Guide v3.0.1.pdf
3. AccuTime Version Evolution Guide v3.0.1.pdf
4. Xilinx Reference Design Guide for AccuTime v3.0.1.pdf
5. API Guide
6. Si5518 FMC Evaluation Board Jumpstart Guide.pdf
7. Reference Design Compliance Reports for G.8261, G.8273.2 and G.8273.4

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 AccuTime v3.0.1 Release Notes
Revision History

Revision History

Rev Change Description Date

2.1.4 Initial Customer Release October 17, 2019

2.2.3 Petalinux 2019.1 support April 9, 2020

Added PTP2APPLIB library module

Ability to configure tau_control_avg parameter through the PTP Config file.

Driver support to allow initialization to complete if some hardware devices are not ready (PTP Clock,
TOD Output, IRQ, RESET); SPI is mandatory for driver init to succeed.

2.3.1 PTP Reference Design support for Si5518 chipset May 4, 2020

2.4.1 Interrupts and driver events support added for Si5518 platform; Extends support to the mini-ESMC June 15, 2020
(example application)

LED control support added for Si5518 FMC based reference design

PLL and INPUT Status utility functions report better and meaningful status; PLL Status also reports
current active selected input when PLL is not in HO.

SDK packages made available for Si5518 platform

2.5.1 PTP Reference Design solutions for Si5518 chipsets on ZCU216 HW platform (25G support only) September 7, 2020

2.6.1 PTP Reference Design solutions for Si5518 chipsets using Petalinux/Vivado version 2020.1 October 26, 2020

Dual line rate feature (with runtime switch) enabled in ZCU111 and ZCU216 FPGA HW

2.7.1 PTP Reference Design solutions for Aruba chipset ported to Petalinux/Vivado version 2020.2 March 5, 2021

PTP stack support for non-forwardable multicast address, asynchronous notifications, configurable
DCO limits, ToD jump, configurable servo parameters.

Support to download firmware and frequency plan after kernel boots for Aruba chipset.

Added support for G.8273.4 PTS mode, G.8275.2 enhanced for PTS, Frequency only and Time Sync
Mode.

3.0.1 Added support for APTS (T-GM, T-TSC-A and T-BC-A modes) and Servo and clock Control APIs October 1, 2021
added;

ESMC support added for SyncE, No SyncE and T-GM input clocks.

Improved logging avaialble for OEM and OSAL layers.

Rebranded APIs

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 AccuTime v3.0.1 Release Notes
Revision History

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