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Architecture of Raster and Random Scan Display Devices

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97 views4 pages

Architecture of Raster and Random Scan Display Devices

Uploaded by

kingharsh608
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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12/15/24, 1:59 PM Architecture of Raster and Random Scan Display Devices

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Display:
Raster Scan Display basically employs a Cathode
Related Posts
Ray Tube (CRT) or an LCD panel for display. The
CRT works just like the picture tube of a television
Computer
set. The Raster Scan Display viewing surface is
Graphics
coated with a layer of arrayed phosphor dots. At the
back of the CRT is a set of electron guns (cathodes)
that produce a controlled stream of electrons that
says electron beam. The phosphor material emits
light when struck by these high-energy electrons.
The Architecture of Raster and Random Scan
Display Devices Diagram is given below:

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12/15/24, 1:59 PM Architecture of Raster and Random Scan Display Devices

The frequency and intensity of the emitting light depend


on the type of phosphor material uses and the energy of
the electrons. To produce a picture on the screen, these
directed electron beams start at the top of the screen. It
scans rapidly from left to right along the row of phosphor
dots. They return to the leftmost position one line down.
It scans again and repeats this to cover the entire
screen. The return of the beam direction to the leftmost
position is one line down that says Horizontal Retrace.

Architecture of Random Scan


Display
In Random Scan Display, the electron beam is
directed straightway to the particular points of the
screen where the image is produced. Random Scan
Display generates the image by drawing a set of
random straight lines. It is much in the same way
one might move a pencil over a piece of paper to
draw an image. The drawing strikes from one point
to another, one line at a time. That’s why this
technique also says Vector Scan Display.

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12/15/24, 1:59 PM Architecture of Raster and Random Scan Display Devices

No bit planes are containing mapped pixel values in the


vector systems. Instead of the Display Buffer memory
stores a set of line-drawing commands along with
endpoint coordinates in a display list or display program
created by a graphics package. The display processing
unit (DPU) executes each command during every
refresh cycle and feeds the vector generator with digital
x, y, Δx, Δy values.

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